Revert "[AArch64][GlobalISel] Add additional vecreduce.fadd and fadd 0.0 tests. NFC"
This reverts commit 16314eb7312dab38d721c70f247f2117e9800704 as the test cases are failing under EXPENSIVE_CHECKS. Scalar vecreduce.fadd are not valid in GISel.
This commit is contained in:
David Green
parent
bc216b057d
commit
649762cb04
@ -1,20 +1,12 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s
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define double @test1(double %a, double %b) {
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; CHECK-SD-LABEL: test1:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd d1, d1, d1
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; CHECK-SD-NEXT: fsub d0, d0, d1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test1:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov d2, #-2.00000000
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; CHECK-GI-NEXT: fmul d1, d1, d2
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; CHECK-GI-NEXT: fadd d0, d0, d1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: test1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, -2.000000e+00
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%add1 = fadd double %a, %mul
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ret double %add1
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@ -23,38 +15,23 @@ define double @test1(double %a, double %b) {
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; DAGCombine will canonicalize 'a - 2.0*b' to 'a + -2.0*b'
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define double @test2(double %a, double %b) {
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; CHECK-SD-LABEL: test2:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd d1, d1, d1
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; CHECK-SD-NEXT: fsub d0, d0, d1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test2:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov d2, #2.00000000
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; CHECK-GI-NEXT: fmul d1, d1, d2
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; CHECK-GI-NEXT: fsub d0, d0, d1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: test2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, 2.000000e+00
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%add1 = fsub double %a, %mul
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ret double %add1
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}
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define double @test3(double %a, double %b, double %c) {
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; CHECK-SD-LABEL: test3:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fmul d0, d0, d1
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; CHECK-SD-NEXT: fadd d1, d2, d2
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; CHECK-SD-NEXT: fsub d0, d0, d1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test3:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov d3, #2.00000000
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; CHECK-GI-NEXT: fmul d0, d0, d1
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; CHECK-GI-NEXT: fmul d1, d2, d3
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; CHECK-GI-NEXT: fsub d0, d0, d1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: test3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %a, %b
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%mul1 = fmul double %c, 2.000000e+00
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%sub = fsub double %mul, %mul1
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@ -62,20 +39,12 @@ define double @test3(double %a, double %b, double %c) {
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}
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define double @test4(double %a, double %b, double %c) {
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; CHECK-SD-LABEL: test4:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fmul d0, d0, d1
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; CHECK-SD-NEXT: fadd d1, d2, d2
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; CHECK-SD-NEXT: fsub d0, d0, d1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test4:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov d3, #-2.00000000
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; CHECK-GI-NEXT: fmul d0, d0, d1
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; CHECK-GI-NEXT: fmul d1, d2, d3
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; CHECK-GI-NEXT: fadd d0, d0, d1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: test4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %a, %b
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%mul1 = fmul double %c, -2.000000e+00
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%add2 = fadd double %mul, %mul1
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@ -83,95 +52,55 @@ define double @test4(double %a, double %b, double %c) {
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}
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define <4 x float> @fmulnegtwo_vec(<4 x float> %a, <4 x float> %b) {
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; CHECK-SD-LABEL: fmulnegtwo_vec:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-SD-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fmulnegtwo_vec:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov s2, #-2.00000000
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; CHECK-GI-NEXT: fmul v1.4s, v1.4s, v2.s[0]
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; CHECK-GI-NEXT: fadd v0.4s, v0.4s, v1.4s
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fmulnegtwo_vec:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
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%add = fadd <4 x float> %a, %mul
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_commute(<4 x float> %a, <4 x float> %b) {
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; CHECK-SD-LABEL: fmulnegtwo_vec_commute:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-SD-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fmulnegtwo_vec_commute:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov s2, #-2.00000000
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; CHECK-GI-NEXT: fmul v1.4s, v1.4s, v2.s[0]
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; CHECK-GI-NEXT: fadd v0.4s, v1.4s, v0.4s
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fmulnegtwo_vec_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
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%add = fadd <4 x float> %mul, %a
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_undefs(<4 x float> %a, <4 x float> %b) {
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; CHECK-SD-LABEL: fmulnegtwo_vec_undefs:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-SD-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fmulnegtwo_vec_undefs:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov s2, #-2.00000000
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; CHECK-GI-NEXT: mov v3.s[1], v2.s[0]
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; CHECK-GI-NEXT: mov v3.s[3], v2.s[0]
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; CHECK-GI-NEXT: fmul v1.4s, v1.4s, v3.4s
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; CHECK-GI-NEXT: fadd v0.4s, v0.4s, v1.4s
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fmulnegtwo_vec_undefs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float undef, float -2.0, float undef, float -2.0>
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%add = fadd <4 x float> %a, %mul
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_commute_undefs(<4 x float> %a, <4 x float> %b) {
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; CHECK-SD-LABEL: fmulnegtwo_vec_commute_undefs:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-SD-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fmulnegtwo_vec_commute_undefs:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov s2, #-2.00000000
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; CHECK-GI-NEXT: fmov s3, #-2.00000000
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; CHECK-GI-NEXT: mov v3.s[2], v2.s[0]
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; CHECK-GI-NEXT: mov v3.s[3], v2.s[0]
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; CHECK-GI-NEXT: fmul v1.4s, v1.4s, v3.4s
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; CHECK-GI-NEXT: fadd v0.4s, v1.4s, v0.4s
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fmulnegtwo_vec_commute_undefs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float undef, float -2.0, float -2.0>
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%add = fadd <4 x float> %mul, %a
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ret <4 x float> %add
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}
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define <4 x float> @test6(<4 x float> %a, <4 x float> %b) {
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; CHECK-SD-LABEL: test6:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-SD-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test6:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov s2, #2.00000000
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; CHECK-GI-NEXT: fmul v1.4s, v1.4s, v2.s[0]
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; CHECK-GI-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: test6:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float 2.0, float 2.0, float 2.0, float 2.0>
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%add = fsub <4 x float> %a, %mul
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ret <4 x float> %add
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@ -201,26 +130,16 @@ define double @test7(double %a, double %b) nounwind {
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}
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define float @fadd_const_multiuse_fmf(float %x) {
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; CHECK-SD-LABEL: fadd_const_multiuse_fmf:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: mov w8, #1109917696 // =0x42280000
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; CHECK-SD-NEXT: mov w9, #1114374144 // =0x426c0000
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; CHECK-SD-NEXT: fmov s1, w8
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; CHECK-SD-NEXT: fmov s2, w9
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; CHECK-SD-NEXT: fadd s1, s0, s1
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; CHECK-SD-NEXT: fadd s0, s0, s2
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; CHECK-SD-NEXT: fadd s0, s1, s0
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fadd_const_multiuse_fmf:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: mov w8, #1109917696 // =0x42280000
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; CHECK-GI-NEXT: fmov s1, w8
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; CHECK-GI-NEXT: fadd s0, s0, s1
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; CHECK-GI-NEXT: fmov s1, #17.00000000
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; CHECK-GI-NEXT: fadd s1, s0, s1
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; CHECK-GI-NEXT: fadd s0, s0, s1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fadd_const_multiuse_fmf:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #1109917696 // =0x42280000
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; CHECK-NEXT: mov w9, #1114374144 // =0x426c0000
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; CHECK-NEXT: fmov s1, w8
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; CHECK-NEXT: fmov s2, w9
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; CHECK-NEXT: fadd s1, s0, s1
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; CHECK-NEXT: fadd s0, s0, s2
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; CHECK-NEXT: fadd s0, s1, s0
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; CHECK-NEXT: ret
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%a1 = fadd float %x, 42.0
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%a2 = fadd nsz reassoc float %a1, 17.0
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%a3 = fadd float %a1, %a2
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@ -229,26 +148,16 @@ define float @fadd_const_multiuse_fmf(float %x) {
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; DAGCombiner transforms this into: (x + 17.0) + (x + 59.0).
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define float @fadd_const_multiuse_attr(float %x) {
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; CHECK-SD-LABEL: fadd_const_multiuse_attr:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: mov w8, #1109917696 // =0x42280000
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; CHECK-SD-NEXT: mov w9, #1114374144 // =0x426c0000
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; CHECK-SD-NEXT: fmov s1, w8
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; CHECK-SD-NEXT: fmov s2, w9
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; CHECK-SD-NEXT: fadd s1, s0, s1
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; CHECK-SD-NEXT: fadd s0, s0, s2
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; CHECK-SD-NEXT: fadd s0, s1, s0
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fadd_const_multiuse_attr:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: mov w8, #1109917696 // =0x42280000
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; CHECK-GI-NEXT: fmov s1, w8
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; CHECK-GI-NEXT: fadd s0, s0, s1
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; CHECK-GI-NEXT: fmov s1, #17.00000000
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; CHECK-GI-NEXT: fadd s1, s0, s1
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; CHECK-GI-NEXT: fadd s0, s0, s1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fadd_const_multiuse_attr:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #1109917696 // =0x42280000
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; CHECK-NEXT: mov w9, #1114374144 // =0x426c0000
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; CHECK-NEXT: fmov s1, w8
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; CHECK-NEXT: fmov s2, w9
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; CHECK-NEXT: fadd s1, s0, s1
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; CHECK-NEXT: fadd s0, s0, s2
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; CHECK-NEXT: fadd s0, s1, s0
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; CHECK-NEXT: ret
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%a1 = fadd fast float %x, 42.0
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%a2 = fadd fast float %a1, 17.0
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%a3 = fadd fast float %a1, %a2
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@ -258,20 +167,12 @@ define float @fadd_const_multiuse_attr(float %x) {
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; PR32939 - https://bugs.llvm.org/show_bug.cgi?id=32939
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define double @fmul2_negated(double %a, double %b, double %c) {
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; CHECK-SD-LABEL: fmul2_negated:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd d1, d1, d1
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; CHECK-SD-NEXT: fmul d1, d1, d2
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; CHECK-SD-NEXT: fsub d0, d0, d1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fmul2_negated:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov d3, #2.00000000
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; CHECK-GI-NEXT: fmul d1, d1, d3
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; CHECK-GI-NEXT: fmul d1, d1, d2
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; CHECK-GI-NEXT: fsub d0, d0, d1
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; CHECK-GI-NEXT: ret
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; CHECK-LABEL: fmul2_negated:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fmul d1, d1, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, 2.0
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%mul1 = fmul double %mul, %c
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%sub = fsub double %a, %mul1
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@ -279,20 +180,12 @@ define double @fmul2_negated(double %a, double %b, double %c) {
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}
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define <2 x double> @fmul2_negated_vec(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
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; CHECK-SD-LABEL: fmul2_negated_vec:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: fadd v1.2d, v1.2d, v1.2d
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; CHECK-SD-NEXT: fmul v1.2d, v1.2d, v2.2d
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; CHECK-SD-NEXT: fsub v0.2d, v0.2d, v1.2d
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fmul2_negated_vec:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: fmov d3, #2.00000000
|
||||
; CHECK-GI-NEXT: fmul v1.2d, v1.2d, v3.d[0]
|
||||
; CHECK-GI-NEXT: fmul v1.2d, v1.2d, v2.2d
|
||||
; CHECK-GI-NEXT: fsub v0.2d, v0.2d, v1.2d
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: fmul2_negated_vec:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fadd v1.2d, v1.2d, v1.2d
|
||||
; CHECK-NEXT: fmul v1.2d, v1.2d, v2.2d
|
||||
; CHECK-NEXT: fsub v0.2d, v0.2d, v1.2d
|
||||
; CHECK-NEXT: ret
|
||||
%mul = fmul <2 x double> %b, <double 2.0, double 2.0>
|
||||
%mul1 = fmul <2 x double> %mul, %c
|
||||
%sub = fsub <2 x double> %a, %mul1
|
||||
@ -302,18 +195,11 @@ define <2 x double> @fmul2_negated_vec(<2 x double> %a, <2 x double> %b, <2 x do
|
||||
; ((a*b) + (c*d)) + n1 --> (a*b) + ((c*d) + n1)
|
||||
|
||||
define double @fadd_fma_fmul_1(double %a, double %b, double %c, double %d, double %n1) nounwind {
|
||||
; CHECK-SD-LABEL: fadd_fma_fmul_1:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fmadd d2, d2, d3, d4
|
||||
; CHECK-SD-NEXT: fmadd d0, d0, d1, d2
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: fadd_fma_fmul_1:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: fmul d2, d2, d3
|
||||
; CHECK-GI-NEXT: fmadd d0, d0, d1, d2
|
||||
; CHECK-GI-NEXT: fadd d0, d0, d4
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: fadd_fma_fmul_1:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fmadd d2, d2, d3, d4
|
||||
; CHECK-NEXT: fmadd d0, d0, d1, d2
|
||||
; CHECK-NEXT: ret
|
||||
%m1 = fmul fast double %a, %b
|
||||
%m2 = fmul fast double %c, %d
|
||||
%a1 = fadd fast double %m1, %m2
|
||||
@ -326,18 +212,11 @@ define double @fadd_fma_fmul_1(double %a, double %b, double %c, double %d, doubl
|
||||
; requires reassociation to fuse with c*d.
|
||||
|
||||
define float @fadd_fma_fmul_fmf(float %a, float %b, float %c, float %d, float %n0) nounwind {
|
||||
; CHECK-SD-LABEL: fadd_fma_fmul_fmf:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fmadd s2, s2, s3, s4
|
||||
; CHECK-SD-NEXT: fmadd s0, s0, s1, s2
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: fadd_fma_fmul_fmf:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: fmul s2, s2, s3
|
||||
; CHECK-GI-NEXT: fmadd s0, s0, s1, s2
|
||||
; CHECK-GI-NEXT: fadd s0, s4, s0
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: fadd_fma_fmul_fmf:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fmadd s2, s2, s3, s4
|
||||
; CHECK-NEXT: fmadd s0, s0, s1, s2
|
||||
; CHECK-NEXT: ret
|
||||
%m1 = fmul contract float %a, %b
|
||||
%m2 = fmul contract float %c, %d
|
||||
%a1 = fadd contract float %m1, %m2
|
||||
@ -364,23 +243,14 @@ define float @fadd_fma_fmul_2(float %a, float %b, float %c, float %d, float %n0)
|
||||
; The final fadd can be folded with either 1 of the leading fmuls.
|
||||
|
||||
define <2 x double> @fadd_fma_fmul_3(<2 x double> %x1, <2 x double> %x2, <2 x double> %x3, <2 x double> %x4, <2 x double> %x5, <2 x double> %x6, <2 x double> %x7, <2 x double> %x8) nounwind {
|
||||
; CHECK-SD-LABEL: fadd_fma_fmul_3:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fmul v2.2d, v2.2d, v3.2d
|
||||
; CHECK-SD-NEXT: fmla v2.2d, v1.2d, v0.2d
|
||||
; CHECK-SD-NEXT: fmla v2.2d, v7.2d, v6.2d
|
||||
; CHECK-SD-NEXT: fmla v2.2d, v5.2d, v4.2d
|
||||
; CHECK-SD-NEXT: mov v0.16b, v2.16b
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: fadd_fma_fmul_3:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: fmul v2.2d, v2.2d, v3.2d
|
||||
; CHECK-GI-NEXT: fmul v3.2d, v6.2d, v7.2d
|
||||
; CHECK-GI-NEXT: fmla v2.2d, v0.2d, v1.2d
|
||||
; CHECK-GI-NEXT: fmla v3.2d, v4.2d, v5.2d
|
||||
; CHECK-GI-NEXT: fadd v0.2d, v2.2d, v3.2d
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: fadd_fma_fmul_3:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fmul v2.2d, v2.2d, v3.2d
|
||||
; CHECK-NEXT: fmla v2.2d, v1.2d, v0.2d
|
||||
; CHECK-NEXT: fmla v2.2d, v7.2d, v6.2d
|
||||
; CHECK-NEXT: fmla v2.2d, v5.2d, v4.2d
|
||||
; CHECK-NEXT: mov v0.16b, v2.16b
|
||||
; CHECK-NEXT: ret
|
||||
%m1 = fmul fast <2 x double> %x1, %x2
|
||||
%m2 = fmul fast <2 x double> %x3, %x4
|
||||
%m3 = fmul fast <2 x double> %x5, %x6
|
||||
@ -446,20 +316,12 @@ define float @fadd_fma_fmul_extra_use_3(float %a, float %b, float %c, float %d,
|
||||
}
|
||||
|
||||
define float @fmac_sequence_innermost_fmul(float %a, float %b, float %c, float %d, float %e, float %f, float %g) {
|
||||
; CHECK-SD-LABEL: fmac_sequence_innermost_fmul:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fmadd s0, s0, s1, s6
|
||||
; CHECK-SD-NEXT: fmadd s0, s2, s3, s0
|
||||
; CHECK-SD-NEXT: fmadd s0, s4, s5, s0
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: fmac_sequence_innermost_fmul:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: fmul s2, s2, s3
|
||||
; CHECK-GI-NEXT: fmadd s0, s0, s1, s2
|
||||
; CHECK-GI-NEXT: fmadd s0, s4, s5, s0
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s6
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: fmac_sequence_innermost_fmul:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fmadd s0, s0, s1, s6
|
||||
; CHECK-NEXT: fmadd s0, s2, s3, s0
|
||||
; CHECK-NEXT: fmadd s0, s4, s5, s0
|
||||
; CHECK-NEXT: ret
|
||||
%t0 = fmul float %a, %b
|
||||
%t1 = fmul contract float %c, %d
|
||||
%t2 = fadd contract float %t0, %t1
|
||||
@ -470,20 +332,12 @@ define float @fmac_sequence_innermost_fmul(float %a, float %b, float %c, float %
|
||||
}
|
||||
|
||||
define float @fmac_sequence_innermost_fmul_intrinsics(float %a, float %b, float %c, float %d, float %e, float %f, float %g) {
|
||||
; CHECK-SD-LABEL: fmac_sequence_innermost_fmul_intrinsics:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fmadd s0, s0, s1, s6
|
||||
; CHECK-SD-NEXT: fmadd s0, s2, s3, s0
|
||||
; CHECK-SD-NEXT: fmadd s0, s4, s5, s0
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: fmac_sequence_innermost_fmul_intrinsics:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: fmul s0, s0, s1
|
||||
; CHECK-GI-NEXT: fmadd s0, s2, s3, s0
|
||||
; CHECK-GI-NEXT: fmadd s0, s4, s5, s0
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s6
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: fmac_sequence_innermost_fmul_intrinsics:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fmadd s0, s0, s1, s6
|
||||
; CHECK-NEXT: fmadd s0, s2, s3, s0
|
||||
; CHECK-NEXT: fmadd s0, s4, s5, s0
|
||||
; CHECK-NEXT: ret
|
||||
%t0 = fmul float %a, %b
|
||||
%t1 = call float @llvm.fma.f32(float %c, float %d, float %t0)
|
||||
%t2 = call float @llvm.fma.f32(float %e, float %f, float %t1)
|
||||
@ -495,31 +349,3 @@ declare float @llvm.fma.f32(float, float, float)
|
||||
|
||||
declare void @use(double)
|
||||
|
||||
|
||||
define float @faddvf32_zero_nsz(float %a) {
|
||||
; CHECK-SD-LABEL: faddvf32_zero_nsz:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: faddvf32_zero_nsz:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: movi d1, #0000000000000000
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: ret
|
||||
%b = fadd nsz float %a, 0.0
|
||||
ret float %b
|
||||
}
|
||||
|
||||
define <2 x double> @faddv2f64_zero_nsz(<2 x double> %a) {
|
||||
; CHECK-SD-LABEL: faddv2f64_zero_nsz:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: faddv2f64_zero_nsz:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
|
||||
; CHECK-GI-NEXT: fadd v0.2d, v0.2d, v1.2d
|
||||
; CHECK-GI-NEXT: ret
|
||||
%b = fadd nsz <2 x double> %a, zeroinitializer
|
||||
ret <2 x double> %b
|
||||
}
|
||||
|
||||
@ -1,15 +1,5 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECK-SD
|
||||
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
|
||||
|
||||
; CHECK-GI: warning: Instruction selection used fallback path for test_v1f16
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f16_neutral
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f32
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f32_neutral
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f64
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f64_neutral
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f128
|
||||
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_v1f128_neutral
|
||||
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK
|
||||
|
||||
; Same as vecreduce-fadd-legalization.ll, but without fmf.
|
||||
|
||||
@ -100,23 +90,14 @@ define fp128 @test_v1f128_neutral(<1 x fp128> %a) nounwind {
|
||||
}
|
||||
|
||||
define float @test_v3f32(<3 x float> %a, float %s) nounwind {
|
||||
; CHECK-SD-LABEL: test_v3f32:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fadd s1, s1, s0
|
||||
; CHECK-SD-NEXT: mov s2, v0.s[1]
|
||||
; CHECK-SD-NEXT: mov s0, v0.s[2]
|
||||
; CHECK-SD-NEXT: fadd s1, s1, s2
|
||||
; CHECK-SD-NEXT: fadd s0, s1, s0
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v3f32:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: mov s2, v0.s[1]
|
||||
; CHECK-GI-NEXT: fadd s1, s1, s0
|
||||
; CHECK-GI-NEXT: mov s0, v0.s[2]
|
||||
; CHECK-GI-NEXT: fadd s1, s1, s2
|
||||
; CHECK-GI-NEXT: fadd s0, s1, s0
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v3f32:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fadd s1, s1, s0
|
||||
; CHECK-NEXT: mov s2, v0.s[1]
|
||||
; CHECK-NEXT: mov s0, v0.s[2]
|
||||
; CHECK-NEXT: fadd s1, s1, s2
|
||||
; CHECK-NEXT: fadd s0, s1, s0
|
||||
; CHECK-NEXT: ret
|
||||
%b = call float @llvm.vector.reduce.fadd.f32.v3f32(float %s, <3 x float> %a)
|
||||
ret float %b
|
||||
}
|
||||
@ -158,189 +139,96 @@ define float @test_v5f32_neutral(<5 x float> %a) nounwind {
|
||||
}
|
||||
|
||||
define fp128 @test_v2f128(<2 x fp128> %a, fp128 %s) nounwind {
|
||||
; CHECK-SD-LABEL: test_v2f128:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: sub sp, sp, #32
|
||||
; CHECK-SD-NEXT: str q1, [sp] // 16-byte Folded Spill
|
||||
; CHECK-SD-NEXT: mov v1.16b, v0.16b
|
||||
; CHECK-SD-NEXT: mov v0.16b, v2.16b
|
||||
; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; CHECK-SD-NEXT: bl __addtf3
|
||||
; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
||||
; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; CHECK-SD-NEXT: add sp, sp, #32
|
||||
; CHECK-SD-NEXT: b __addtf3
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v2f128:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: sub sp, sp, #32
|
||||
; CHECK-GI-NEXT: mov v3.16b, v0.16b
|
||||
; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
|
||||
; CHECK-GI-NEXT: mov v0.16b, v2.16b
|
||||
; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; CHECK-GI-NEXT: mov v1.16b, v3.16b
|
||||
; CHECK-GI-NEXT: bl __addtf3
|
||||
; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
||||
; CHECK-GI-NEXT: bl __addtf3
|
||||
; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; CHECK-GI-NEXT: add sp, sp, #32
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v2f128:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: sub sp, sp, #32
|
||||
; CHECK-NEXT: str q1, [sp] // 16-byte Folded Spill
|
||||
; CHECK-NEXT: mov v1.16b, v0.16b
|
||||
; CHECK-NEXT: mov v0.16b, v2.16b
|
||||
; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; CHECK-NEXT: bl __addtf3
|
||||
; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; CHECK-NEXT: add sp, sp, #32
|
||||
; CHECK-NEXT: b __addtf3
|
||||
%b = call fp128 @llvm.vector.reduce.fadd.f128.v2f128(fp128 %s, <2 x fp128> %a)
|
||||
ret fp128 %b
|
||||
}
|
||||
|
||||
define fp128 @test_v2f128_neutral(<2 x fp128> %a) nounwind {
|
||||
; CHECK-SD-LABEL: test_v2f128_neutral:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: b __addtf3
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v2f128_neutral:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: sub sp, sp, #32
|
||||
; CHECK-GI-NEXT: mov v2.16b, v0.16b
|
||||
; CHECK-GI-NEXT: adrp x8, .LCPI13_0
|
||||
; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill
|
||||
; CHECK-GI-NEXT: ldr q0, [x8, :lo12:.LCPI13_0]
|
||||
; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; CHECK-GI-NEXT: mov v1.16b, v2.16b
|
||||
; CHECK-GI-NEXT: bl __addtf3
|
||||
; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
||||
; CHECK-GI-NEXT: bl __addtf3
|
||||
; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; CHECK-GI-NEXT: add sp, sp, #32
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v2f128_neutral:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: b __addtf3
|
||||
%b = call fp128 @llvm.vector.reduce.fadd.f128.v2f128(fp128 0xL00000000000000008000000000000000, <2 x fp128> %a)
|
||||
ret fp128 %b
|
||||
}
|
||||
|
||||
define float @test_v16f32(<16 x float> %a, float %s) nounwind {
|
||||
; CHECK-SD-LABEL: test_v16f32:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: mov s6, v0.s[1]
|
||||
; CHECK-SD-NEXT: fadd s4, s4, s0
|
||||
; CHECK-SD-NEXT: mov s7, v0.s[2]
|
||||
; CHECK-SD-NEXT: mov s0, v0.s[3]
|
||||
; CHECK-SD-NEXT: mov s5, v2.s[1]
|
||||
; CHECK-SD-NEXT: fadd s4, s4, s6
|
||||
; CHECK-SD-NEXT: mov s6, v1.s[2]
|
||||
; CHECK-SD-NEXT: fadd s4, s4, s7
|
||||
; CHECK-SD-NEXT: fadd s0, s4, s0
|
||||
; CHECK-SD-NEXT: mov s4, v1.s[1]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v1.s[3]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s4
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s6
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v2.s[2]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s2
|
||||
; CHECK-SD-NEXT: mov s2, v2.s[3]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s5
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v3.s[1]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s2
|
||||
; CHECK-SD-NEXT: mov s2, v3.s[2]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s3
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v3.s[3]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s2
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v16f32:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: mov s5, v0.s[1]
|
||||
; CHECK-GI-NEXT: fadd s4, s4, s0
|
||||
; CHECK-GI-NEXT: mov s6, v0.s[2]
|
||||
; CHECK-GI-NEXT: mov s0, v0.s[3]
|
||||
; CHECK-GI-NEXT: fadd s4, s4, s5
|
||||
; CHECK-GI-NEXT: mov s5, v1.s[2]
|
||||
; CHECK-GI-NEXT: fadd s4, s4, s6
|
||||
; CHECK-GI-NEXT: fadd s0, s4, s0
|
||||
; CHECK-GI-NEXT: mov s4, v1.s[1]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v1.s[3]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s4
|
||||
; CHECK-GI-NEXT: mov s4, v2.s[2]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s5
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v2.s[1]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s2
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v2.s[3]
|
||||
; CHECK-GI-NEXT: mov s2, v3.s[2]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s4
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v3.s[1]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s3
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v3.s[3]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s2
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v16f32:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: mov s6, v0.s[1]
|
||||
; CHECK-NEXT: fadd s4, s4, s0
|
||||
; CHECK-NEXT: mov s7, v0.s[2]
|
||||
; CHECK-NEXT: mov s0, v0.s[3]
|
||||
; CHECK-NEXT: mov s5, v2.s[1]
|
||||
; CHECK-NEXT: fadd s4, s4, s6
|
||||
; CHECK-NEXT: mov s6, v1.s[2]
|
||||
; CHECK-NEXT: fadd s4, s4, s7
|
||||
; CHECK-NEXT: fadd s0, s4, s0
|
||||
; CHECK-NEXT: mov s4, v1.s[1]
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v1.s[3]
|
||||
; CHECK-NEXT: fadd s0, s0, s4
|
||||
; CHECK-NEXT: fadd s0, s0, s6
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v2.s[2]
|
||||
; CHECK-NEXT: fadd s0, s0, s2
|
||||
; CHECK-NEXT: mov s2, v2.s[3]
|
||||
; CHECK-NEXT: fadd s0, s0, s5
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v3.s[1]
|
||||
; CHECK-NEXT: fadd s0, s0, s2
|
||||
; CHECK-NEXT: mov s2, v3.s[2]
|
||||
; CHECK-NEXT: fadd s0, s0, s3
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v3.s[3]
|
||||
; CHECK-NEXT: fadd s0, s0, s2
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: ret
|
||||
%b = call float @llvm.vector.reduce.fadd.f32.v16f32(float %s, <16 x float> %a)
|
||||
ret float %b
|
||||
}
|
||||
|
||||
define float @test_v16f32_neutral(<16 x float> %a) nounwind {
|
||||
; CHECK-SD-LABEL: test_v16f32_neutral:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: mov s5, v0.s[2]
|
||||
; CHECK-SD-NEXT: faddp s6, v0.2s
|
||||
; CHECK-SD-NEXT: mov s0, v0.s[3]
|
||||
; CHECK-SD-NEXT: mov s4, v1.s[1]
|
||||
; CHECK-SD-NEXT: fadd s5, s6, s5
|
||||
; CHECK-SD-NEXT: fadd s0, s5, s0
|
||||
; CHECK-SD-NEXT: mov s5, v1.s[2]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v1.s[3]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s4
|
||||
; CHECK-SD-NEXT: mov s4, v2.s[2]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s5
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v2.s[1]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s2
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v2.s[3]
|
||||
; CHECK-SD-NEXT: mov s2, v3.s[2]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s4
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v3.s[1]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s3
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: mov s1, v3.s[3]
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s2
|
||||
; CHECK-SD-NEXT: fadd s0, s0, s1
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v16f32_neutral:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: mov s4, v0.s[2]
|
||||
; CHECK-GI-NEXT: faddp s5, v0.2s
|
||||
; CHECK-GI-NEXT: mov s0, v0.s[3]
|
||||
; CHECK-GI-NEXT: fadd s4, s5, s4
|
||||
; CHECK-GI-NEXT: mov s5, v1.s[2]
|
||||
; CHECK-GI-NEXT: fadd s0, s4, s0
|
||||
; CHECK-GI-NEXT: mov s4, v1.s[1]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v1.s[3]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s4
|
||||
; CHECK-GI-NEXT: mov s4, v2.s[2]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s5
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v2.s[1]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s2
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v2.s[3]
|
||||
; CHECK-GI-NEXT: mov s2, v3.s[2]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s4
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v3.s[1]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s3
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: mov s1, v3.s[3]
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s2
|
||||
; CHECK-GI-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v16f32_neutral:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: mov s5, v0.s[2]
|
||||
; CHECK-NEXT: faddp s6, v0.2s
|
||||
; CHECK-NEXT: mov s0, v0.s[3]
|
||||
; CHECK-NEXT: mov s4, v1.s[1]
|
||||
; CHECK-NEXT: fadd s5, s6, s5
|
||||
; CHECK-NEXT: fadd s0, s5, s0
|
||||
; CHECK-NEXT: mov s5, v1.s[2]
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v1.s[3]
|
||||
; CHECK-NEXT: fadd s0, s0, s4
|
||||
; CHECK-NEXT: mov s4, v2.s[2]
|
||||
; CHECK-NEXT: fadd s0, s0, s5
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v2.s[1]
|
||||
; CHECK-NEXT: fadd s0, s0, s2
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v2.s[3]
|
||||
; CHECK-NEXT: mov s2, v3.s[2]
|
||||
; CHECK-NEXT: fadd s0, s0, s4
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v3.s[1]
|
||||
; CHECK-NEXT: fadd s0, s0, s3
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: mov s1, v3.s[3]
|
||||
; CHECK-NEXT: fadd s0, s0, s2
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: ret
|
||||
%b = call float @llvm.vector.reduce.fadd.f32.v16f32(float -0.0, <16 x float> %a)
|
||||
ret float %b
|
||||
}
|
||||
|
||||
@ -1,8 +1,5 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECK-SD
|
||||
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
|
||||
|
||||
; CHECK-GI: warning: Instruction selection used fallback path for test_v5f32
|
||||
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK
|
||||
|
||||
declare half @llvm.vector.reduce.fadd.f16.v1f16(half, <1 x half>)
|
||||
declare float @llvm.vector.reduce.fadd.f32.v1f32(float, <1 x float>)
|
||||
@ -23,16 +20,11 @@ define half @test_v1f16(<1 x half> %a) nounwind {
|
||||
}
|
||||
|
||||
define float @test_v1f32(<1 x float> %a) nounwind {
|
||||
; CHECK-SD-LABEL: test_v1f32:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
|
||||
; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v1f32:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $d0
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v1f32:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
||||
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
|
||||
; CHECK-NEXT: ret
|
||||
%b = call reassoc float @llvm.vector.reduce.fadd.f32.v1f32(float -0.0, <1 x float> %a)
|
||||
ret float %b
|
||||
}
|
||||
@ -87,38 +79,22 @@ define float @test_v5f32(<5 x float> %a) nounwind {
|
||||
}
|
||||
|
||||
define fp128 @test_v2f128(<2 x fp128> %a) nounwind {
|
||||
; CHECK-SD-LABEL: test_v2f128:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: b __addtf3
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v2f128:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; CHECK-GI-NEXT: bl __addtf3
|
||||
; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v2f128:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: b __addtf3
|
||||
%b = call reassoc fp128 @llvm.vector.reduce.fadd.f128.v2f128(fp128 0xL00000000000000008000000000000000, <2 x fp128> %a)
|
||||
ret fp128 %b
|
||||
}
|
||||
|
||||
define float @test_v16f32(<16 x float> %a) nounwind {
|
||||
; CHECK-SD-LABEL: test_v16f32:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v3.4s
|
||||
; CHECK-SD-NEXT: fadd v0.4s, v0.4s, v2.4s
|
||||
; CHECK-SD-NEXT: fadd v0.4s, v0.4s, v1.4s
|
||||
; CHECK-SD-NEXT: faddp v0.4s, v0.4s, v0.4s
|
||||
; CHECK-SD-NEXT: faddp s0, v0.2s
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: test_v16f32:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: fadd v0.4s, v0.4s, v1.4s
|
||||
; CHECK-GI-NEXT: fadd v1.4s, v2.4s, v3.4s
|
||||
; CHECK-GI-NEXT: fadd v0.4s, v0.4s, v1.4s
|
||||
; CHECK-GI-NEXT: faddp v0.4s, v0.4s, v0.4s
|
||||
; CHECK-GI-NEXT: faddp s0, v0.2s
|
||||
; CHECK-GI-NEXT: ret
|
||||
; CHECK-LABEL: test_v16f32:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: fadd v1.4s, v1.4s, v3.4s
|
||||
; CHECK-NEXT: fadd v0.4s, v0.4s, v2.4s
|
||||
; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s
|
||||
; CHECK-NEXT: faddp v0.4s, v0.4s, v0.4s
|
||||
; CHECK-NEXT: faddp s0, v0.2s
|
||||
; CHECK-NEXT: ret
|
||||
%b = call reassoc float @llvm.vector.reduce.fadd.f32.v16f32(float -0.0, <16 x float> %a)
|
||||
ret float %b
|
||||
}
|
||||
|
||||
@ -208,22 +208,6 @@ define double @add_D(<2 x double> %bin.rdx) {
|
||||
ret double %r
|
||||
}
|
||||
|
||||
define double @add_D_pos0(<2 x double> %bin.rdx) {
|
||||
; CHECK-SD-LABEL: add_D_pos0:
|
||||
; CHECK-SD: // %bb.0:
|
||||
; CHECK-SD-NEXT: faddp d0, v0.2d
|
||||
; CHECK-SD-NEXT: ret
|
||||
;
|
||||
; CHECK-GI-LABEL: add_D_pos0:
|
||||
; CHECK-GI: // %bb.0:
|
||||
; CHECK-GI-NEXT: movi d1, #0000000000000000
|
||||
; CHECK-GI-NEXT: faddp d0, v0.2d
|
||||
; CHECK-GI-NEXT: fadd d0, d0, d1
|
||||
; CHECK-GI-NEXT: ret
|
||||
%r = call fast double @llvm.vector.reduce.fadd.f64.v2f64(double 0.0, <2 x double> %bin.rdx)
|
||||
ret double %r
|
||||
}
|
||||
|
||||
define half @add_2H(<16 x half> %bin.rdx) {
|
||||
; CHECK-SD-NOFP16-LABEL: add_2H:
|
||||
; CHECK-SD-NOFP16: // %bb.0:
|
||||
@ -335,7 +319,7 @@ define float @fadd_reduction_v4f32_in_loop(ptr %ptr.start) {
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-NEXT: mov x8, xzr
|
||||
; CHECK-NEXT: .LBB12_1: // %loop
|
||||
; CHECK-NEXT: .LBB11_1: // %loop
|
||||
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-NEXT: ldr q1, [x0, x8]
|
||||
; CHECK-NEXT: add x8, x8, #16
|
||||
@ -343,7 +327,7 @@ define float @fadd_reduction_v4f32_in_loop(ptr %ptr.start) {
|
||||
; CHECK-NEXT: faddp v1.4s, v1.4s, v1.4s
|
||||
; CHECK-NEXT: faddp s1, v1.2s
|
||||
; CHECK-NEXT: fadd s0, s1, s0
|
||||
; CHECK-NEXT: b.ne .LBB12_1
|
||||
; CHECK-NEXT: b.ne .LBB11_1
|
||||
; CHECK-NEXT: // %bb.2: // %exit
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
@ -372,7 +356,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-NOFP16: // %bb.0: // %entry
|
||||
; CHECK-SD-NOFP16-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-SD-NOFP16-NEXT: mov x8, xzr
|
||||
; CHECK-SD-NOFP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-SD-NOFP16-NEXT: .LBB12_1: // %loop
|
||||
; CHECK-SD-NOFP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-SD-NOFP16-NEXT: ldr d1, [x0, x8]
|
||||
; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
|
||||
@ -390,7 +374,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2
|
||||
; CHECK-SD-NOFP16-NEXT: fadd s0, s1, s0
|
||||
; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
|
||||
; CHECK-SD-NOFP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-SD-NOFP16-NEXT: b.ne .LBB12_1
|
||||
; CHECK-SD-NOFP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-SD-NOFP16-NEXT: ret
|
||||
;
|
||||
@ -398,7 +382,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-FP16: // %bb.0: // %entry
|
||||
; CHECK-SD-FP16-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-SD-FP16-NEXT: mov x8, xzr
|
||||
; CHECK-SD-FP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-SD-FP16-NEXT: .LBB12_1: // %loop
|
||||
; CHECK-SD-FP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-SD-FP16-NEXT: ldr d1, [x0, x8]
|
||||
; CHECK-SD-FP16-NEXT: add x8, x8, #8
|
||||
@ -406,7 +390,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-FP16-NEXT: faddp v1.4h, v1.4h, v1.4h
|
||||
; CHECK-SD-FP16-NEXT: faddp h1, v1.2h
|
||||
; CHECK-SD-FP16-NEXT: fadd h0, h1, h0
|
||||
; CHECK-SD-FP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-SD-FP16-NEXT: b.ne .LBB12_1
|
||||
; CHECK-SD-FP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-SD-FP16-NEXT: ret
|
||||
;
|
||||
@ -414,7 +398,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-NOFP16: // %bb.0: // %entry
|
||||
; CHECK-GI-NOFP16-NEXT: mov x8, xzr
|
||||
; CHECK-GI-NOFP16-NEXT: mov w9, #0 // =0x0
|
||||
; CHECK-GI-NOFP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-GI-NOFP16-NEXT: .LBB12_1: // %loop
|
||||
; CHECK-GI-NOFP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-GI-NOFP16-NEXT: ldr d0, [x0, x8]
|
||||
; CHECK-GI-NOFP16-NEXT: fmov s1, w9
|
||||
@ -429,7 +413,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NOFP16-NEXT: fcvt h0, s0
|
||||
; CHECK-GI-NOFP16-NEXT: fmov w9, s0
|
||||
; CHECK-GI-NOFP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-GI-NOFP16-NEXT: b.ne .LBB12_1
|
||||
; CHECK-GI-NOFP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
|
||||
; CHECK-GI-NOFP16-NEXT: ret
|
||||
@ -438,7 +422,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-FP16: // %bb.0: // %entry
|
||||
; CHECK-GI-FP16-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-GI-FP16-NEXT: mov x8, xzr
|
||||
; CHECK-GI-FP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-GI-FP16-NEXT: .LBB12_1: // %loop
|
||||
; CHECK-GI-FP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-GI-FP16-NEXT: ldr d1, [x0, x8]
|
||||
; CHECK-GI-FP16-NEXT: add x8, x8, #8
|
||||
@ -446,7 +430,7 @@ define half @fadd_reduction_v4f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-FP16-NEXT: faddp v1.4h, v1.4h, v1.4h
|
||||
; CHECK-GI-FP16-NEXT: faddp h1, v1.2h
|
||||
; CHECK-GI-FP16-NEXT: fadd h0, h1, h0
|
||||
; CHECK-GI-FP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-GI-FP16-NEXT: b.ne .LBB12_1
|
||||
; CHECK-GI-FP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-GI-FP16-NEXT: ret
|
||||
entry:
|
||||
@ -475,7 +459,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-NOFP16: // %bb.0: // %entry
|
||||
; CHECK-SD-NOFP16-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-SD-NOFP16-NEXT: mov x8, xzr
|
||||
; CHECK-SD-NOFP16-NEXT: .LBB14_1: // %loop
|
||||
; CHECK-SD-NOFP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-SD-NOFP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-SD-NOFP16-NEXT: ldr q1, [x0, x8]
|
||||
; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
|
||||
@ -505,7 +489,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-NOFP16-NEXT: fadd s2, s2, s3
|
||||
; CHECK-SD-NOFP16-NEXT: fadd s0, s2, s0
|
||||
; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
|
||||
; CHECK-SD-NOFP16-NEXT: b.ne .LBB14_1
|
||||
; CHECK-SD-NOFP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-SD-NOFP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-SD-NOFP16-NEXT: ret
|
||||
;
|
||||
@ -513,7 +497,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-FP16: // %bb.0: // %entry
|
||||
; CHECK-SD-FP16-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-SD-FP16-NEXT: mov x8, xzr
|
||||
; CHECK-SD-FP16-NEXT: .LBB14_1: // %loop
|
||||
; CHECK-SD-FP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-SD-FP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-SD-FP16-NEXT: ldr q1, [x0, x8]
|
||||
; CHECK-SD-FP16-NEXT: add x8, x8, #8
|
||||
@ -522,7 +506,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-SD-FP16-NEXT: faddp v1.8h, v2.8h, v1.8h
|
||||
; CHECK-SD-FP16-NEXT: faddp h1, v1.2h
|
||||
; CHECK-SD-FP16-NEXT: fadd h0, h1, h0
|
||||
; CHECK-SD-FP16-NEXT: b.ne .LBB14_1
|
||||
; CHECK-SD-FP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-SD-FP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-SD-FP16-NEXT: ret
|
||||
;
|
||||
@ -530,7 +514,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-NOFP16: // %bb.0: // %entry
|
||||
; CHECK-GI-NOFP16-NEXT: mov x8, xzr
|
||||
; CHECK-GI-NOFP16-NEXT: mov w9, #0 // =0x0
|
||||
; CHECK-GI-NOFP16-NEXT: .LBB14_1: // %loop
|
||||
; CHECK-GI-NOFP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-GI-NOFP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-GI-NOFP16-NEXT: ldr q0, [x0, x8]
|
||||
; CHECK-GI-NOFP16-NEXT: add x8, x8, #8
|
||||
@ -547,7 +531,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s1
|
||||
; CHECK-GI-NOFP16-NEXT: fcvt h0, s0
|
||||
; CHECK-GI-NOFP16-NEXT: fmov w9, s0
|
||||
; CHECK-GI-NOFP16-NEXT: b.ne .LBB14_1
|
||||
; CHECK-GI-NOFP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-GI-NOFP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
|
||||
; CHECK-GI-NOFP16-NEXT: ret
|
||||
@ -556,7 +540,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-FP16: // %bb.0: // %entry
|
||||
; CHECK-GI-FP16-NEXT: movi d0, #0000000000000000
|
||||
; CHECK-GI-FP16-NEXT: mov x8, xzr
|
||||
; CHECK-GI-FP16-NEXT: .LBB14_1: // %loop
|
||||
; CHECK-GI-FP16-NEXT: .LBB13_1: // %loop
|
||||
; CHECK-GI-FP16-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-GI-FP16-NEXT: ldr q1, [x0, x8]
|
||||
; CHECK-GI-FP16-NEXT: add x8, x8, #8
|
||||
@ -565,7 +549,7 @@ define half @fadd_reduction_v8f16_in_loop(ptr %ptr.start) {
|
||||
; CHECK-GI-FP16-NEXT: faddp v1.8h, v2.8h, v1.8h
|
||||
; CHECK-GI-FP16-NEXT: faddp h1, v1.2h
|
||||
; CHECK-GI-FP16-NEXT: fadd h0, h1, h0
|
||||
; CHECK-GI-FP16-NEXT: b.ne .LBB14_1
|
||||
; CHECK-GI-FP16-NEXT: b.ne .LBB13_1
|
||||
; CHECK-GI-FP16-NEXT: // %bb.2: // %exit
|
||||
; CHECK-GI-FP16-NEXT: ret
|
||||
entry:
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user