Add PowerPC/AIX related release notes to LLVM 21.1.0
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@ -1131,9 +1131,19 @@ CUDA/HIP Language Changes
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CUDA Support
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CUDA Support
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^^^^^^^^^^^^
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^^^^^^^^^^^^
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PowerPC Support
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^^^^^^^^^^^^^^^
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* Add `__dmr1024` type for Dense Math Facility.
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* Add prototype for Dense Math Facility integer calculation builtins.
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AIX Support
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AIX Support
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^^^^^^^^^^^
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^^^^^^^^^^^
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* Fixed `-print-runtime-dir` to fallback to the target subdirectory (rather than OS subdirectory) if the runtime path is not found.
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* Fixed `-print-runtime-dir` to find the correct runtime path if the triple has "unknown" as the environment component.
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* Changed AIX targets to use the per-target runtime directories for compiler runtimes (i.e. `lib/clang/20/lib/aix` became `lib/clang/21/lib/powerpc-ibm-aix` and `clang/21/lib/powerpc64-ibm-aix`).
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NetBSD Support
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NetBSD Support
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^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^
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@ -159,6 +159,18 @@ Changes to the MIPS Backend
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Changes to the PowerPC Backend
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Changes to the PowerPC Backend
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------------------------------
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------------------------------
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* Add spill and restore for DMR and DMRp registers.
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* Prototype various Dense Math Facility instructions, and intrinsics for basic enablement, insert/extract, integer and FP calculations.
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* Add prototype for Dense Math Facility cryptography instructions.
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* Implement load/stores prototype for v1024i1, v2048i1.
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* Support conversion between f16 and f128.
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* Change default for auto gen stxvp for cpu=future.
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* Setup initial JITLink build support for XCOFF.
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* Add an API to derive the default feature set from a CPU name within the TargetParser
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(e.g. `pwr10` -> `+vsx`,`+isa3_1`,`+mma`). Clang now uses this to populate the `target-feature`
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list when `-mcpu` is provided for PowerPC.
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* Various bug fixes and codegen improvements.
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Changes to the RISC-V Backend
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Changes to the RISC-V Backend
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-----------------------------
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-----------------------------
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@ -220,6 +232,7 @@ Changes to the RISC-V Backend
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* Removed -mattr=+no-rvc-hints that could be used to disable parsing and generation of RVC hints.
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* Removed -mattr=+no-rvc-hints that could be used to disable parsing and generation of RVC hints.
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* Adds assembler support for the Andes `XAndesvsintload` (Andes Vector INT4 Load extension).
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* Adds assembler support for the Andes `XAndesvsintload` (Andes Vector INT4 Load extension).
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* Adds assembler support for the Andes `XAndesbfhcvt` (Andes Scalar BFLOAT16 Conversion extension).
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* Adds assembler support for the Andes `XAndesbfhcvt` (Andes Scalar BFLOAT16 Conversion extension).
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* Add combine for shadd family of instructions.
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Changes to the WebAssembly Backend
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Changes to the WebAssembly Backend
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----------------------------------
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----------------------------------
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@ -352,6 +365,11 @@ Other Changes
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communication with the distributor.
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communication with the distributor.
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([#47468](https://github.com/llvm/llvm-project/issues/47468)).
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([#47468](https://github.com/llvm/llvm-project/issues/47468)).
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Changes to the Profile Runtime
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---------------------
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* On AIX, avoid using mmap when reading profile files from a non-local filesystem.
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External Open Source Projects Using LLVM {{env.config.release}}
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External Open Source Projects Using LLVM {{env.config.release}}
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===============================================================
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===============================================================
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