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[X86] Qualify the RMW INC/DEC patterns with NotSlowIncDec.

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We were suppressing most uses of INC/DEC, but this one seems to have been missed.

llvm-svn: 311828
This commit is contained in:
Craig Topper 2017-08-26 06:24:25 +00:00
parent 08089e5201
commit 69ec201848
2 changed files with 6 additions and 6 deletions
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4
llvm/lib/Target/X86/X86InstrArithmetic.td
View File

@ -481,7 +481,7 @@ def INC32r_alt : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
} // CodeSize = 1, hasSideEffects = 0
} // Constraints = "$src1 = $dst", SchedRW
let CodeSize = 2, SchedRW = [WriteALULd, WriteRMW] in {
let CodeSize = 2, SchedRW = [WriteALULd, WriteRMW], Predicates = [NotSlowIncDec] in {
def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b}\t$dst",
[(store (add (loadi8 addr:$dst), 1), addr:$dst),
(implicit EFLAGS)], IIC_UNARY_MEM>;
@ -528,7 +528,7 @@ def DEC32r_alt : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
} // Constraints = "$src1 = $dst", SchedRW
let CodeSize = 2, SchedRW = [WriteALULd, WriteRMW] in {
let CodeSize = 2, SchedRW = [WriteALULd, WriteRMW], Predicates = [NotSlowIncDec] in {
def DEC8m : I<0xFE, MRM1m, (outs), (ins i8mem :$dst), "dec{b}\t$dst",
[(store (add (loadi8 addr:$dst), -1), addr:$dst),
(implicit EFLAGS)], IIC_UNARY_MEM>;

8
llvm/test/DebugInfo/COFF/register-variables.ll
View File

@ -46,7 +46,7 @@
; ASM: [[after_inc_eax:\.Ltmp.*]]:
; ASM: #DEBUG_VALUE: inlineinc:b <- %EAX
; ASM: #DEBUG_VALUE: b <- %EAX
; ASM: incl x(%rip)
; ASM: addl $1, x(%rip)
; ASM: [[after_if:\.Ltmp.*]]:
; ASM: .LBB0_2: # %if.else
; ASM: #DEBUG_VALUE: f:p <- %ESI
@ -104,7 +104,7 @@
; OBJ: LocalVariableAddrRange {
; OBJ: OffsetStart: .text+0x7
; OBJ: ISectStart: 0x0
; OBJ: Range: 0x19
; OBJ: Range: 0x1A
; OBJ: }
; OBJ: }
; OBJ: LocalSym {
@ -146,7 +146,7 @@
; OBJ: MayHaveNoName: 0
; OBJ: OffsetStart: .text+0x13
; OBJ: ISectStart: 0x0
; OBJ: Range: 0x6
; OBJ: Range: 0x7
; OBJ: }
; OBJ: }
; OBJ: InlineSiteSym {
@ -180,7 +180,7 @@
; OBJ: LocalVariableAddrRange {
; OBJ: OffsetStart: .text+0x13
; OBJ: ISectStart: 0x0
; OBJ: Range: 0x6
; OBJ: Range: 0x7
; OBJ: }
; OBJ: }
; OBJ: InlineSiteEnd {