[SelectionDAG] make INLINEASM_BR use MachineBasicBlocks instead of BlockAddresses
As part of re-architecting callbr to no longer use blockaddresses (https://reviews.llvm.org/D129288), we don't really need them in MIR. They make comparing MachineBasicBlocks of indirect targets during MachineVerifier a PITA. Suggested by @efriedma from the discussion: https://reviews.llvm.org/D130290#3669531 Reviewed By: efriedma, void Differential Revision: https://reviews.llvm.org/D130316
This commit is contained in:
Nick Desaulniers
parent
1c9f0408bc
commit
6b0e2fa6f0
@ -4171,8 +4171,6 @@ public:
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unsigned getNumSuccessors() const { return getNumIndirectDests() + 1; }
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BlockAddress *getBlockAddressForIndirectDest(unsigned DestNo) const;
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// Methods for support type inquiry through isa, cast, and dyn_cast:
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static bool classof(const Instruction *I) {
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return (I->getOpcode() == Instruction::CallBr);
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@ -3008,6 +3008,7 @@ void SelectionDAGBuilder::visitCallBr(const CallBrInst &I) {
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MachineBasicBlock *Target = FuncInfo.MBBMap[Dest];
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Target->setIsInlineAsmBrIndirectTarget();
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Target->setMachineBlockAddressTaken();
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Target->setLabelMustBeEmitted();
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// Don't add duplicate machine successors.
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if (Dests.insert(Dest).second)
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addSuccessorWithProb(CallBrMBB, Target, BranchProbability::getZero());
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@ -5369,11 +5369,7 @@ TargetLowering::ParseConstraints(const DataLayout &DL,
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OpInfo.CallOperandVal = Call.getArgOperand(ArgNo);
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break;
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case InlineAsm::isLabel:
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OpInfo.CallOperandVal =
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cast<CallBrInst>(&Call)->getBlockAddressForIndirectDest(LabelNo);
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OpInfo.ConstraintVT =
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getAsmOperandValueType(DL, OpInfo.CallOperandVal->getType())
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.getSimpleVT();
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OpInfo.CallOperandVal = cast<CallBrInst>(&Call)->getIndirectDest(LabelNo);
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++LabelNo;
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continue;
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case InlineAsm::isClobber:
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@ -960,12 +960,6 @@ void CallBrInst::init(FunctionType *FTy, Value *Fn, BasicBlock *Fallthrough,
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setName(NameStr);
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}
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BlockAddress *
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CallBrInst::getBlockAddressForIndirectDest(unsigned DestNo) const {
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return BlockAddress::get(const_cast<Function *>(getFunction()),
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getIndirectDest(DestNo));
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}
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CallBrInst::CallBrInst(const CallBrInst &CBI)
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: CallBase(CBI.Attrs, CBI.FTy, CBI.getType(), Instruction::CallBr,
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OperandTraits<CallBase>::op_end(this) - CBI.getNumOperands(),
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@ -55995,9 +55995,9 @@ void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
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// In any sort of PIC mode addresses need to be computed at runtime by
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// adding in a register or some sort of table lookup. These can't
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// be used as immediates. BlockAddresses are fine though.
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// be used as immediates. BlockAddresses and BasicBlocks are fine though.
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if ((Subtarget.isPICStyleGOT() || Subtarget.isPICStyleStubPIC()) &&
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!isa<BlockAddressSDNode>(Op))
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!(isa<BlockAddressSDNode>(Op) || isa<BasicBlockSDNode>(Op)))
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return;
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// If we are in non-pic codegen mode, we allow the address of a global (with
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@ -5,10 +5,9 @@
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define i32 @test1() {
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; CHECK-LABEL: test1:
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; CHECK: .word b
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; CHECK-NEXT: .word .Ltmp0
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; CHECK-NEXT: .word .LBB0_2
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; CHECK: // %bb.1:
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; CHECK: .Ltmp0:
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; CHECK: .LBB0_2: // %indirect
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; CHECK: .LBB0_2: // Block address taken
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entry:
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callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "!i"()
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to label %cleanup [label %indirect]
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@ -31,9 +30,8 @@ entry:
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if.then:
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; CHECK: .word b
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; CHECK-NEXT: .word .Ltmp2
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; CHECK: .Ltmp2:
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; CHECK-NEXT: .LBB1_3: // %if.end6
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; CHECK-NEXT: .word .LBB1_3
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; CHECK: .LBB1_3: // Block address taken
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callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "!i"()
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to label %if.then4 [label %if.end6]
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@ -48,8 +46,7 @@ if.end6:
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br i1 %phitmp, label %if.end10, label %if.then9
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if.then9:
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; CHECK: .Ltmp4:
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; CHECK-NEXT: .LBB1_5: // %l_yes
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; CHECK: .LBB1_5: // Block address taken
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callbr void asm sideeffect "", "!i"()
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to label %if.end10 [label %l_yes]
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@ -87,8 +87,9 @@ define dso_local signext i32 @ClobberLR_BR(i32 signext %in) #0 {
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; PPC64LE-NEXT: ld r0, 16(r1)
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; PPC64LE-NEXT: mtlr r0
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; PPC64LE-NEXT: blr
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; PPC64LE-NEXT: .Ltmp0: # Block address taken
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; PPC64LE-NEXT: .LBB3_2: # %return_early
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; PPC64LE-NEXT: .LBB3_2: # Block address taken
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; PPC64LE-NEXT: # %return_early
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; PPC64LE-NEXT: # Label of block must be emitted
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; PPC64LE-NEXT: li r3, 0
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; PPC64LE-NEXT: b .LBB3_1
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;
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@ -106,8 +107,9 @@ define dso_local signext i32 @ClobberLR_BR(i32 signext %in) #0 {
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; PPC64BE-NEXT: ld r0, 16(r1)
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; PPC64BE-NEXT: mtlr r0
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; PPC64BE-NEXT: blr
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; PPC64BE-NEXT: .Ltmp0: # Block address taken
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; PPC64BE-NEXT: .LBB3_2: # %return_early
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; PPC64BE-NEXT: .LBB3_2: # Block address taken
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; PPC64BE-NEXT: # %return_early
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; PPC64BE-NEXT: # Label of block must be emitted
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; PPC64BE-NEXT: li r3, 0
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; PPC64BE-NEXT: b .LBB3_1
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entry:
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@ -131,8 +133,9 @@ define dso_local signext i32 @ClobberR5_BR(i32 signext %in) #0 {
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; PPC64LE-NEXT: # %bb.1: # %return
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; PPC64LE-NEXT: extsw r3, r3
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; PPC64LE-NEXT: blr
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; PPC64LE-NEXT: .Ltmp1: # Block address taken
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; PPC64LE-NEXT: .LBB4_2: # %return_early
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; PPC64LE-NEXT: .LBB4_2: # Block address taken
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; PPC64LE-NEXT: # %return_early
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; PPC64LE-NEXT: # Label of block must be emitted
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; PPC64LE-NEXT: li r3, 0
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; PPC64LE-NEXT: extsw r3, r3
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; PPC64LE-NEXT: blr
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@ -145,8 +148,9 @@ define dso_local signext i32 @ClobberR5_BR(i32 signext %in) #0 {
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; PPC64BE-NEXT: # %bb.1: # %return
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; PPC64BE-NEXT: extsw r3, r3
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; PPC64BE-NEXT: blr
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; PPC64BE-NEXT: .Ltmp1: # Block address taken
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; PPC64BE-NEXT: .LBB4_2: # %return_early
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; PPC64BE-NEXT: .LBB4_2: # Block address taken
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; PPC64BE-NEXT: # %return_early
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; PPC64BE-NEXT: # Label of block must be emitted
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; PPC64BE-NEXT: li r3, 0
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; PPC64BE-NEXT: extsw r3, r3
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; PPC64BE-NEXT: blr
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@ -6,7 +6,6 @@
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; output from SelectionDAG.
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; CHECK: t0: ch = EntryToken
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; CHECK-NEXT: t16: i64 = BlockAddress<@test, %fail> 0
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; CHECK-NEXT: t4: i32,ch = CopyFromReg t0, Register:i32 %3
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; CHECK-NEXT: t10: i32 = add t4, Constant:i32<1>
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; CHECK-NEXT: t12: ch = CopyToReg t0, Register:i32 %0, t10
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@ -17,7 +16,7 @@
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; CHECK-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %2
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; CHECK-NEXT: t8: i32 = add t2, Constant:i32<4>
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; CHECK-NEXT: t22: ch,glue = CopyToReg t17, Register:i32 %5, t8
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; CHECK-NEXT: t30: ch,glue = inlineasm_br t22, TargetExternalSymbol:i64'xorl $0, $0; jmp ${1:l}', MDNode:ch<null>, TargetConstant:i64<0>, TargetConstant:i32<2359305>, Register:i32 %5, TargetConstant:i64<13>, TargetBlockAddress:i64<@test, %fail> 0, TargetConstant:i32<12>, Register:i32 $df, TargetConstant:i32<12>, Register:i16 $fpsw, TargetConstant:i32<12>, Register:i32 $eflags, t22:1
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; CHECK-NEXT: t29: ch,glue = inlineasm_br t22, TargetExternalSymbol:i64'xorl $0, $0; jmp ${1:l}', MDNode:ch<null>, TargetConstant:i64<0>, TargetConstant:i32<2359305>, Register:i32 %5, TargetConstant:i64<13>, BasicBlock:ch<fail 0x{{[0-9a-f]+}}>, TargetConstant:i32<12>, Register:i32 $df, TargetConstant:i32<12>, Register:i16 $fpsw, TargetConstant:i32<12>, Register:i32 $eflags, t22:1
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define i32 @test(i32 %a, i32 %b, i32 %c) {
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entry:
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@ -50,8 +50,9 @@ define i32 @foo(i32 %arg, ptr %arg3) nounwind {
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: # %bb.4: # %bb17
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; CHECK-NEXT: callq widget@PLT
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; CHECK-NEXT: .Ltmp0: # Block address taken
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; CHECK-NEXT: .LBB0_5: # %bb18
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; CHECK-NEXT: .LBB0_5: # Block address taken
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; CHECK-NEXT: # %bb18
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: movw $0, 14(%rbx)
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; CHECK-NEXT: addq $8, %rsp
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; CHECK-NEXT: popq %rbx
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@ -55,8 +55,9 @@ define dso_local void @n(ptr %o, i32 %p, i32 %u) nounwind {
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: jmp .LBB0_9
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; CHECK-NEXT: .Ltmp0: # Block address taken
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; CHECK-NEXT: # %bb.7: # %if.then20.critedge
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; CHECK-NEXT: .LBB0_7: # Block address taken
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; CHECK-NEXT: # %if.then20.critedge
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: movl j(%rip), %edi
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; CHECK-NEXT: movslq %eax, %rcx
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; CHECK-NEXT: movl $1, %esi
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@ -8,10 +8,11 @@ define i32 @duplicate_normal_and_indirect_dest(i32 %a) {
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; CHECK-NEXT: addl $4, %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: jmp .Ltmp0
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; CHECK-NEXT: jmp .LBB0_1
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .Ltmp0: # Block address taken
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; CHECK-NEXT: # %bb.1: # %fail
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; CHECK-NEXT: .LBB0_1: # Block address taken
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; CHECK-NEXT: # %fail
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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entry:
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@ -29,13 +30,14 @@ define i32 @duplicate_indirect_dest(i32 %a) {
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; CHECK-NEXT: addl $4, %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: jmp .Ltmp1
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; CHECK-NEXT: jmp .Ltmp1
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; CHECK-NEXT: jmp .LBB1_2
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; CHECK-NEXT: jmp .LBB1_2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: # %bb.1: # %normal
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; CHECK-NEXT: retl
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; CHECK-NEXT: .Ltmp1: # Block address taken
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; CHECK-NEXT: .LBB1_2: # %fail
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; CHECK-NEXT: .LBB1_2: # Block address taken
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; CHECK-NEXT: # %fail
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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entry:
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@ -33,11 +33,11 @@ define i64 @early_ioremap_pmd(i64 %addr) {
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; CHECK-NEXT: andl $511, %eax # imm = 0x1FF
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; CHECK-NEXT: leaq (%rdx,%rax,8), %rax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: jmp .Ltmp1
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; CHECK-NEXT: .Ltmp2:
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; CHECK-NEXT: jmp .Ltmp3
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; CHECK-NEXT: .Ltmp4:
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; CHECK-NEXT: .zero (-(((.Ltmp5-.Ltmp6)-(.Ltmp4-.Ltmp2))>0))*((.Ltmp5-.Ltmp6)-(.Ltmp4-.Ltmp2)),144
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; CHECK-NEXT: .Ltmp7:
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; CHECK-NEXT: .zero (-(((.Ltmp3-.Ltmp4)-(.Ltmp2-.Ltmp0))>0))*((.Ltmp3-.Ltmp4)-(.Ltmp2-.Ltmp0)),144
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; CHECK-NEXT: .Ltmp5:
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entry:
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%0 = tail call i64 asm sideeffect "mov %cr3,$0\0A\09", "=r,=*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) nonnull @__force_order)
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%and.i = and i64 %0, 9223372036854771712
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@ -3,9 +3,10 @@
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define i32 @test1(i32 %x) {
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; CHECK-LABEL: test1:
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; CHECK: .quad .Ltmp0
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; CHECK-NEXT: .quad .Ltmp1
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; CHECK: .Ltmp1:
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; CHECK-NEXT: # %bb.1: # %bar
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; CHECK-NEXT: .quad .LBB0_1
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; CHECK: .LBB0_1: # Block address taken
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; CHECK-NEXT: # %bar
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: callq foo
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: # %bb.2: # %baz
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@ -17,12 +17,12 @@
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; Check the second INLINEASM_BR target block is preceded by the block with the
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; second INLINEASM_BR.
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; CHECK: bb.2 (%ir-block.7, machine-block-address-taken, ir-block-address-taken %ir-block.7, inlineasm-br-indirect-target):
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; CHECK: bb.2 (%ir-block.7, machine-block-address-taken, inlineasm-br-indirect-target):
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; CHECK-NEXT: predecessors: %bb.1
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; Check the first INLINEASM_BR target block is predecessed by the block with
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; the first INLINEASM_BR.
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; CHECK: bb.4 (%ir-block.11, machine-block-address-taken, ir-block-address-taken %ir-block.11, inlineasm-br-indirect-target):
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; CHECK: bb.4 (%ir-block.11, machine-block-address-taken, inlineasm-br-indirect-target):
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; CHECK-NEXT: predecessors: %bb.0
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@.str = private unnamed_addr constant [26 x i8] c"inline asm#1 returned %d\0A\00", align 1
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@ -10,12 +10,13 @@ define i32 @test1(i32 %x) {
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; CHECK-NEXT: addl $4, %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: jmp .Ltmp0
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; CHECK-NEXT: jmp .LBB0_2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: # %bb.1: # %normal
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; CHECK-NEXT: retl
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; CHECK-NEXT: .Ltmp0: # Block address taken
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; CHECK-NEXT: .LBB0_2: # %abnormal
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; CHECK-NEXT: .LBB0_2: # Block address taken
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; CHECK-NEXT: # %abnormal
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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entry:
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@ -48,27 +49,29 @@ define i32 @test2(i32 %out1, i32 %out2) {
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; CHECK-NEXT: #APP
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; CHECK-NEXT: testl %esi, %esi
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; CHECK-NEXT: testl %edi, %esi
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; CHECK-NEXT: jne .Ltmp1
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; CHECK-NEXT: jne .LBB1_4
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: jmp .LBB1_3
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; CHECK-NEXT: .LBB1_2: # %if.else
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; CHECK-NEXT: #APP
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; CHECK-NEXT: testl %esi, %edi
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; CHECK-NEXT: testl %esi, %edi
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; CHECK-NEXT: jne .Ltmp2
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; CHECK-NEXT: jne .LBB1_5
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .LBB1_3:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: addl %edi, %eax
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; CHECK-NEXT: .Ltmp2: # Block address taken
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; CHECK-NEXT: .LBB1_5: # %return
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; CHECK-NEXT: .LBB1_5: # Block address taken
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; CHECK-NEXT: # %return
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: retl
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; CHECK-NEXT: .Ltmp1: # Block address taken
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; CHECK-NEXT: .LBB1_4: # %label_true
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; CHECK-NEXT: .LBB1_4: # Block address taken
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; CHECK-NEXT: # %label_true
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: .cfi_def_cfa_offset 12
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; CHECK-NEXT: movl $-2, %eax
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; CHECK-NEXT: jmp .LBB1_5
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@ -131,8 +134,9 @@ define i32 @test3(i1 %cmp) {
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: retl
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; CHECK-NEXT: .Ltmp3: # Block address taken
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; CHECK-NEXT: .LBB2_6: # %indirect
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; CHECK-NEXT: .LBB2_6: # Block address taken
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; CHECK-NEXT: # %indirect
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; CHECK-NEXT: # Label of block must be emitted
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; CHECK-NEXT: .cfi_def_cfa_offset 12
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: jmp .LBB2_5
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@ -163,23 +167,25 @@ define i32 @test4(i32 %out1, i32 %out2) {
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; CHECK-NEXT: #APP
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; CHECK-NEXT: testl %ecx, %ecx
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; CHECK-NEXT: testl %edx, %ecx
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; CHECK-NEXT: jne .Ltmp4
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; CHECK-NEXT: jne .LBB3_3
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: # %bb.1: # %asm.fallthrough
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; CHECK-NEXT: #APP
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; CHECK-NEXT: testl %ecx, %edx
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; CHECK-NEXT: testl %ecx, %edx
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; CHECK-NEXT: jne .Ltmp5
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; CHECK-NEXT: jne .LBB3_4
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; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.2: # %asm.fallthrough2
|
||||
; CHECK-NEXT: addl %edx, %ecx
|
||||
; CHECK-NEXT: movl %ecx, %eax
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: .Ltmp4: # Block address taken
|
||||
; CHECK-NEXT: .LBB3_3: # %label_true
|
||||
; CHECK-NEXT: .LBB3_3: # Block address taken
|
||||
; CHECK-NEXT: # %label_true
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: movl $-2, %eax
|
||||
; CHECK-NEXT: .Ltmp5: # Block address taken
|
||||
; CHECK-NEXT: .LBB3_4: # %return
|
||||
; CHECK-NEXT: .LBB3_4: # Block address taken
|
||||
; CHECK-NEXT: # %return
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "=r,=r,r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %out1)
|
||||
@ -214,8 +220,8 @@ define dso_local void @test5() {
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: .Ltmp6: # Block address taken
|
||||
; CHECK-NEXT: # %bb.1:
|
||||
; CHECK-NEXT: .LBB4_1: # Block address taken
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: retl
|
||||
%1 = call i32 @llvm.read_register.i32(metadata !3)
|
||||
%2 = callbr i32 asm "", "={esp},!i,{esp},~{dirflag},~{fpsr},~{flags}"(i32 %1)
|
||||
|
||||
@ -16,9 +16,10 @@ define void @test1(ptr %arg, ptr %mem) nounwind {
|
||||
; CHECK-NEXT: pushq %rbx
|
||||
; CHECK-NEXT: pushq %rax
|
||||
; CHECK-NEXT: movq %rsi, %r14
|
||||
; CHECK-NEXT: .Ltmp0: # Block address taken
|
||||
; CHECK-NEXT: .LBB0_1: # %loop
|
||||
; CHECK-NEXT: .LBB0_1: # Block address taken
|
||||
; CHECK-NEXT: # %loop
|
||||
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: movq (%r14), %rbx
|
||||
; CHECK-NEXT: callq foo@PLT
|
||||
; CHECK-NEXT: movq %rbx, %rdi
|
||||
|
||||
@ -12,12 +12,12 @@ define void @klist_dec_and_del(%struct1*) {
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: leaq 8(%rdi), %rax
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: # 8(%rdi) .Ltmp0
|
||||
; CHECK-NEXT: # 8(%rdi) .LBB0_1
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.2:
|
||||
; CHECK-NEXT: retq
|
||||
; CHECK-NEXT: .Ltmp0: # Block address taken
|
||||
; CHECK-NEXT: .LBB0_1:
|
||||
; CHECK-NEXT: .LBB0_1: # Block address taken
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: movq $0, -8(%rax)
|
||||
; CHECK-NEXT: retq
|
||||
%2 = getelementptr inbounds %struct1, %struct1* %0, i64 0, i32 1
|
||||
|
||||
@ -12,13 +12,14 @@ define i32 @test1(i32 %a) {
|
||||
; CHECK-NEXT: addl $4, %eax
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: xorl %eax, %eax
|
||||
; CHECK-NEXT: jmp .Ltmp0
|
||||
; CHECK-NEXT: jmp .LBB0_2
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.1: # %normal
|
||||
; CHECK-NEXT: xorl %eax, %eax
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: .Ltmp0: # Block address taken
|
||||
; CHECK-NEXT: .LBB0_2: # %fail
|
||||
; CHECK-NEXT: .LBB0_2: # Block address taken
|
||||
; CHECK-NEXT: # %fail
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: movl $1, %eax
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
@ -41,14 +42,15 @@ define i32 @test1b(i32 %a) {
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-EMPTY:
|
||||
; CHECK-NEXT: xorl %eax, %eax
|
||||
; CHECK-NEXT: jmp .Ltmp1
|
||||
; CHECK-NEXT: jmp .LBB1_2
|
||||
; CHECK-EMPTY:
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.1: # %normal
|
||||
; CHECK-NEXT: xorl %eax, %eax
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: .Ltmp1: # Block address taken
|
||||
; CHECK-NEXT: .LBB1_2: # %fail
|
||||
; CHECK-NEXT: .LBB1_2: # Block address taken
|
||||
; CHECK-NEXT: # %fail
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: movl $1, %eax
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
@ -89,43 +91,47 @@ fail:
|
||||
define i32 @test3(i32 %a) {
|
||||
; CHECK-LABEL: test3:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: .Ltmp2: # Block address taken
|
||||
; CHECK-NEXT: .LBB3_1: # %label01
|
||||
; CHECK-NEXT: .LBB3_1: # Block address taken
|
||||
; CHECK-NEXT: # %label01
|
||||
; CHECK-NEXT: # =>This Loop Header: Depth=1
|
||||
; CHECK-NEXT: # Child Loop BB3_2 Depth 2
|
||||
; CHECK-NEXT: # Child Loop BB3_3 Depth 3
|
||||
; CHECK-NEXT: # Child Loop BB3_4 Depth 4
|
||||
; CHECK-NEXT: .Ltmp3: # Block address taken
|
||||
; CHECK-NEXT: .LBB3_2: # %label02
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: .LBB3_2: # Block address taken
|
||||
; CHECK-NEXT: # %label02
|
||||
; CHECK-NEXT: # Parent Loop BB3_1 Depth=1
|
||||
; CHECK-NEXT: # => This Loop Header: Depth=2
|
||||
; CHECK-NEXT: # Child Loop BB3_3 Depth 3
|
||||
; CHECK-NEXT: # Child Loop BB3_4 Depth 4
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: addl $4, {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: .Ltmp4: # Block address taken
|
||||
; CHECK-NEXT: .LBB3_3: # %label03
|
||||
; CHECK-NEXT: .LBB3_3: # Block address taken
|
||||
; CHECK-NEXT: # %label03
|
||||
; CHECK-NEXT: # Parent Loop BB3_1 Depth=1
|
||||
; CHECK-NEXT: # Parent Loop BB3_2 Depth=2
|
||||
; CHECK-NEXT: # => This Loop Header: Depth=3
|
||||
; CHECK-NEXT: # Child Loop BB3_4 Depth 4
|
||||
; CHECK-NEXT: .Ltmp5: # Block address taken
|
||||
; CHECK-NEXT: .LBB3_4: # %label04
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: .LBB3_4: # Block address taken
|
||||
; CHECK-NEXT: # %label04
|
||||
; CHECK-NEXT: # Parent Loop BB3_1 Depth=1
|
||||
; CHECK-NEXT: # Parent Loop BB3_2 Depth=2
|
||||
; CHECK-NEXT: # Parent Loop BB3_3 Depth=3
|
||||
; CHECK-NEXT: # => This Inner Loop Header: Depth=4
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: jmp .Ltmp2
|
||||
; CHECK-NEXT: jmp .Ltmp3
|
||||
; CHECK-NEXT: jmp .Ltmp4
|
||||
; CHECK-NEXT: jmp .LBB3_1
|
||||
; CHECK-NEXT: jmp .LBB3_2
|
||||
; CHECK-NEXT: jmp .LBB3_3
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.5: # %normal0
|
||||
; CHECK-NEXT: # in Loop: Header=BB3_4 Depth=4
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: jmp .Ltmp2
|
||||
; CHECK-NEXT: jmp .Ltmp3
|
||||
; CHECK-NEXT: jmp .Ltmp4
|
||||
; CHECK-NEXT: jmp .Ltmp5
|
||||
; CHECK-NEXT: jmp .LBB3_1
|
||||
; CHECK-NEXT: jmp .LBB3_2
|
||||
; CHECK-NEXT: jmp .LBB3_3
|
||||
; CHECK-NEXT: jmp .LBB3_4
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.6: # %normal1
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
@ -165,14 +171,15 @@ define void @test4() {
|
||||
; CHECK-LABEL: test4:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: ja .Ltmp6
|
||||
; CHECK-NEXT: ja .LBB4_3
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.1: # %asm.fallthrough
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: ja .Ltmp6
|
||||
; CHECK-NEXT: ja .LBB4_3
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: .Ltmp6: # Block address taken
|
||||
; CHECK-NEXT: .LBB4_3: # %quux
|
||||
; CHECK-NEXT: .LBB4_3: # Block address taken
|
||||
; CHECK-NEXT: # %quux
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
callbr void asm sideeffect "ja $0", "!i,~{dirflag},~{fpsr},~{flags}"()
|
||||
|
||||
@ -26,13 +26,14 @@ define void @x() {
|
||||
; CHECK-LABEL: x:
|
||||
; CHECK: ## %bb.0:
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: ## Ltmp0
|
||||
; CHECK-NEXT: ## LBB1_1
|
||||
; CHECK-EMPTY:
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: ## %bb.2: ## %return
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: Ltmp0: ## Block address taken
|
||||
; CHECK-NEXT: LBB1_1: ## %overflow
|
||||
; CHECK-NEXT: ## Label of block must be emitted
|
||||
; CHECK-NEXT: retl
|
||||
callbr void asm "# ${0:l}\0A", "!i"()
|
||||
to label %return [label %overflow]
|
||||
|
||||
@ -20,7 +20,7 @@ define i32 @test1(i32 %v) {
|
||||
; CHECK-NEXT: # %bb.1: # %if.end
|
||||
; CHECK-NEXT: callq fn
|
||||
; CHECK-NEXT: #APP
|
||||
; CHECK-NEXT: # jump to .Ltmp0
|
||||
; CHECK-NEXT: # jump to .LBB0_4
|
||||
; CHECK-NEXT: #NO_APP
|
||||
; CHECK-NEXT: # %bb.2: # %return
|
||||
; CHECK-NEXT: movl $4, %eax
|
||||
@ -33,8 +33,9 @@ define i32 @test1(i32 %v) {
|
||||
; CHECK-NEXT: popq %rcx
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
||||
; CHECK-NEXT: retq
|
||||
; CHECK-NEXT: .Ltmp0: # Block address taken
|
||||
; CHECK-NEXT: .LBB0_4: # %two
|
||||
; CHECK-NEXT: .LBB0_4: # Block address taken
|
||||
; CHECK-NEXT: # %two
|
||||
; CHECK-NEXT: # Label of block must be emitted
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-NEXT: popq %rax
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
||||
|
||||
@ -35,10 +35,10 @@ define ptr @test1(ptr %arg1, ptr %arg2) {
|
||||
; CHECK-NEXT: successors: %bb.5(0x80000000), %bb.4(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY]], %bb.2, [[MOV64rm]], %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"#$0 $1 $2", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42, 13 /* imm */, 0, 13 /* imm */, blockaddress(@test1, %ir-block.bb17.i.i.i), 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
|
||||
; CHECK-NEXT: INLINEASM_BR &"#$0 $1 $2", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42, 13 /* imm */, 0, 13 /* imm */, %bb.4, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
|
||||
; CHECK-NEXT: JMP_1 %bb.5
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.4.bb17.i.i.i (machine-block-address-taken, ir-block-address-taken %ir-block.bb17.i.i.i, inlineasm-br-indirect-target):
|
||||
; CHECK-NEXT: bb.4.bb17.i.i.i (machine-block-address-taken, inlineasm-br-indirect-target):
|
||||
; CHECK-NEXT: successors: %bb.5(0x80000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: {{ $}}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user