From 76cd11f303062bf2e8cdcbe0b4ffbe5ceab7e240 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Fri, 1 Apr 2022 17:47:24 +0100
Subject: [PATCH] [DAG] Add llvm::isMinSignedConstant helper. NFC

Pulled out of D122754
---
 llvm/include/llvm/CodeGen/SelectionDAGNodes.h  | 3 +++
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +++++
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp        | 5 ++---
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index f32d9eeaff6e..6b2491358a3f 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1667,6 +1667,9 @@ bool isAllOnesConstant(SDValue V);
 /// Returns true if \p V is a constant integer one.
 bool isOneConstant(SDValue V);
 
+/// Returns true if \p V is a constant min signed integer value.
+bool isMinSignedConstant(SDValue V);
+
 /// Return the non-bitcasted source operand of \p V if it exists.
 /// If \p V is not a bitcasted value, it is returned as-is.
 SDValue peekThroughBitcasts(SDValue V);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index f8bcf0b0851c..8f3d5fcd5b04 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -10399,6 +10399,11 @@ bool llvm::isOneConstant(SDValue V) {
   return Const != nullptr && Const->isOne();
 }
 
+bool llvm::isMinSignedConstant(SDValue V) {
+  ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
+  return Const != nullptr && Const->isMinSignedValue();
+}
+
 SDValue llvm::peekThroughBitcasts(SDValue V) {
   while (V.getOpcode() == ISD::BITCAST)
     V = V.getOperand(0);
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index f7c365cc7f46..a9fa64e488ee 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2435,9 +2435,8 @@ bool X86DAGToDAGISel::matchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
     // We want to look through a transform in InstCombine that
     // turns 'add' with min_signed_val into 'xor', so we can treat this 'xor'
     // exactly like an 'add'.
-    if (auto *NC1 = dyn_cast<ConstantSDNode>(N.getOperand(1)))
-      if (NC1->isMinSignedValue() && !matchAdd(N, AM, Depth))
-        return false;
+    if (isMinSignedConstant(N.getOperand(1)) && !matchAdd(N, AM, Depth))
+      return false;
     break;
 
   case ISD::AND: {