[LiveRegUnits] Exclude runtime defined liveins when computing liveouts (#154325)
These liveins are not defined by predecessors, so should not be considered as liveouts in predecessor blocks. This resolves: - https://github.com/llvm/llvm-project/pull/149062#discussion_r2285072001 - https://github.com/llvm/llvm-project/pull/153417#issuecomment-3199972351
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Benjamin Maxwell
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@ -553,8 +553,8 @@ public:
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LiveRegI = (*BlockI)->livein_begin();
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if (!advanceToValidPosition())
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return;
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if (LiveRegI->PhysReg == ExceptionPointer ||
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LiveRegI->PhysReg == ExceptionSelector)
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if ((*BlockI)->isEHPad() && (LiveRegI->PhysReg == ExceptionPointer ||
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LiveRegI->PhysReg == ExceptionSelector))
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++(*this);
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}
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}
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@ -91,6 +91,13 @@ static void addBlockLiveIns(LiveRegUnits &LiveUnits,
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LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
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}
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/// Add live-out registers of basic block \p MBB to \p LiveUnits.
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static void addBlockLiveOuts(LiveRegUnits &LiveUnits,
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const MachineBasicBlock &MBB) {
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for (const auto &LI : MBB.liveouts())
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LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
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}
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/// Adds all callee saved registers to \p LiveUnits.
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static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
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const MachineFunction &MF) {
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@ -137,12 +144,8 @@ void LiveRegUnits::addPristines(const MachineFunction &MF) {
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void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
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const MachineFunction &MF = *MBB.getParent();
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addPristines(MF);
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// To get the live-outs we simply merge the live-ins of all successors.
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for (const MachineBasicBlock *Succ : MBB.successors())
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addBlockLiveIns(*this, *Succ);
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addBlockLiveOuts(*this, MBB);
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// For the return block: Add all callee saved registers.
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if (MBB.isReturnBlock()) {
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@ -1781,9 +1781,6 @@ MachineBasicBlock::livein_iterator MachineBasicBlock::livein_begin() const {
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MachineBasicBlock::liveout_iterator MachineBasicBlock::liveout_begin() const {
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const MachineFunction &MF = *getParent();
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assert(MF.getProperties().hasTracksLiveness() &&
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"Liveness information is accurate");
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const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
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MCRegister ExceptionPointer, ExceptionSelector;
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if (MF.getFunction().hasPersonalityFn()) {
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82
llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
Normal file
82
llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
Normal file
@ -0,0 +1,82 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=aarch64 -mattr=+sve -mattr=+sme -run-pass=aarch64-machine-sme-abi -verify-machineinstrs %s -o - | FileCheck %s
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# This test verifies that runtime defined live-ins are not included in the live
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# outs of predecessors in the MachineSMEABIPass, as including them would result
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# in copies of undefined registers.
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--- |
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define void @sme_abi_eh_liveins() "aarch64_inout_za" personality ptr @__gxx_personality_v0 { entry: unreachable }
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declare i32 @__gxx_personality_v0(...)
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...
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---
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name: sme_abi_eh_liveins
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tracksRegLiveness: true
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isSSA: true
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noVRegs: false
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body: |
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; CHECK-LABEL: name: sme_abi_eh_liveins
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.2(0x00000000), %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[RDSVLI_XI:%[0-9]+]]:gpr64 = RDSVLI_XI 1, implicit $vg
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $sp
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; CHECK-NEXT: [[MSUBXrrr:%[0-9]+]]:gpr64 = MSUBXrrr [[RDSVLI_XI]], [[RDSVLI_XI]], [[COPY]]
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; CHECK-NEXT: $sp = COPY [[MSUBXrrr]]
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; CHECK-NEXT: STPXi [[MSUBXrrr]], [[RDSVLI_XI]], %stack.0, 0
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: InOutZAUsePseudo
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY [[ADDXri]]
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; CHECK-NEXT: MSR 56965, [[COPY1]]
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: RequiresZASavePseudo
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: MSRpstatesvcrImm1 2, 1, implicit-def $nzcv
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; CHECK-NEXT: [[MRS:%[0-9]+]]:gpr64 = MRS 56965, implicit-def $nzcv
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; CHECK-NEXT: $x0 = ADDXri %stack.0, 0, 0
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; CHECK-NEXT: RestoreZAPseudo [[MRS]], $x0, &__arm_tpidr2_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x0
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; CHECK-NEXT: MSR 56965, $xzr
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; CHECK-NEXT: B %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1 (landing-pad):
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: MSRpstatesvcrImm1 2, 1, implicit-def $nzcv
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; CHECK-NEXT: [[MRS1:%[0-9]+]]:gpr64 = MRS 56965, implicit-def $nzcv
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; CHECK-NEXT: $x0 = ADDXri %stack.0, 0, 0
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; CHECK-NEXT: RestoreZAPseudo [[MRS1]], $x0, &__arm_tpidr2_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x0
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; CHECK-NEXT: MSR 56965, $xzr
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: InOutZAUsePseudo
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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bb.0:
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successors: %bb.2(0x00000000), %bb.1(0x80000000)
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; Simulate shared ZA call
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ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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InOutZAUsePseudo
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ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
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; Simulate private ZA call at the end of the block
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ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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RequiresZASavePseudo
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ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
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B %bb.2
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bb.1 (landing-pad):
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liveins: $x0, $x1
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; Simulate shared ZA call
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ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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InOutZAUsePseudo
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ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
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bb.2:
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@ -1,9 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -aarch64-new-sme-abi -verify-machineinstrs < %s | FileCheck %s
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; FIXME: XFAILs until https://github.com/llvm/llvm-project/pull/154325
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; XFAIL: *
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; A simple EH test case that corresponds to the following C++ source:
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;
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; struct ZAResource {
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@ -65,16 +62,14 @@ define void @za_with_raii(i1 %fail) "aarch64_inout_za" personality ptr @__gxx_pe
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; CHECK-NEXT: ldr x1, [x1, :got_lo12:typeinfo_for_char_const_ptr]
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; CHECK-NEXT: bl __cxa_throw
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; CHECK-NEXT: .Ltmp1:
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; CHECK-NEXT: mov x8, x0
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; CHECK-NEXT: smstart za
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; CHECK-NEXT: mrs x9, TPIDR2_EL0
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; CHECK-NEXT: mrs x8, TPIDR2_EL0
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; CHECK-NEXT: sub x0, x29, #16
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; CHECK-NEXT: cbnz x9, .LBB0_4
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; CHECK-NEXT: cbnz x8, .LBB0_4
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; CHECK-NEXT: // %bb.3: // %throw_exception
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; CHECK-NEXT: bl __arm_tpidr2_restore
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; CHECK-NEXT: .LBB0_4: // %throw_exception
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; CHECK-NEXT: msr TPIDR2_EL0, xzr
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; CHECK-NEXT: // kill: def $x0 killed $x8
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; CHECK-NEXT: // %bb.5: // %throw_fail
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; CHECK-NEXT: .LBB0_6: // %unwind_dtors
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; CHECK-NEXT: .Ltmp2:
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