[MLIR][AMDGPU] Bump to COV6 (#133849)
We already bump to COV6 by default in the front-end and backend. This PR is for MLIR. Note that COV6 requires ROCm 6.3+.
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@ -186,7 +186,7 @@ def GpuROCDLAttachTarget: Pass<"rocdl-attach-target", ""> {
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/*default=*/"\"\"",
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"Target features.">,
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Option<"abiVersion", "abi", "std::string",
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/*default=*/"\"500\"",
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/*default=*/"\"600\"",
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"ABI version.">,
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Option<"optLevel", "O", "unsigned",
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/*default=*/"2",
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@ -680,7 +680,7 @@ def ROCDL_V2BF16Type : FixedVectorOfLengthAndType<[2], [BF16]>,
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BuildableType<"::mlir::VectorType::get("
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"{2},$_builder.getBF16Type())">;
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// TODO: The word and byte selectors are immarg in LLVM
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// TODO: The word and byte selectors are immarg in LLVM
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// update to be attributes in MLIR
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//===---------------------------------------------------------------------===//
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// 16-bit float intrinsics
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@ -1129,7 +1129,7 @@ def ROCDL_TargetAttr :
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StringRefParameter<"Target chip features.", "\"\"">:$features,
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// Also update the default builder below and rocdl-attach-target in
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// Dialect/GPU/Transforms/Passes.td .
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StringRefParameter<"ABI version.", "\"500\"">:$abi,
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StringRefParameter<"ABI version.", "\"600\"">:$abi,
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OptionalParameter<"DictionaryAttr", "Target specific flags.">:$flags,
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OptionalParameter<"ArrayAttr", "Files to link to the LLVM module.">:$link
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);
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@ -1141,7 +1141,7 @@ def ROCDL_TargetAttr :
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CArg<"StringRef", "\"amdgcn-amd-amdhsa\"">:$triple,
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CArg<"StringRef", "\"gfx900\"">:$chip,
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CArg<"StringRef", "\"\"">:$features,
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CArg<"StringRef", "\"500\"">:$abiVersion,
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CArg<"StringRef", "\"600\"">:$abiVersion,
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CArg<"DictionaryAttr", "nullptr">:$targetFlags,
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CArg<"ArrayAttr", "nullptr">:$linkFiles), [{
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return Base::get($_ctxt, optLevel, triple, chip, features, abiVersion,
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@ -234,8 +234,8 @@ ROCDLTargetAttr::verify(function_ref<InFlightDiagnostic()> emitError,
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emitError() << "The target chip cannot be empty.";
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return failure();
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}
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if (abiVersion != "400" && abiVersion != "500") {
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emitError() << "Invalid ABI version, it must be either `400` or `500`.";
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if (abiVersion != "400" && abiVersion != "500" && abiVersion != "600") {
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emitError() << "Invalid ABI version, it must be `400`, `500` or '600'.";
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return failure();
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}
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if (files && !llvm::all_of(files, [](::mlir::Attribute attr) {
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@ -248,7 +248,8 @@ void SerializeGPUModuleBase::addControlVariables(
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controlVariable->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Local);
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};
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int abi = 500;
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// Note that COV6 requires ROCm 6.3+.
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int abi = 600;
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abiVer.getAsInteger(0, abi);
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module.addModuleFlag(llvm::Module::Error, "amdhsa_code_object_version", abi);
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// Return if no device libraries are required.
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@ -765,8 +765,8 @@ llvm.func @rocdl_8bit_floats(%source: i32, %source_half: f16, %source_bfloat: bf
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// CHECK: rocdl.cvt.f32.fp8
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// CHECK: rocdl.cvt.scalef32.f32.bf8
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// CHECK: rocdl.cvt.scalef32.f32.fp8
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// CHECK: rocdl.cvt.scalef32.pk.f16.bf8
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// CHECK: rocdl.cvt.scalef32.pk.f16.fp8
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// CHECK: rocdl.cvt.scalef32.pk.f16.bf8
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// CHECK: rocdl.cvt.scalef32.pk.f16.fp8
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// CHECK: rocdl.cvt.scalef32.pk.bf16.bf8
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// CHECK: rocdl.cvt.scalef32.pk.bf16.fp8
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// CHECK: rocdl.cvt.scalef32.f16.fp8
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@ -900,3 +900,6 @@ gpu.module @module_1 [#rocdl.target<O = 1, chip = "gfx900", abi = "500", link =
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gpu.module @module_2 [#rocdl.target<chip = "gfx900">, #rocdl.target<chip = "gfx90a">] {
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}
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gpu.module @module_3 [#rocdl.target<O = 1, chip = "gfx900", abi = "600", link = ["my_device_lib.bc"], flags = {fast, daz, unsafe_math}>] {
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}
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@ -125,7 +125,7 @@ TEST_F(MLIRTargetLLVMROCDL,
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serializer.serializeToObject(gpuModule, options);
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// Check that the serializer was successful.
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EXPECT_TRUE(StringRef(object->data(), object->size())
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.contains(".amdhsa_code_object_version 5"));
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.contains(".amdhsa_code_object_version 6"));
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}
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}
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