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[PowerPC] remove the ctr clobbers check related to TLS access

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Dynamic tls access model will be lowered to MI which clobbers CTR in
the loop in ISEL(ADDItlsgdLADDR) and post-isel CTR loop pass will revert
the loop to a normal compare + branch form.

So no need to add this clobber check in hardware loop insertion pass now.

Reviewed By: nemanjai

Differential revision: https://reviews.llvm.org/D140367
This commit is contained in:
Chen Zheng 2023-01-05 21:22:18 -05:00
parent 8fd279f7d3
commit 85edf1fc70
2 changed files with 10 additions and 52 deletions
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42
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
View File

@ -339,29 +339,6 @@ InstructionCost PPCTTIImpl::getInstructionCost(const User *U,
return BaseT::getInstructionCost(U, Operands, CostKind);
}
// Determining the address of a TLS variable results in a function call in
// certain TLS models.
static bool memAddrUsesCTR(const Value *MemAddr, const PPCTargetMachine &TM,
SmallPtrSetImpl<const Value *> &Visited) {
// No need to traverse again if we already checked this operand.
if (!Visited.insert(MemAddr).second)
return false;
const auto *GV = dyn_cast<GlobalValue>(MemAddr);
if (!GV) {
// Recurse to check for constants that refer to TLS global variables.
if (const auto *CV = dyn_cast<Constant>(MemAddr))
for (const auto &CO : CV->operands())
if (memAddrUsesCTR(CO, TM, Visited))
return true;
return false;
}
if (!GV->isThreadLocal())
return false;
TLSModel::Model Model = TM.getTLSModel(GV);
return Model == TLSModel::GeneralDynamic || Model == TLSModel::LocalDynamic;
}
bool PPCTTIImpl::isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
AssumptionCache &AC,
TargetLibraryInfo *LibInfo,
@ -415,25 +392,6 @@ bool PPCTTIImpl::isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
}
}
// If an exit block has a PHI that accesses a TLS variable as one of the
// incoming values from the loop, we cannot produce a CTR loop because the
// address for that value will be computed in the loop.
SmallVector<BasicBlock *, 4> ExitBlocks;
L->getExitBlocks(ExitBlocks);
SmallPtrSet<const Value *, 4> Visited;
for (auto &BB : ExitBlocks) {
for (auto &PHI : BB->phis()) {
for (int Idx = 0, EndIdx = PHI.getNumIncomingValues(); Idx < EndIdx;
Idx++) {
const BasicBlock *IncomingBB = PHI.getIncomingBlock(Idx);
const Value *IncomingValue = PHI.getIncomingValue(Idx);
if (L->contains(IncomingBB) &&
memAddrUsesCTR(IncomingValue, TM, Visited))
return false;
}
}
}
LLVMContext &C = L->getHeader()->getContext();
HWLoopInfo.CountType = TM.isPPC64() ?
Type::getInt64Ty(C) : Type::getInt32Ty(C);

20
llvm/test/CodeGen/PowerPC/pr48527.ll
View File

@ -16,15 +16,16 @@ define void @_ZNK1q1rEv() local_unnamed_addr #0 align 2 {
; CHECK-LABEL: _ZNK1q1rEv:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: stdu 1, -64(1)
; CHECK-NEXT: std 0, 80(1)
; CHECK-NEXT: li 29, 0
; CHECK-NEXT: lwz 30, 0(3)
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
; CHECK-NEXT: ld 28, .LC0@toc@l(3)
; CHECK-NEXT: addis 4, 2, .LC0@toc@ha
; CHECK-NEXT: lwz 3, 0(3)
; CHECK-NEXT: ld 29, .LC0@toc@l(4)
; CHECK-NEXT: addi 3, 3, -1
; CHECK-NEXT: clrldi 3, 3, 32
; CHECK-NEXT: addi 30, 3, 1
; CHECK-NEXT: addis 3, 2, aj@got@tlsgd@ha
; CHECK-NEXT: addi 3, 3, aj@got@tlsgd@l
; CHECK-NEXT: bl __tls_get_addr(aj@tlsgd)
@ -33,14 +34,14 @@ define void @_ZNK1q1rEv() local_unnamed_addr #0 align 2 {
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_1: # %monotonic.i
; CHECK-NEXT: #
; CHECK-NEXT: lwz 5, 0(28)
; CHECK-NEXT: lwz 5, 0(29)
; CHECK-NEXT: andi. 5, 5, 255
; CHECK-NEXT: bne 0, .LBB0_4
; CHECK-NEXT: # %bb.2: # %for.cond.i
; CHECK-NEXT: #
; CHECK-NEXT: addi 29, 29, 1
; CHECK-NEXT: cmplw 29, 30
; CHECK-NEXT: bne 0, .LBB0_1
; CHECK-NEXT: addi 30, 30, -1
; CHECK-NEXT: cmpldi 30, 0
; CHECK-NEXT: bc 12, 1, .LBB0_1
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: mr 4, 3
; CHECK-NEXT: .LBB0_4: # %if.end
@ -50,7 +51,6 @@ define void @_ZNK1q1rEv() local_unnamed_addr #0 align 2 {
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
entry: