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[RISCV] Refactor checkRVVTypeSupport to use BuiltinVectorTypeInfo. (#74949)

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We can decompose the type into ElementType and MinSize and use those to
perform the checks. This is more efficient than using isRVVType.

This also fixes a bug that we didn't disallow vbool64_t on Zve32x.
This commit is contained in:
Craig Topper 2023-12-27 21:53:27 -08:00 committed by GitHub
parent 2dccf11b92
commit 98073057ee
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 20 additions and 17 deletions
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21
clang/lib/Sema/SemaChecking.cpp
View File

@ -6170,25 +6170,28 @@ bool Sema::CheckWebAssemblyBuiltinFunctionCall(const TargetInfo &TI,
void Sema::checkRVVTypeSupport(QualType Ty, SourceLocation Loc, Decl *D) {
const TargetInfo &TI = Context.getTargetInfo();
ASTContext::BuiltinVectorTypeInfo Info =
Context.getBuiltinVectorTypeInfo(Ty->castAs<BuiltinType>());
unsigned EltSize = Context.getTypeSize(Info.ElementType);
unsigned MinElts = Info.EC.getKnownMinValue();
// (ELEN, LMUL) pairs of (8, mf8), (16, mf4), (32, mf2), (64, m1) requires at
// least zve64x
if ((Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ false) ||
Ty->isRVVType(/* ElementCount */ 1)) &&
if (((EltSize == 64 && Info.ElementType->isIntegerType()) || MinElts == 1) &&
!TI.hasFeature("zve64x"))
Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve64x";
if (Ty->isRVVType(/* Bitwidth */ 16, /* IsFloat */ true) &&
!TI.hasFeature("zvfh") && !TI.hasFeature("zvfhmin"))
if (Info.ElementType->isFloat16Type() && !TI.hasFeature("zvfh") &&
!TI.hasFeature("zvfhmin"))
Diag(Loc, diag::err_riscv_type_requires_extension, D)
<< Ty << "zvfh or zvfhmin";
// Check if enabled zvfbfmin for BFloat16
if (Ty->isRVVType(/* Bitwidth */ 16, /* IsFloat */ false,
/* IsBFloat */ true) &&
if (Info.ElementType->isBFloat16Type() &&
!TI.hasFeature("experimental-zvfbfmin"))
Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zvfbfmin";
if (Ty->isRVVType(/* Bitwidth */ 32, /* IsFloat */ true) &&
if (Info.ElementType->isSpecificBuiltinType(BuiltinType::Float) &&
!TI.hasFeature("zve32f"))
Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve32f";
if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ true) &&
if (Info.ElementType->isSpecificBuiltinType(BuiltinType::Double) &&
!TI.hasFeature("zve64d"))
Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve64d";
// Given that caller already checked isRVVType() before calling this function,

8
clang/test/Sema/riscv-vector-zve32x-check.c
View File

@ -97,11 +97,3 @@ __rvv_bool32_t vbool32 () { /* expected-error {{RISC-V type '__rvv_bool32_t' req
return b32; /* expected-error {{RISC-V type '__rvv_bool32_t' requires the 'zve32x' extension}} */
}
__rvv_bool64_t vbool64 () { /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve32x' extension}} */
__rvv_bool64_t b64; /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve32x' extension}} */
(void)b64; /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve32x' extension}} */
return b64; /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve32x' extension}} */
}

8
clang/test/Sema/riscv-vector-zve64x-check.c
View File

@ -37,3 +37,11 @@ __rvv_int64m1_t foo64() { /* expected-error {{RISC-V type '__rvv_int64m1_t' requ
return i64m1; /* expected-error {{RISC-V type '__rvv_int64m1_t' requires the 'zve64x' extension}} */
}
__rvv_bool64_t vbool64 () { /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve64x' extension}} */
__rvv_bool64_t b64; /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve64x' extension}} */
(void)b64; /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve64x' extension}} */
return b64; /* expected-error {{RISC-V type '__rvv_bool64_t' requires the 'zve64x' extension}} */
}