[mlir][sparse] add a 3-d block and fiber test (#78529)
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mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
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122
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
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//--------------------------------------------------------------------------------------------------
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// WHEN CREATING A NEW TEST, PLEASE JUST COPY & PASTE WITHOUT EDITS.
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//
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// Set-up that's shared across all tests in this directory. In principle, this
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// config could be moved to lit.local.cfg. However, there are downstream users that
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// do not use these LIT config files. Hence why this is kept inline.
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//
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// DEFINE: %{sparsifier_opts} = enable-runtime-library=true
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// DEFINE: %{sparsifier_opts_sve} = enable-arm-sve=true %{sparsifier_opts}
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// DEFINE: %{compile} = mlir-opt %s --sparsifier="%{sparsifier_opts}"
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// DEFINE: %{compile_sve} = mlir-opt %s --sparsifier="%{sparsifier_opts_sve}"
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// DEFINE: %{run_libs} = -shared-libs=%mlir_c_runner_utils,%mlir_runner_utils
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// DEFINE: %{run_opts} = -e main -entry-point-result=void
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// DEFINE: %{run} = mlir-cpu-runner %{run_opts} %{run_libs}
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// DEFINE: %{run_sve} = %mcr_aarch64_cmd --march=aarch64 --mattr="+sve" %{run_opts} %{run_libs}
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//
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// DEFINE: %{env} =
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//--------------------------------------------------------------------------------------------------
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// RUN: %{compile} | %{run} | FileCheck %s
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//
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// Do the same run, but now with direct IR generation.
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// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true
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// RUN: %{compile} | %{run} | FileCheck %s
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//
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// Do the same run, but now with direct IR generation and vectorization.
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// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true
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// RUN: %{compile} | %{run} | FileCheck %s
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//
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// Do the same run, but now with direct IR generation and VLA vectorization.
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// RUN: %if mlir_arm_sve_tests %{ %{compile_sve} | %{run_sve} | FileCheck %s %}
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#Sparse1 = #sparse_tensor.encoding<{
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map = (i, j, k) -> (
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i : compressed,
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j : compressed,
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k : compressed
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)
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}>
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#Sparse2 = #sparse_tensor.encoding<{
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map = (i, j, k) -> (
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i floordiv 2 : compressed,
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j floordiv 2 : compressed,
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k floordiv 2 : compressed,
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i mod 2 : dense,
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j mod 2 : dense,
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k mod 2 : dense)
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}>
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module {
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//
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// Main driver that tests sparse tensor storage.
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//
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func.func @main() {
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%c0 = arith.constant 0 : index
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%i0 = arith.constant 0 : i32
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// Setup input dense tensor and convert to two sparse tensors.
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%d = arith.constant dense <[
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[ // i=0
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[ 1, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 5, 0 ] ],
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[ // i=1
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[ 2, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 6, 0 ] ],
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[ //i=2
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[ 3, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 7, 0 ] ],
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//i=3
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[ [ 4, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 0, 0 ],
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[ 0, 0, 8, 0 ] ]
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]> : tensor<4x4x4xi32>
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%a = sparse_tensor.convert %d : tensor<4x4x4xi32> to tensor<4x4x4xi32, #Sparse1>
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%b = sparse_tensor.convert %d : tensor<4x4x4xi32> to tensor<4x4x4xi32, #Sparse2>
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//
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// If we store the two "fibers" [1,2,3,4] starting at index (0,0,0) and
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// ending at index (3,0,0) and [5,6,7,8] starting at index (0,3,2) and
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// ending at index (3,3,2)) with a “DCSR-flavored” along (j,k) with
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// dense “fibers” in the i-dim, we end up with 8 stored entries.
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//
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// CHECK: 8
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// CHECK-NEXT: ( 1, 5, 2, 6, 3, 7, 4, 8 )
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//
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%na = sparse_tensor.number_of_entries %a : tensor<4x4x4xi32, #Sparse1>
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vector.print %na : index
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%ma = sparse_tensor.values %a: tensor<4x4x4xi32, #Sparse1> to memref<?xi32>
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%va = vector.transfer_read %ma[%c0], %i0: memref<?xi32>, vector<8xi32>
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vector.print %va : vector<8xi32>
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//
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// If we store full 2x2x2 3-D blocks in the original index order
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// in a compressed fashion, we end up with 4 blocks to incorporate
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// all the nonzeros, and thus 32 stored entries.
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//
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// CHECK: 32
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// CHECK-NEXT: ( 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 5, 0, 0, 0, 6, 0, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 7, 0, 0, 0, 8, 0 )
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//
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%nb = sparse_tensor.number_of_entries %b : tensor<4x4x4xi32, #Sparse2>
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vector.print %nb : index
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%mb = sparse_tensor.values %b: tensor<4x4x4xi32, #Sparse2> to memref<?xi32>
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%vb = vector.transfer_read %mb[%c0], %i0: memref<?xi32>, vector<32xi32>
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vector.print %vb : vector<32xi32>
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// Release the resources.
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bufferization.dealloc_tensor %a : tensor<4x4x4xi32, #Sparse1>
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bufferization.dealloc_tensor %b : tensor<4x4x4xi32, #Sparse2>
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return
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}
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}
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