[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow element extraction/insertion intrinsics to be used in constexpr #159753 (#161302)
FIXES: #159753 Enable constexpr evaluation for X86 vector element extract/insert builtins. and adds corresponding tests Index is masked with `(Idx & (NumElts - 1))`, matching existing CodeGen.
This commit is contained in:
Aditya Chaudhari
GitHub
parent
6bdf2cb202
commit
9e3bbbb049
@ -52,7 +52,7 @@ def emms : X86Builtin<"void()"> {
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let Features = "mmx";
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}
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let Attributes = [NoThrow, Const, RequiredVectorWidth<64>], Features = "sse" in {
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let Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<64>], Features = "sse" in {
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def vec_ext_v4hi : X86Builtin<"short(_Vector<4, short>, _Constant int)">;
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def vec_set_v4hi : X86Builtin<"_Vector<4, short>(_Vector<4, short>, short, _Constant int)">;
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}
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@ -92,13 +92,6 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in {
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def cmpsd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant char)">;
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}
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let Features = "sse2" in {
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def vec_ext_v2di : X86Builtin<"long long int(_Vector<2, long long int>, _Constant int)">;
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def vec_ext_v4si : X86Builtin<"int(_Vector<4, int>, _Constant int)">;
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def vec_ext_v4sf : X86Builtin<"float(_Vector<4, float>, _Constant int)">;
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def vec_ext_v8hi : X86Builtin<"short(_Vector<8, short>, _Constant int)">;
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def vec_set_v8hi : X86Builtin<"_Vector<8, short>(_Vector<8, short>, short, _Constant int)">;
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}
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let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
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def pavgb128 : X86Builtin<"_Vector<16, unsigned char>(_Vector<16, unsigned char>, _Vector<16, unsigned char>)">;
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@ -108,6 +101,12 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in {
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def packsswb128 : X86Builtin<"_Vector<16, char>(_Vector<8, short>, _Vector<8, short>)">;
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def packssdw128 : X86Builtin<"_Vector<8, short>(_Vector<4, int>, _Vector<4, int>)">;
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def packuswb128 : X86Builtin<"_Vector<16, char>(_Vector<8, short>, _Vector<8, short>)">;
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def vec_ext_v2di : X86Builtin<"long long int(_Vector<2, long long int>, _Constant int)">;
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def vec_ext_v4si : X86Builtin<"int(_Vector<4, int>, _Constant int)">;
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def vec_ext_v4sf : X86Builtin<"float(_Vector<4, float>, _Constant int)">;
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def vec_ext_v8hi : X86Builtin<"short(_Vector<8, short>, _Constant int)">;
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def vec_set_v8hi : X86Builtin<"_Vector<8, short>(_Vector<8, short>, short, _Constant int)">;
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}
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let Features = "sse3" in {
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@ -323,9 +322,6 @@ let Features = "sse4.1", Attributes = [NoThrow, Const, RequiredVectorWidth<128>]
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def ptestnzc128 : X86Builtin<"int(_Vector<2, long long int>, _Vector<2, long long int>)">;
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def mpsadbw128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>, _Constant char)">;
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def phminposuw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>)">;
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def vec_ext_v16qi : X86Builtin<"char(_Vector<16, char>, _Constant int)">;
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def vec_set_v16qi : X86Builtin<"_Vector<16, char>(_Vector<16, char>, char, _Constant int)">;
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def vec_set_v4si : X86Builtin<"_Vector<4, int>(_Vector<4, int>, int, _Constant int)">;
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}
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let Features = "sse4.1", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
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@ -338,6 +334,10 @@ let Features = "sse4.1", Attributes = [NoThrow, Const, Constexpr, RequiredVector
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def pmuldq128 : X86Builtin<"_Vector<2, long long int>(_Vector<4, int>, _Vector<4, int>)">;
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def packusdw128 : X86Builtin<"_Vector<8, short>(_Vector<4, int>, _Vector<4, int>)">;
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def vec_ext_v16qi : X86Builtin<"char(_Vector<16, char>, _Constant int)">;
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def vec_set_v16qi : X86Builtin<"_Vector<16, char>(_Vector<16, char>, char, _Constant int)">;
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def vec_set_v4si : X86Builtin<"_Vector<4, int>(_Vector<4, int>, int, _Constant int)">;
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}
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let Features = "sse4.2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
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@ -560,7 +560,7 @@ let Features = "avx", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
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def maskstoreps : X86Builtin<"void(_Vector<4, float *>, _Vector<4, int>, _Vector<4, float>)">;
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}
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let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
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let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
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def vec_ext_v32qi : X86Builtin<"char(_Vector<32, char>, _Constant int)">;
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def vec_ext_v16hi : X86Builtin<"short(_Vector<16, short>, _Constant int)">;
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def vec_ext_v8si : X86Builtin<"int(_Vector<8, int>, _Constant int)">;
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@ -56,7 +56,7 @@ let Features = "sse2", Attributes = [NoThrow] in {
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def movnti64 : X86Builtin<"void(long long int *, long long int)">;
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}
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let Features = "sse4.1", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
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let Features = "sse4.1", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
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def vec_set_v2di : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long int>, long long int, _Constant int)">;
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}
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@ -64,7 +64,7 @@ let Features = "crc32", Attributes = [NoThrow, Const] in {
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def crc32di : X86Builtin<"unsigned long long int(unsigned long long int, unsigned long long int)">;
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}
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let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
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let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
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def vec_ext_v4di : X86Builtin<"long long int(_Vector<4, long long int>, _Constant int)">;
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def vec_set_v4di : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, long long int, _Constant int)">;
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}
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@ -2878,6 +2878,61 @@ static bool interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
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return true;
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}
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static bool interp__builtin_vec_ext(InterpState &S, CodePtr OpPC,
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const CallExpr *Call, unsigned ID) {
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assert(Call->getNumArgs() == 2);
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APSInt ImmAPS = popToAPSInt(S, Call->getArg(1));
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const Pointer &Vec = S.Stk.pop<Pointer>();
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if (!Vec.getFieldDesc()->isPrimitiveArray())
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return false;
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unsigned NumElems = Vec.getNumElems();
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unsigned Index =
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static_cast<unsigned>(ImmAPS.getZExtValue() & (NumElems - 1));
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PrimType ElemPT = Vec.getFieldDesc()->getPrimType();
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// FIXME(#161685): Replace float+int split with a numeric-only type switch
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if (ElemPT == PT_Float) {
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S.Stk.push<Floating>(Vec.elem<Floating>(Index));
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return true;
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}
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INT_TYPE_SWITCH_NO_BOOL(ElemPT, {
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APSInt V = Vec.elem<T>(Index).toAPSInt();
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pushInteger(S, V, Call->getType());
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});
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return true;
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}
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static bool interp__builtin_vec_set(InterpState &S, CodePtr OpPC,
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const CallExpr *Call, unsigned ID) {
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assert(Call->getNumArgs() == 3);
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APSInt ImmAPS = popToAPSInt(S, Call->getArg(2));
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APSInt ValAPS = popToAPSInt(S, Call->getArg(1));
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const Pointer &Base = S.Stk.pop<Pointer>();
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if (!Base.getFieldDesc()->isPrimitiveArray())
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return false;
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const Pointer &Dst = S.Stk.peek<Pointer>();
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unsigned NumElems = Base.getNumElems();
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unsigned Index =
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static_cast<unsigned>(ImmAPS.getZExtValue() & (NumElems - 1));
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PrimType ElemPT = Base.getFieldDesc()->getPrimType();
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INT_TYPE_SWITCH_NO_BOOL(ElemPT, {
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for (unsigned I = 0; I != NumElems; ++I)
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Dst.elem<T>(I) = Base.elem<T>(I);
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Dst.elem<T>(Index) = static_cast<T>(ValAPS);
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});
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Dst.initializeAllElements();
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return true;
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}
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bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
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uint32_t BuiltinID) {
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if (!S.getASTContext().BuiltinInfo.isConstantEvaluated(BuiltinID))
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@ -3686,6 +3741,29 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
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case X86::BI__builtin_ia32_insert128i256:
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return interp__builtin_x86_insert_subvector(S, OpPC, Call, BuiltinID);
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case X86::BI__builtin_ia32_vec_ext_v4hi:
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case X86::BI__builtin_ia32_vec_ext_v16qi:
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case X86::BI__builtin_ia32_vec_ext_v8hi:
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case X86::BI__builtin_ia32_vec_ext_v4si:
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case X86::BI__builtin_ia32_vec_ext_v2di:
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case X86::BI__builtin_ia32_vec_ext_v32qi:
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case X86::BI__builtin_ia32_vec_ext_v16hi:
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case X86::BI__builtin_ia32_vec_ext_v8si:
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case X86::BI__builtin_ia32_vec_ext_v4di:
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case X86::BI__builtin_ia32_vec_ext_v4sf:
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return interp__builtin_vec_ext(S, OpPC, Call, BuiltinID);
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case X86::BI__builtin_ia32_vec_set_v4hi:
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case X86::BI__builtin_ia32_vec_set_v16qi:
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case X86::BI__builtin_ia32_vec_set_v8hi:
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case X86::BI__builtin_ia32_vec_set_v4si:
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case X86::BI__builtin_ia32_vec_set_v2di:
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case X86::BI__builtin_ia32_vec_set_v32qi:
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case X86::BI__builtin_ia32_vec_set_v16hi:
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case X86::BI__builtin_ia32_vec_set_v8si:
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case X86::BI__builtin_ia32_vec_set_v4di:
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return interp__builtin_vec_set(S, OpPC, Call, BuiltinID);
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default:
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S.FFDiag(S.Current->getLocation(OpPC),
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diag::note_invalid_subexpr_in_const_expr)
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@ -12235,6 +12235,41 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
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return Success(APValue(ResultElements.data(), ResultElements.size()), E);
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}
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case clang::X86::BI__builtin_ia32_vec_set_v4hi:
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case clang::X86::BI__builtin_ia32_vec_set_v16qi:
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case clang::X86::BI__builtin_ia32_vec_set_v8hi:
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case clang::X86::BI__builtin_ia32_vec_set_v4si:
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case clang::X86::BI__builtin_ia32_vec_set_v2di:
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case clang::X86::BI__builtin_ia32_vec_set_v32qi:
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case clang::X86::BI__builtin_ia32_vec_set_v16hi:
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case clang::X86::BI__builtin_ia32_vec_set_v8si:
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case clang::X86::BI__builtin_ia32_vec_set_v4di: {
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APValue VecVal;
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APSInt Scalar, IndexAPS;
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if (!EvaluateVector(E->getArg(0), VecVal, Info) ||
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!EvaluateInteger(E->getArg(1), Scalar, Info) ||
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!EvaluateInteger(E->getArg(2), IndexAPS, Info))
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return false;
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QualType ElemTy = E->getType()->castAs<VectorType>()->getElementType();
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unsigned ElemWidth = Info.Ctx.getIntWidth(ElemTy);
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bool ElemUnsigned = ElemTy->isUnsignedIntegerOrEnumerationType();
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Scalar.setIsUnsigned(ElemUnsigned);
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APSInt ElemAPS = Scalar.extOrTrunc(ElemWidth);
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APValue ElemAV(ElemAPS);
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unsigned NumElems = VecVal.getVectorLength();
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unsigned Index =
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static_cast<unsigned>(IndexAPS.getZExtValue() & (NumElems - 1));
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SmallVector<APValue, 4> Elems;
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Elems.reserve(NumElems);
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for (unsigned ElemNum = 0; ElemNum != NumElems; ++ElemNum)
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Elems.push_back(ElemNum == Index ? ElemAV : VecVal.getVectorElt(ElemNum));
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return Success(APValue(Elems.data(), NumElems), E);
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}
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}
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}
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@ -14822,6 +14857,25 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E,
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return HandleMaskBinOp(
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[](const APSInt &LHS, const APSInt &RHS) { return LHS + RHS; });
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}
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case clang::X86::BI__builtin_ia32_vec_ext_v4hi:
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case clang::X86::BI__builtin_ia32_vec_ext_v16qi:
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case clang::X86::BI__builtin_ia32_vec_ext_v8hi:
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case clang::X86::BI__builtin_ia32_vec_ext_v4si:
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case clang::X86::BI__builtin_ia32_vec_ext_v2di:
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case clang::X86::BI__builtin_ia32_vec_ext_v32qi:
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case clang::X86::BI__builtin_ia32_vec_ext_v16hi:
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case clang::X86::BI__builtin_ia32_vec_ext_v8si:
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case clang::X86::BI__builtin_ia32_vec_ext_v4di: {
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APValue Vec;
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APSInt IdxAPS;
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if (!EvaluateVector(E->getArg(0), Vec, Info) ||
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!EvaluateInteger(E->getArg(1), IdxAPS, Info))
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return false;
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unsigned N = Vec.getVectorLength();
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unsigned Idx = static_cast<unsigned>(IdxAPS.getZExtValue() & (N - 1));
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return Success(Vec.getVectorElt(Idx).getInt(), E);
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}
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}
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}
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@ -16638,6 +16692,17 @@ bool FloatExprEvaluator::VisitCallExpr(const CallExpr *E) {
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(void)Result.fusedMultiplyAdd(SourceY, SourceZ, RM);
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return true;
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}
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case clang::X86::BI__builtin_ia32_vec_ext_v4sf: {
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APValue Vec;
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APSInt IdxAPS;
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if (!EvaluateVector(E->getArg(0), Vec, Info) ||
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!EvaluateInteger(E->getArg(1), IdxAPS, Info))
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return false;
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unsigned N = Vec.getVectorLength();
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unsigned Idx = static_cast<unsigned>(IdxAPS.getZExtValue() & (N - 1));
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return Success(Vec.getVectorElt(Idx), E);
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}
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}
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}
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@ -1039,6 +1039,7 @@ int test_mm256_extract_epi8(__m256i A) {
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// CHECK: zext i8 %{{.*}} to i32
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return _mm256_extract_epi8(A, 31);
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}
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TEST_CONSTEXPR(_mm256_extract_epi8(((__m256i)(__v32qs){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 45) == 13);
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int test_mm256_extract_epi16(__m256i A) {
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// CHECK-LABEL: test_mm256_extract_epi16
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@ -1046,12 +1047,14 @@ int test_mm256_extract_epi16(__m256i A) {
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// CHECK: zext i16 %{{.*}} to i32
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return _mm256_extract_epi16(A, 15);
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}
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TEST_CONSTEXPR(_mm256_extract_epi16(((__m256i)(__v16hi){0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30}), 50) == 4);
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int test_mm256_extract_epi32(__m256i A) {
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// CHECK-LABEL: test_mm256_extract_epi32
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// CHECK: extractelement <8 x i32> %{{.*}}, {{i32|i64}} 7
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return _mm256_extract_epi32(A, 7);
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}
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TEST_CONSTEXPR(_mm256_extract_epi32(((__m256i)(__v8si){0, 5, 10, 15, 20, 25, 30, 35}), 18) == 10);
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#if __x86_64__
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long long test_mm256_extract_epi64(__m256i A) {
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@ -1059,6 +1062,7 @@ long long test_mm256_extract_epi64(__m256i A) {
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// X64: extractelement <4 x i64> %{{.*}}, {{i32|i64}} 3
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return _mm256_extract_epi64(A, 3);
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}
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TEST_CONSTEXPR(_mm256_extract_epi64(((__m256i)(__v4di){5, 15, 25, 35}), 14) == 25);
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#endif
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__m128d test_mm256_extractf128_pd(__m256d A) {
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@ -1120,18 +1124,21 @@ __m256i test_mm256_insert_epi8(__m256i x, char b) {
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// CHECK: insertelement <32 x i8> %{{.*}}, i8 %{{.*}}, {{i32|i64}} 14
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return _mm256_insert_epi8(x, b, 14);
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}
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TEST_CONSTEXPR(match_v32qi(_mm256_insert_epi8(((__m256i)(__v32qs){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 77, 47), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 77, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31));
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__m256i test_mm256_insert_epi16(__m256i x, int b) {
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// CHECK-LABEL: test_mm256_insert_epi16
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// CHECK: insertelement <16 x i16> %{{.*}}, i16 %{{.*}}, {{i32|i64}} 4
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return _mm256_insert_epi16(x, b, 4);
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}
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TEST_CONSTEXPR(match_v16hi(_mm256_insert_epi16(((__m256i)(__v16hi){0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30}), 909, 62), 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 909, 30));
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__m256i test_mm256_insert_epi32(__m256i x, int b) {
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// CHECK-LABEL: test_mm256_insert_epi32
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// CHECK: insertelement <8 x i32> %{{.*}}, i32 %{{.*}}, {{i32|i64}} 5
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return _mm256_insert_epi32(x, b, 5);
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}
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TEST_CONSTEXPR(match_v8si(_mm256_insert_epi32(((__m256i)(__v8si){ 0, 5, 10, 15, 20, 25, 30, 35}), 4321, 18), 0, 5, 4321, 15, 20, 25, 30, 35));
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#if __x86_64__
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__m256i test_mm256_insert_epi64(__m256i x, long long b) {
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@ -1139,6 +1146,7 @@ __m256i test_mm256_insert_epi64(__m256i x, long long b) {
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// X64: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, {{i32|i64}} 2
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return _mm256_insert_epi64(x, b, 2);
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||||
}
|
||||
TEST_CONSTEXPR(match_v4di(_mm256_insert_epi64(((__m256i)(__v4di){5, 15, 25, 35}), -123456789LL, 10), 5, 15, -123456789LL, 35));
|
||||
#endif
|
||||
|
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__m256d test_mm256_insertf128_pd(__m256d A, __m128d B) {
|
||||
|
||||
@ -292,6 +292,7 @@ int test_mm_extract_pi16(__m64 a) {
|
||||
// CHECK: extractelement <4 x i16> {{%.*}}, i64 2
|
||||
return _mm_extract_pi16(a, 2);
|
||||
}
|
||||
TEST_CONSTEXPR(_mm_extract_pi16(((__m64)(__v4hi){10, 20, 30, 40}), 7) == 40);
|
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|
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__m64 test_m_from_int(int a) {
|
||||
// CHECK-LABEL: test_m_from_int
|
||||
@ -347,6 +348,7 @@ __m64 test_mm_insert_pi16(__m64 a, int d) {
|
||||
// CHECK: insertelement <4 x i16>
|
||||
return _mm_insert_pi16(a, d, 2);
|
||||
}
|
||||
TEST_CONSTEXPR(match_v4hi(_mm_insert_pi16(((__m64)(__v4hi){0, 1, 2, 3}), 77, 10), 0, 1, 77, 3));
|
||||
|
||||
__m64 test_mm_madd_pi16(__m64 a, __m64 b) {
|
||||
// CHECK-LABEL: test_mm_madd_pi16
|
||||
|
||||
@ -723,12 +723,14 @@ int test_mm_extract_epi16(__m128i A) {
|
||||
// CHECK: zext i16 %{{.*}} to i32
|
||||
return _mm_extract_epi16(A, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(_mm_extract_epi16(((__m128i)(__v8hi){0, 10, 20, 30, 40, 50, 60, 70}), 25) == 10);
|
||||
|
||||
__m128i test_mm_insert_epi16(__m128i A, int B) {
|
||||
// CHECK-LABEL: test_mm_insert_epi16
|
||||
// CHECK: insertelement <8 x i16> %{{.*}}, {{i32|i64}} 0
|
||||
return _mm_insert_epi16(A, B, 0);
|
||||
}
|
||||
TEST_CONSTEXPR(match_v8hi(_mm_insert_epi16(((__m128i)(__v8hi){0, 10, 20, 30, 40, 50, 60, 70}), 555, 17), 0, 555, 20, 30, 40, 50, 60, 70));
|
||||
|
||||
void test_mm_lfence(void) {
|
||||
// CHECK-LABEL: test_mm_lfence
|
||||
|
||||
@ -231,24 +231,28 @@ int test_mm_extract_epi8(__m128i x) {
|
||||
// CHECK: zext i8 %{{.*}} to i32
|
||||
return _mm_extract_epi8(x, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(_mm_extract_epi8(((__m128i)(__v16qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 20) == 4);
|
||||
|
||||
int test_mm_extract_epi32(__m128i x) {
|
||||
// CHECK-LABEL: test_mm_extract_epi32
|
||||
// CHECK: extractelement <4 x i32> %{{.*}}, {{i32|i64}} 1
|
||||
return _mm_extract_epi32(x, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(_mm_extract_epi32(((__m128i)(__v4si){1, 3, 5, 7}), 10) == 5);
|
||||
|
||||
long long test_mm_extract_epi64(__m128i x) {
|
||||
// CHECK-LABEL: test_mm_extract_epi64
|
||||
// CHECK: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
|
||||
return _mm_extract_epi64(x, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(_mm_extract_epi64(((__m128i)(__v2di){11, 22}), 5) == 22);
|
||||
|
||||
int test_mm_extract_ps(__m128 x) {
|
||||
// CHECK-LABEL: test_mm_extract_ps
|
||||
// CHECK: extractelement <4 x float> %{{.*}}, {{i32|i64}} 1
|
||||
return _mm_extract_ps(x, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(_mm_extract_ps(((__m128){1.25f, 2.5f, 3.75f, 5.0f}), 6) == __builtin_bit_cast(int, 3.75f));
|
||||
|
||||
__m128d test_mm_floor_pd(__m128d x) {
|
||||
// CHECK-LABEL: test_mm_floor_pd
|
||||
@ -279,12 +283,14 @@ __m128i test_mm_insert_epi8(__m128i x, char b) {
|
||||
// CHECK: insertelement <16 x i8> %{{.*}}, i8 %{{.*}}, {{i32|i64}} 1
|
||||
return _mm_insert_epi8(x, b, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(match_v16qi(_mm_insert_epi8(((__m128i)(__v16qi){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 101, 33), 0, 101, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15));
|
||||
|
||||
__m128i test_mm_insert_epi32(__m128i x, int b) {
|
||||
// CHECK-LABEL: test_mm_insert_epi32
|
||||
// CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, {{i32|i64}} 1
|
||||
return _mm_insert_epi32(x, b, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(match_v4si(_mm_insert_epi32(((__m128i)(__v4si){0, 1, 2, 3}), 5678, 18), 0, 1, 5678, 3));
|
||||
|
||||
#ifdef __x86_64__
|
||||
__m128i test_mm_insert_epi64(__m128i x, long long b) {
|
||||
@ -292,6 +298,7 @@ __m128i test_mm_insert_epi64(__m128i x, long long b) {
|
||||
// X64: insertelement <2 x i64> %{{.*}}, i64 %{{.*}}, {{i32|i64}} 1
|
||||
return _mm_insert_epi64(x, b, 1);
|
||||
}
|
||||
TEST_CONSTEXPR(match_v2di(_mm_insert_epi64(((__m128i)(__v2di){100, 200}), -999, 9), 100, -999));
|
||||
#endif
|
||||
|
||||
__m128 test_mm_insert_ps(__m128 x, __m128 y) {
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user