From 9ed7ba87c491de51cafb2d07bf549f5b1cc4e5ac Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Fri, 6 Feb 2026 00:06:32 +0800 Subject: [PATCH] [RISCV] Remove redundant vand.vi with fpto*i to i1 (#179876) If the source of an fpto*i doesn't fit in the destination type, the result is poison. For i1 destinations, this means the result needs to be 0 or 1/-1, so we can just compare the result to 0 directly instead of truncating. The VP lowering for fpto*i already does this. --- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 + .../CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 40 ++---- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 118 +++++------------- 3 files changed, 46 insertions(+), 116 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index d17911994e89..b4b06117d227 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -8186,6 +8186,10 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op, return DAG.getMergeValues({Res, FP2Int.getValue(1)}, DL); } SDValue FP2Int = DAG.getNode(Op.getOpcode(), DL, IVecVT, Src); + if (EltSize == 1) + // The integer should be 0 or 1/-1, so compare the integer result to 0. + return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, IVecVT), FP2Int, + ISD::SETNE); return DAG.getNode(ISD::TRUNCATE, DL, VT, FP2Int); } diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll index 9be93d520912..ea791a155d3d 100644 --- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll +++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll @@ -37,8 +37,7 @@ define <2 x i1> @fp2si_v2f32_v2i1(<2 x float> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %z = fptosi <2 x float> %x to <2 x i1> ret <2 x i1> %z @@ -71,8 +70,7 @@ define <2 x i1> @fp2ui_v2f32_v2i1(<2 x float> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %z = fptoui <2 x float> %x to <2 x i1> ret <2 x i1> %z @@ -111,8 +109,7 @@ define <3 x i1> @fp2si_v3f32_v3i1(<3 x float> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %z = fptosi <3 x float> %x to <3 x i1> ret <3 x i1> %z @@ -309,8 +306,7 @@ define <3 x i1> @fp2ui_v3f32_v3i1(<3 x float> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %z = fptoui <3 x float> %x to <3 x i1> ret <3 x i1> %z @@ -349,8 +345,7 @@ define <8 x i1> @fp2si_v8f32_v8i1(<8 x float> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 -; CHECK-NEXT: vand.vi v8, v10, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v10, 0 ; CHECK-NEXT: ret %z = fptosi <8 x float> %x to <8 x i1> ret <8 x i1> %z @@ -361,8 +356,7 @@ define <8 x i1> @fp2ui_v8f32_v8i1(<8 x float> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 -; CHECK-NEXT: vand.vi v8, v10, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v10, 0 ; CHECK-NEXT: ret %z = fptoui <8 x float> %x to <8 x i1> ret <8 x i1> %z @@ -462,7 +456,6 @@ define <2 x i1> @fp2si_v2bf16_v2i1(<2 x bfloat> %x) { ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %z = fptosi <2 x bfloat> %x to <2 x i1> @@ -475,7 +468,6 @@ define <2 x i1> @fp2ui_v2bf16_v2i1(<2 x bfloat> %x) { ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %z = fptoui <2 x bfloat> %x to <2 x i1> @@ -519,8 +511,7 @@ define <2 x i1> @fp2si_v2f16_v2i1(<2 x half> %x) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetivli zero, 2, e8, mf8, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: fp2si_v2f16_v2i1: @@ -528,7 +519,6 @@ define <2 x i1> @fp2si_v2f16_v2i1(<2 x half> %x) { ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %z = fptosi <2 x half> %x to <2 x i1> @@ -540,8 +530,7 @@ define <2 x i1> @fp2ui_v2f16_v2i1(<2 x half> %x) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetivli zero, 2, e8, mf8, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: fp2ui_v2f16_v2i1: @@ -549,7 +538,6 @@ define <2 x i1> @fp2ui_v2f16_v2i1(<2 x half> %x) { ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %z = fptoui <2 x half> %x to <2 x i1> @@ -597,8 +585,7 @@ define <2 x i1> @fp2si_v2f64_v2i1(<2 x double> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %z = fptosi <2 x double> %x to <2 x i1> ret <2 x i1> %z @@ -609,8 +596,7 @@ define <2 x i1> @fp2ui_v2f64_v2i1(<2 x double> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %z = fptoui <2 x double> %x to <2 x i1> ret <2 x i1> %z @@ -657,8 +643,7 @@ define <8 x i1> @fp2si_v8f64_v8i1(<8 x double> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 -; CHECK-NEXT: vand.vi v8, v12, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: ret %z = fptosi <8 x double> %x to <8 x i1> ret <8 x i1> %z @@ -669,8 +654,7 @@ define <8 x i1> @fp2ui_v8f64_v8i1(<8 x double> %x) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 -; CHECK-NEXT: vand.vi v8, v12, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: ret %z = fptoui <8 x double> %x to <8 x i1> ret <8 x i1> %z diff --git a/llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll index 111fa368ac15..45a6a4d95be0 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll +++ b/llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll @@ -18,7 +18,6 @@ define @vfptosi_nxv1bf16_nxv1i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptosi %va to @@ -57,7 +56,6 @@ define @vfptoui_nxv1bf16_nxv1i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptoui %va to @@ -166,7 +164,6 @@ define @vfptosi_nxv2bf16_nxv2i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptosi %va to @@ -179,7 +176,6 @@ define @vfptoui_nxv2bf16_nxv2i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptoui %va to @@ -288,7 +284,6 @@ define @vfptosi_nxv4bf16_nxv4i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v10 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptosi %va to @@ -301,7 +296,6 @@ define @vfptoui_nxv4bf16_nxv4i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v10 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptoui %va to @@ -410,7 +404,6 @@ define @vfptosi_nxv8bf16_nxv8i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v12 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptosi %va to @@ -423,7 +416,6 @@ define @vfptoui_nxv8bf16_nxv8i1( %va) { ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v12 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptoui %va to @@ -532,7 +524,6 @@ define @vfptosi_nxv16bf16_nxv16i1( %va) ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v16 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptosi %va to @@ -545,7 +536,6 @@ define @vfptoui_nxv16bf16_nxv16i1( %va) ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v16 -; CHECK-NEXT: vand.vi v8, v8, 1 ; CHECK-NEXT: vmsne.vi v0, v8, 0 ; CHECK-NEXT: ret %evec = fptoui %va to @@ -634,8 +624,6 @@ define @vfptosi_nxv32bf16_nxv32i1( %va) ; CHECK-NEXT: srli a0, a0, 2 ; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v16 ; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v24 -; CHECK-NEXT: vand.vi v8, v8, 1 -; CHECK-NEXT: vand.vi v12, v12, 1 ; CHECK-NEXT: vmsne.vi v16, v8, 0 ; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma @@ -655,8 +643,6 @@ define @vfptoui_nxv32bf16_nxv32i1( %va) ; CHECK-NEXT: srli a0, a0, 2 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v16 ; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v24 -; CHECK-NEXT: vand.vi v8, v8, 1 -; CHECK-NEXT: vand.vi v12, v12, 1 ; CHECK-NEXT: vmsne.vi v16, v8, 0 ; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma @@ -733,8 +719,7 @@ define @vfptosi_nxv1f16_nxv1i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptosi_nxv1f16_nxv1i1: @@ -742,7 +727,6 @@ define @vfptosi_nxv1f16_nxv1i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptosi %va to @@ -794,8 +778,7 @@ define @vfptoui_nxv1f16_nxv1i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptoui_nxv1f16_nxv1i1: @@ -803,7 +786,6 @@ define @vfptoui_nxv1f16_nxv1i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptoui %va to @@ -951,8 +933,7 @@ define @vfptosi_nxv2f16_nxv2i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptosi_nxv2f16_nxv2i1: @@ -960,7 +941,6 @@ define @vfptosi_nxv2f16_nxv2i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptosi %va to @@ -972,8 +952,7 @@ define @vfptoui_nxv2f16_nxv2i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, mf4, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptoui_nxv2f16_nxv2i1: @@ -981,7 +960,6 @@ define @vfptoui_nxv2f16_nxv2i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptoui %va to @@ -1129,8 +1107,7 @@ define @vfptosi_nxv4f16_nxv4i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptosi_nxv4f16_nxv4i1: @@ -1138,7 +1115,6 @@ define @vfptosi_nxv4f16_nxv4i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v10 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptosi %va to @@ -1150,8 +1126,7 @@ define @vfptoui_nxv4f16_nxv4i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, mf2, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; ZVFH-NEXT: vand.vi v8, v9, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v9, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptoui_nxv4f16_nxv4i1: @@ -1159,7 +1134,6 @@ define @vfptoui_nxv4f16_nxv4i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v10 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptoui %va to @@ -1307,8 +1281,7 @@ define @vfptosi_nxv8f16_nxv8i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v10, v8 -; ZVFH-NEXT: vand.vi v8, v10, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v10, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptosi_nxv8f16_nxv8i1: @@ -1316,7 +1289,6 @@ define @vfptosi_nxv8f16_nxv8i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v12 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptosi %va to @@ -1328,8 +1300,7 @@ define @vfptoui_nxv8f16_nxv8i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v10, v8 -; ZVFH-NEXT: vand.vi v8, v10, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v10, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptoui_nxv8f16_nxv8i1: @@ -1337,7 +1308,6 @@ define @vfptoui_nxv8f16_nxv8i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v12 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptoui %va to @@ -1485,8 +1455,7 @@ define @vfptosi_nxv16f16_nxv16i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v12, v8 -; ZVFH-NEXT: vand.vi v8, v12, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v12, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptosi_nxv16f16_nxv16i1: @@ -1494,7 +1463,6 @@ define @vfptosi_nxv16f16_nxv16i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v16 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptosi %va to @@ -1506,8 +1474,7 @@ define @vfptoui_nxv16f16_nxv16i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, m2, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v12, v8 -; ZVFH-NEXT: vand.vi v8, v12, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v12, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptoui_nxv16f16_nxv16i1: @@ -1515,7 +1482,6 @@ define @vfptoui_nxv16f16_nxv16i1( %va) { ; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v16 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 ; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 ; ZVFHMIN-NEXT: ret %evec = fptoui %va to @@ -1639,8 +1605,7 @@ define @vfptosi_nxv32f16_nxv32i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, m4, ta, ma ; ZVFH-NEXT: vfncvt.rtz.x.f.w v16, v8 -; ZVFH-NEXT: vand.vi v8, v16, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v16, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptosi_nxv32f16_nxv32i1: @@ -1652,8 +1617,6 @@ define @vfptosi_nxv32f16_nxv32i1( %va) { ; ZVFHMIN-NEXT: srli a0, a0, 2 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v16 ; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v12, v24 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 -; ZVFHMIN-NEXT: vand.vi v12, v12, 1 ; ZVFHMIN-NEXT: vmsne.vi v16, v8, 0 ; ZVFHMIN-NEXT: vmsne.vi v0, v12, 0 ; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma @@ -1668,8 +1631,7 @@ define @vfptoui_nxv32f16_nxv32i1( %va) { ; ZVFH: # %bb.0: ; ZVFH-NEXT: vsetvli a0, zero, e8, m4, ta, ma ; ZVFH-NEXT: vfncvt.rtz.xu.f.w v16, v8 -; ZVFH-NEXT: vand.vi v8, v16, 1 -; ZVFH-NEXT: vmsne.vi v0, v8, 0 +; ZVFH-NEXT: vmsne.vi v0, v16, 0 ; ZVFH-NEXT: ret ; ; ZVFHMIN-LABEL: vfptoui_nxv32f16_nxv32i1: @@ -1681,8 +1643,6 @@ define @vfptoui_nxv32f16_nxv32i1( %va) { ; ZVFHMIN-NEXT: srli a0, a0, 2 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v16 ; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v12, v24 -; ZVFHMIN-NEXT: vand.vi v8, v8, 1 -; ZVFHMIN-NEXT: vand.vi v12, v12, 1 ; ZVFHMIN-NEXT: vmsne.vi v16, v8, 0 ; ZVFHMIN-NEXT: vmsne.vi v0, v12, 0 ; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma @@ -1785,8 +1745,7 @@ define @vfptosi_nxv1f32_nxv1i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -1797,8 +1756,7 @@ define @vfptoui_nxv1f32_nxv1i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -1897,8 +1855,7 @@ define @vfptosi_nxv2f32_nxv2i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -1909,8 +1866,7 @@ define @vfptoui_nxv2f32_nxv2i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2009,8 +1965,7 @@ define @vfptosi_nxv4f32_nxv4i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 -; CHECK-NEXT: vand.vi v8, v10, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v10, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2021,8 +1976,7 @@ define @vfptoui_nxv4f32_nxv4i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 -; CHECK-NEXT: vand.vi v8, v10, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v10, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2121,8 +2075,7 @@ define @vfptosi_nxv8f32_nxv8i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 -; CHECK-NEXT: vand.vi v8, v12, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2133,8 +2086,7 @@ define @vfptoui_nxv8f32_nxv8i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 -; CHECK-NEXT: vand.vi v8, v12, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2233,8 +2185,7 @@ define @vfptosi_nxv16f32_nxv16i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 -; CHECK-NEXT: vand.vi v8, v16, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v16, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2245,8 +2196,7 @@ define @vfptoui_nxv16f32_nxv16i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 -; CHECK-NEXT: vand.vi v8, v16, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v16, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2323,8 +2273,7 @@ define @vfptosi_nxv1f64_nxv1i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2335,8 +2284,7 @@ define @vfptoui_nxv1f64_nxv1i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 -; CHECK-NEXT: vand.vi v8, v9, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v9, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2441,8 +2389,7 @@ define @vfptosi_nxv2f64_nxv2i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 -; CHECK-NEXT: vand.vi v8, v10, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v10, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2453,8 +2400,7 @@ define @vfptoui_nxv2f64_nxv2i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 -; CHECK-NEXT: vand.vi v8, v10, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v10, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2559,8 +2505,7 @@ define @vfptosi_nxv4f64_nxv4i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 -; CHECK-NEXT: vand.vi v8, v12, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2571,8 +2516,7 @@ define @vfptoui_nxv4f64_nxv4i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 -; CHECK-NEXT: vand.vi v8, v12, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v12, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec @@ -2677,8 +2621,7 @@ define @vfptosi_nxv8f64_nxv8i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 -; CHECK-NEXT: vand.vi v8, v16, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v16, 0 ; CHECK-NEXT: ret %evec = fptosi %va to ret %evec @@ -2689,8 +2632,7 @@ define @vfptoui_nxv8f64_nxv8i1( %va) { ; CHECK: # %bb.0: ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma ; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 -; CHECK-NEXT: vand.vi v8, v16, 1 -; CHECK-NEXT: vmsne.vi v0, v8, 0 +; CHECK-NEXT: vmsne.vi v0, v16, 0 ; CHECK-NEXT: ret %evec = fptoui %va to ret %evec