From 9f0d0bbaf4f43578dcd07531bf04ad63c61feecb Mon Sep 17 00:00:00 2001 From: Aiden Grossman Date: Mon, 12 Jan 2026 11:31:41 -0800 Subject: [PATCH] [X86][NewPM] Port x86-fixup-setcc (#175609) Similar to other portings, except this time we do not refactor to an impl since there is a single runOnMachineFunction definition that can easily be made static. Test coverage added. --- llvm/lib/Target/X86/X86.h | 10 ++++- llvm/lib/Target/X86/X86FixupSetCC.cpp | 38 +++++++++++-------- llvm/lib/Target/X86/X86PassRegistry.def | 2 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 4 +- .../X86/x86fixupsetcc-debug-instr-num.mir | 1 + 5 files changed, 34 insertions(+), 21 deletions(-) diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h index 7eb90e333fa5..d36d42c04650 100644 --- a/llvm/lib/Target/X86/X86.h +++ b/llvm/lib/Target/X86/X86.h @@ -100,7 +100,13 @@ public: FunctionPass *createX86OptimizeLEAsLegacyPass(); /// Return a pass that transforms setcc + movzx pairs into xor + setcc. -FunctionPass *createX86FixupSetCC(); +class X86FixupSetCCPass : public PassInfoMixin { +public: + PreservedAnalyses run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM); +}; + +FunctionPass *createX86FixupSetCCLegacyPass(); /// Return a pass that avoids creating store forward block issues in the /// hardware. @@ -333,7 +339,7 @@ void initializeX86ExpandPseudoLegacyPass(PassRegistry &); void initializeX86FPStackifierLegacyPass(PassRegistry &); void initializeX86FastPreTileConfigLegacyPass(PassRegistry &); void initializeX86FastTileConfigLegacyPass(PassRegistry &); -void initializeX86FixupSetCCPassPass(PassRegistry &); +void initializeX86FixupSetCCLegacyPass(PassRegistry &); void initializeX86FlagsCopyLoweringLegacyPass(PassRegistry &); void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &); void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &); diff --git a/llvm/lib/Target/X86/X86FixupSetCC.cpp b/llvm/lib/Target/X86/X86FixupSetCC.cpp index 6bfd1b1e7ae1..ef906f2e71c9 100644 --- a/llvm/lib/Target/X86/X86FixupSetCC.cpp +++ b/llvm/lib/Target/X86/X86FixupSetCC.cpp @@ -39,36 +39,31 @@ using namespace llvm; STATISTIC(NumSubstZexts, "Number of setcc + zext pairs substituted"); namespace { -class X86FixupSetCCPass : public MachineFunctionPass { +class X86FixupSetCCLegacy : public MachineFunctionPass { public: static char ID; - X86FixupSetCCPass() : MachineFunctionPass(ID) {} + X86FixupSetCCLegacy() : MachineFunctionPass(ID) {} StringRef getPassName() const override { return "X86 Fixup SetCC"; } bool runOnMachineFunction(MachineFunction &MF) override; - -private: - MachineRegisterInfo *MRI = nullptr; - const X86Subtarget *ST = nullptr; - const X86InstrInfo *TII = nullptr; - - enum { SearchBound = 16 }; }; } // end anonymous namespace -char X86FixupSetCCPass::ID = 0; +char X86FixupSetCCLegacy::ID = 0; -INITIALIZE_PASS(X86FixupSetCCPass, DEBUG_TYPE, DEBUG_TYPE, false, false) +INITIALIZE_PASS(X86FixupSetCCLegacy, DEBUG_TYPE, DEBUG_TYPE, false, false) -FunctionPass *llvm::createX86FixupSetCC() { return new X86FixupSetCCPass(); } +FunctionPass *llvm::createX86FixupSetCCLegacyPass() { + return new X86FixupSetCCLegacy(); +} -bool X86FixupSetCCPass::runOnMachineFunction(MachineFunction &MF) { +static bool fixupSetCC(MachineFunction &MF) { bool Changed = false; - MRI = &MF.getRegInfo(); - ST = &MF.getSubtarget(); - TII = ST->getInstrInfo(); + MachineRegisterInfo *MRI = &MF.getRegInfo(); + const X86Subtarget *ST = &MF.getSubtarget(); + const X86InstrInfo *TII = ST->getInstrInfo(); SmallVector ToErase; @@ -155,3 +150,14 @@ bool X86FixupSetCCPass::runOnMachineFunction(MachineFunction &MF) { return Changed; } + +bool X86FixupSetCCLegacy::runOnMachineFunction(MachineFunction &MF) { + return fixupSetCC(MF); +} + +PreservedAnalyses X86FixupSetCCPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM) { + return fixupSetCC(MF) ? getMachineFunctionPassPreservedAnalyses() + .preserveSet() + : PreservedAnalyses::all(); +} diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def index 903eececd7d9..5dbedcbcd165 100644 --- a/llvm/lib/Target/X86/X86PassRegistry.def +++ b/llvm/lib/Target/X86/X86PassRegistry.def @@ -42,6 +42,7 @@ MACHINE_FUNCTION_PASS("x86-fast-tile-config", X86FastTileConfigPass()) MACHINE_FUNCTION_PASS("x86-fixup-bw-insts", X86FixupBWInstsPass()) MACHINE_FUNCTION_PASS("x86-fixup-inst-tuning", X86FixupInstTuningPass()) MACHINE_FUNCTION_PASS("x86-fixup-leas", X86FixupLEAsPass()) +MACHINE_FUNCTION_PASS("x86-fixup-setcc", X86FixupSetCCPass()) MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass()) MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass()) MACHINE_FUNCTION_PASS("x86-isel", X86ISelDAGToDAGPass(*this)) @@ -52,7 +53,6 @@ MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass()) #define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME) #endif DUMMY_MACHINE_FUNCTION_PASS("x86-execution-domain-fix", X86ExecutionDomainFix()) -DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-setcc", X86FixupSetCCPass()) DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-vector-constants", X86FixupVectorConstantsPass()) DUMMY_MACHINE_FUNCTION_PASS("x86-lower-tile-copy", X86LowerTileCopy()) DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-load", X86LoadValueInjectionLoadHardeningPass()) diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 7965a1b92657..d58442e2a0c9 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -77,7 +77,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() { initializeCompressEVEXLegacyPass(PR); initializeFixupLEAsLegacyPass(PR); initializeX86FPStackifierLegacyPass(PR); - initializeX86FixupSetCCPassPass(PR); + initializeX86FixupSetCCLegacyPass(PR); initializeX86CallFrameOptimizationLegacyPass(PR); initializeX86CmovConversionLegacyPass(PR); initializeX86TileConfigPass(PR); @@ -514,7 +514,7 @@ bool X86PassConfig::addPreISel() { void X86PassConfig::addPreRegAlloc() { if (getOptLevel() != CodeGenOptLevel::None) { addPass(&LiveRangeShrinkID); - addPass(createX86FixupSetCC()); + addPass(createX86FixupSetCCLegacyPass()); addPass(createX86OptimizeLEAsLegacyPass()); addPass(createX86CallFrameOptimizationLegacyPass()); addPass(createX86AvoidStoreForwardingBlocksLegacyPass()); diff --git a/llvm/test/DebugInfo/X86/x86fixupsetcc-debug-instr-num.mir b/llvm/test/DebugInfo/X86/x86fixupsetcc-debug-instr-num.mir index b7149f0155ae..748860979b24 100644 --- a/llvm/test/DebugInfo/X86/x86fixupsetcc-debug-instr-num.mir +++ b/llvm/test/DebugInfo/X86/x86fixupsetcc-debug-instr-num.mir @@ -1,4 +1,5 @@ # RUN: llc %s --run-pass=x86-fixup-setcc -o - | FileCheck %s +# RUN: llc %s -passes=x86-fixup-setcc -o - | FileCheck %s ## Check the debug-isntr-number transfers from MOVZX32rr8 to the SETCC ## after the mov is replaced with an INSERT_SUBREG, updating the substitutions