[X86] Use range-based for loops (NFC)
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@ -263,8 +263,7 @@ private:
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return 0;
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SmallVector<ICToken, 16> OperandStack;
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for (unsigned i = 0, e = PostfixStack.size(); i != e; ++i) {
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ICToken Op = PostfixStack[i];
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for (const ICToken &Op : PostfixStack) {
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if (Op.first == IC_IMM || Op.first == IC_REGISTER) {
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OperandStack.push_back(Op);
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} else if (isUnaryOperator(Op.first)) {
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@ -1731,8 +1730,8 @@ bool X86AsmParser::VerifyAndAdjustOperands(OperandVector &OrigOperands,
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OrigOperands.pop_back();
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}
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// OrigOperands.append(FinalOperands.begin(), FinalOperands.end());
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for (unsigned int i = 0; i < FinalOperands.size(); ++i)
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OrigOperands.push_back(std::move(FinalOperands[i]));
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for (auto &Op : FinalOperands)
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OrigOperands.push_back(std::move(Op));
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return false;
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}
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@ -1306,8 +1306,8 @@ bool X86FastISel::X86SelectRet(const Instruction *I) {
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MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
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TII.get(Subtarget->is64Bit() ? X86::RET64 : X86::RET32));
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}
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for (unsigned i = 0, e = RetRegs.size(); i != e; ++i)
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MIB.addReg(RetRegs[i], RegState::Implicit);
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for (unsigned Reg : RetRegs)
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MIB.addReg(Reg, RegState::Implicit);
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return true;
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}
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@ -3346,8 +3346,7 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
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// Walk the register/memloc assignments, inserting copies/loads.
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const X86RegisterInfo *RegInfo = Subtarget->getRegisterInfo();
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for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
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CCValAssign const &VA = ArgLocs[i];
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for (const CCValAssign &VA : ArgLocs) {
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const Value *ArgVal = OutVals[VA.getValNo()];
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MVT ArgVT = OutVTs[VA.getValNo()];
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@ -462,8 +462,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
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// Check to see if any of the values defined by this instruction are dead
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// after definition. If so, pop them.
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for (unsigned i = 0, e = DeadRegs.size(); i != e; ++i) {
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unsigned Reg = DeadRegs[i];
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for (unsigned Reg : DeadRegs) {
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// Check if Reg is live on the stack. An inline-asm register operand that
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// is in the clobber list and marked dead might not be live on the stack.
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static_assert(X86::FP7 - X86::FP0 == 7, "sequential FP regnumbers");
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@ -8263,8 +8263,8 @@ bool X86InstrInfo::unfoldMemoryOperand(
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DebugLoc DL;
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MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), Reg);
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for (unsigned i = 0, e = AddrOps.size(); i != e; ++i)
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MIB.add(AddrOps[i]);
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for (const MachineOperand &AddrOp : AddrOps)
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MIB.add(AddrOp);
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MIB.setMemRefs(MMOs);
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NewMIs.push_back(MIB);
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@ -8341,8 +8341,8 @@ bool X86InstrInfo::unfoldMemoryOperand(
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unsigned Opc = getStoreRegOpcode(Reg, DstRC, isAligned, Subtarget);
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DebugLoc DL;
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MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
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for (unsigned i = 0, e = AddrOps.size(); i != e; ++i)
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MIB.add(AddrOps[i]);
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for (const MachineOperand &AddrOp : AddrOps)
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MIB.add(AddrOp);
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MIB.addReg(Reg, RegState::Kill);
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MIB.setMemRefs(MMOs);
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NewMIs.push_back(MIB);
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