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[PowerPC] Update data layout aligment of i128 to 16 (#118004)

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Fix 64-bit PowerPC part of
https://github.com/llvm/llvm-project/issues/102783.
This commit is contained in:
Lei Huang 2024-12-09 18:02:24 -05:00 committed by GitHub
parent cbed714f2a
commit a13ec9cd54
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GPG Key ID: B5690EEEBB952194
9 changed files with 62 additions and 23 deletions
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2
clang/lib/Basic/Targets/OSTargets.h
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@ -473,7 +473,7 @@ public:
this->IntMaxType = TargetInfo::SignedLongLong;
this->Int64Type = TargetInfo::SignedLongLong;
this->SizeType = TargetInfo::UnsignedInt;
this->resetDataLayout("E-m:e-p:32:32-Fi64-i64:64-n32:64");
this->resetDataLayout("E-m:e-p:32:32-Fi64-i64:64-i128:128-n32:64");
}
};

6
clang/lib/Basic/Targets/PPC.h
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@ -463,12 +463,12 @@ public:
if (Triple.isOSAIX()) {
// TODO: Set appropriate ABI for AIX platform.
DataLayout = "E-m:a-Fi64-i64:64-n32:64";
DataLayout = "E-m:a-Fi64-i64:64-i128:128-n32:64";
LongDoubleWidth = 64;
LongDoubleAlign = DoubleAlign = 32;
LongDoubleFormat = &llvm::APFloat::IEEEdouble();
} else if ((Triple.getArch() == llvm::Triple::ppc64le)) {
DataLayout = "e-m:e-Fn32-i64:64-n32:64";
DataLayout = "e-m:e-Fn32-i64:64-i128:128-n32:64";
ABI = "elfv2";
} else {
DataLayout = "E-m:e";
@ -479,7 +479,7 @@ public:
ABI = "elfv1";
DataLayout += "-Fi64";
}
DataLayout += "-i64:64-n32:64";
DataLayout += "-i64:64-i128:128-n32:64";
}
if (Triple.isOSFreeBSD() || Triple.isOSOpenBSD() || Triple.isMusl()) {

18
clang/test/CodeGen/target-data.c
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@ -88,7 +88,7 @@
// RUN: %clang_cc1 -triple powerpc64-lv2 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=PS3
// PS3: target datalayout = "E-m:e-p:32:32-Fi64-i64:64-n32:64"
// PS3: target datalayout = "E-m:e-p:32:32-Fi64-i64:64-i128:128-n32:64"
// RUN: %clang_cc1 -triple i686-nacl -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=I686-NACL
@ -128,35 +128,35 @@
// RUN: %clang_cc1 -triple powerpc64-freebsd -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=PPC64-FREEBSD
// PPC64-FREEBSD: target datalayout = "E-m:e-Fn32-i64:64-n32:64"
// PPC64-FREEBSD: target datalayout = "E-m:e-Fn32-i64:64-i128:128-n32:64"
// RUN: %clang_cc1 -triple powerpc64le-freebsd -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=PPC64LE-FREEBSD
// PPC64LE-FREEBSD: target datalayout = "e-m:e-Fn32-i64:64-n32:64"
// PPC64LE-FREEBSD: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64"
// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=PPC64-LINUX
// PPC64-LINUX: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
// PPC64-LINUX: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu future %s | \
// RUN: FileCheck %s -check-prefix=PPC64-FUTURE
// PPC64-FUTURE: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
// PPC64-FUTURE: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu pwr10 %s | \
// RUN: FileCheck %s -check-prefix=PPC64-P10
// PPC64-P10: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
// PPC64-P10: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=PPC64LE-LINUX
// PPC64LE-LINUX: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
// PPC64LE-LINUX: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu future %s | \
// RUN: FileCheck %s -check-prefix=PPC64LE-FUTURE
// PPC64LE-FUTURE: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
// PPC64LE-FUTURE: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu pwr10 %s | \
// RUN: FileCheck %s -check-prefix=PPC64LE-P10
// PPC64LE-P10: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
// PPC64LE-P10: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
// RUN: %clang_cc1 -triple nvptx-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=NVPTX

2
llvm/lib/IR/AutoUpgrade.cpp
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@ -5559,7 +5559,7 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
return Res;
}
if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m"))) {
if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m")) || T.isPPC64()) {
// Mips64 with o32 ABI did not add "-i128:128".
// Add "-i128:128"
std::string I64 = "-i64:64";

2
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
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@ -185,7 +185,7 @@ static std::string getDataLayoutString(const Triple &T) {
// PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
if (is64Bit)
Ret += "-n32:64";
Ret += "-i128:128-n32:64";
else
Ret += "-n32";

4
llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll
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@ -7,7 +7,7 @@
; Check that cost is 1 for unusual load to register sized load.
define i32 @loadUnusualIntegerWithTrunc(ptr %ptr) {
; CHECK-LABEL: 'loadUnusualIntegerWithTrunc'
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %out = load i128, ptr %ptr, align 8
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %out = load i128, ptr %ptr, align 16
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %trunc = trunc i128 %out to i32
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %trunc
;
@ -18,7 +18,7 @@ define i32 @loadUnusualIntegerWithTrunc(ptr %ptr) {
define i128 @loadUnusualInteger(ptr %ptr) {
; CHECK-LABEL: 'loadUnusualInteger'
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %out = load i128, ptr %ptr, align 8
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %out = load i128, ptr %ptr, align 16
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i128 %out
;
%out = load i128, ptr %ptr

24
llvm/test/CodeGen/PowerPC/data-align.ll Normal file
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@ -0,0 +1,24 @@
; RUN: llc < %s -mtriple=powerpc-unknown-linux | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux | FileCheck %s
; CHECK: .set .Li8,
; CHECK-NEXT: .size .Li8, 1
@i8 = private constant i8 42
; CHECK: .set .Li16,
; CHECK-NEXT: .size .Li16, 2
@i16 = private constant i16 42
; CHECK: .set .Li32,
; CHECK-NEXT: .size .Li32, 4
@i32 = private constant i32 42
; CHECK: .set .Li64,
; CHECK-NEXT: .size .Li64, 8
@i64 = private constant i64 42
; CHECK: .set .Li128,
; CHECK-NEXT: .size .Li128, 16
@i128 = private constant i128 42

6
llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
View File

@ -30,11 +30,11 @@ define i1 @test_cmpxchg_seq_cst(ptr %addr, i128 %desire, i128 %new) {
;
; PWR7-LABEL: @test_cmpxchg_seq_cst(
; PWR7-NEXT: entry:
; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 8
; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 16
; PWR7-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP0]])
; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 8
; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 16
; PWR7-NEXT: [[TMP1:%.*]] = call zeroext i1 @__atomic_compare_exchange_16(ptr [[ADDR:%.*]], ptr [[TMP0]], i128 [[NEW:%.*]], i32 5, i32 5)
; PWR7-NEXT: [[TMP2:%.*]] = load i128, ptr [[TMP0]], align 8
; PWR7-NEXT: [[TMP2:%.*]] = load i128, ptr [[TMP0]], align 16
; PWR7-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP0]])
; PWR7-NEXT: [[TMP3:%.*]] = insertvalue { i128, i1 } poison, i128 [[TMP2]], 0
; PWR7-NEXT: [[TMP4:%.*]] = insertvalue { i128, i1 } [[TMP3]], i1 [[TMP1]], 1

21
llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
View File

@ -92,6 +92,16 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64", "mips64el"),
"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
// Check that PowerPC64 targets add -i128:128.
EXPECT_EQ(UpgradeDataLayoutString("e-m:e-i64:64-n32:64", "powerpc64le-linux"),
"e-m:e-i64:64-i128:128-n32:64");
EXPECT_EQ(
UpgradeDataLayoutString("E-m:e-Fn32-i64:64-n32:64", "powerpc64-linux"),
"E-m:e-Fn32-i64:64-i128:128-n32:64");
EXPECT_EQ(
UpgradeDataLayoutString("E-m:a-Fi64-i64:64-n32:64", "powerpc64-ibm-aix"),
"E-m:a-Fi64-i64:64-i128:128-n32:64");
// Check that SPIR && SPIRV targets add -G1 if it's not present.
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");
@ -108,8 +118,6 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
"-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
"-n8:16:32:64-S128",
"x86_64-unknown-linux-gnu");
std::string DL2 = UpgradeDataLayoutString("e-m:e-i64:64-n32:64",
"powerpc64le-unknown-linux-gnu");
std::string DL3 = UpgradeDataLayoutString(
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32",
"aarch64--");
@ -118,7 +126,6 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128"
"-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64"
"-f80:128:128-n8:16:32:64-S128");
EXPECT_EQ(DL2, "e-m:e-i64:64-n32:64");
EXPECT_EQ(DL3, "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:"
"64-S128-Fn32");
@ -153,6 +160,14 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
EXPECT_EQ(UpgradeDataLayoutString("G2", "spir64"), "G2");
EXPECT_EQ(UpgradeDataLayoutString("G2", "spirv32"), "G2");
EXPECT_EQ(UpgradeDataLayoutString("G2", "spirv64"), "G2");
// Check that PowerPC32 targets don't add -i128:128.
EXPECT_EQ(UpgradeDataLayoutString("e-m:e-i64:64-n32", "powerpcle-linux"),
"e-m:e-i64:64-n32");
EXPECT_EQ(UpgradeDataLayoutString("E-m:e-Fn32-i64:64-n32", "powerpc-linux"),
"E-m:e-Fn32-i64:64-n32");
EXPECT_EQ(UpgradeDataLayoutString("E-m:a-Fi64-i64:64-n32", "powerpc-aix"),
"E-m:a-Fi64-i64:64-n32");
}
TEST(DataLayoutUpgradeTest, EmptyDataLayout) {