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[Hexagon,Lanai,LoongArch,Sparc] Migrate to new encodeInstruction that uses SmallVectorImpl<char>. NFC

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This commit is contained in:
Fangrui Song 2023-06-06 20:21:00 -07:00
parent bb39a8aad1
commit a4bf2be5d2
5 changed files with 23 additions and 21 deletions
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15
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
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@ -364,7 +364,8 @@ uint32_t HexagonMCCodeEmitter::parseBits(size_t Last, MCInst const &MCB,
}
/// Emit the bundle.
void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
MCInst &HMB = const_cast<MCInst &>(MI);
@ -380,7 +381,7 @@ void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) {
MCInst &HMI = const_cast<MCInst &>(*I.getInst());
EncodeSingleInstruction(HMI, OS, Fixups, STI, parseBits(Last, HMB, HMI));
encodeSingleInstruction(HMI, CB, Fixups, STI, parseBits(Last, HMB, HMI));
State.Extended = HexagonMCInstrInfo::isImmext(HMI);
State.Addend += HEXAGON_INSTR_SIZE;
++State.Index;
@ -394,10 +395,10 @@ static bool RegisterMatches(unsigned Consumer, unsigned Producer,
Consumer);
}
/// EncodeSingleInstruction - Emit a single
void HexagonMCCodeEmitter::EncodeSingleInstruction(const MCInst &MI,
raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI, uint32_t Parse) const {
void HexagonMCCodeEmitter::encodeSingleInstruction(
const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI,
uint32_t Parse) const {
assert(!HexagonMCInstrInfo::isBundle(MI));
uint64_t Binary;
@ -442,7 +443,7 @@ void HexagonMCCodeEmitter::EncodeSingleInstruction(const MCInst &MI,
Binary |= SubBits0 | (SubBits1 << 16);
}
support::endian::write<uint32_t>(OS, Binary, support::little);
support::endian::write<uint32_t>(CB, Binary, support::little);
++MCNumEmitted;
}

4
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
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@ -49,11 +49,11 @@ public:
HexagonMCCodeEmitter(MCInstrInfo const &MII, MCContext &MCT)
: MCT(MCT), MCII(MII) {}
void encodeInstruction(MCInst const &MI, raw_ostream &OS,
void encodeInstruction(MCInst const &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const override;
void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS,
void encodeSingleInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI,
uint32_t Parse) const;

10
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
View File

@ -24,6 +24,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
@ -74,7 +75,7 @@ public:
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &SubtargetInfo) const;
void encodeInstruction(const MCInst &Inst, raw_ostream &Ostream,
void encodeInstruction(const MCInst &Inst, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &SubtargetInfo) const override;
@ -170,15 +171,14 @@ LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value,
}
void LanaiMCCodeEmitter::encodeInstruction(
const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl<MCFixup> &Fixups,
const MCInst &Inst, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &SubtargetInfo) const {
// Get instruction encoding and emit it
unsigned Value = getBinaryCodeForInstr(Inst, Fixups, SubtargetInfo);
++MCNumEmitted; // Keep track of the number of emitted insns.
// Emit bytes in big-endian
for (int i = (4 - 1) * 8; i >= 0; i -= 8)
Ostream << static_cast<char>((Value >> i) & 0xff);
support::endian::write<uint32_t>(CB, Value, support::big);
}
// Encode Lanai Memory Operand

8
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
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@ -39,7 +39,7 @@ public:
~LoongArchMCCodeEmitter() override {}
void encodeInstruction(const MCInst &MI, raw_ostream &OS,
void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@ -274,8 +274,8 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO,
}
void LoongArchMCCodeEmitter::encodeInstruction(
const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
// Get byte count of instruction.
unsigned Size = Desc.getSize();
@ -285,7 +285,7 @@ void LoongArchMCCodeEmitter::encodeInstruction(
llvm_unreachable("Unhandled encodeInstruction length!");
case 4: {
uint32_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
support::endian::write(OS, Bits, support::little);
support::endian::write(CB, Bits, support::little);
break;
}
}

7
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
View File

@ -53,7 +53,7 @@ public:
SparcMCCodeEmitter &operator=(const SparcMCCodeEmitter &) = delete;
~SparcMCCodeEmitter() override = default;
void encodeInstruction(const MCInst &MI, raw_ostream &OS,
void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@ -87,11 +87,12 @@ public:
} // end anonymous namespace
void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI);
support::endian::write(OS, Bits,
support::endian::write(CB, Bits,
Ctx.getAsmInfo()->isLittleEndian() ? support::little
: support::big);