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[mlir][NFC] update mlir/Dialect create APIs (29/n) (#150642)

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See https://github.com/llvm/llvm-project/pull/147168 for more info.
This commit is contained in:
Maksim Levental 2025-07-25 11:47:44 -05:00 committed by GitHub
parent 83e51773f8
commit a6bf40d1c6
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GPG Key ID: B5690EEEBB952194
5 changed files with 63 additions and 61 deletions
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2
mlir/test/mlir-tblgen/rewriter-attributes-properties.td
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@ -44,7 +44,7 @@ def test1 : Pat<(AOp (BOp:$x $y), $_), (AOp $x, $y)>;
// CHECK: test::AOp::Properties tblgen_props;
// CHECK: tblgen_values.push_back((*x.getODSResults(0).begin()));
// CHECK: tblgen_props.y = ::llvm::dyn_cast_if_present<decltype(tblgen_props.y)>(y);
// CHECK: tblgen_AOp_0 = rewriter.create<test::AOp>(odsLoc, tblgen_types, tblgen_values, tblgen_props);
// CHECK: tblgen_AOp_0 = test::AOp::create(rewriter, odsLoc, tblgen_types, tblgen_values, tblgen_props);
// Note: These use strings to pick up a non-trivial storage/interface type
// difference.

2
mlir/test/mlir-tblgen/rewriter-indexing.td
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@ -55,7 +55,7 @@ def test2 : Pat<(COp $attr1, $op1, $attr2, (AOp $op2)),
// We expect ODSOperand 0 here, the attribute before the operand in BOp
// definition shouldn't shift the counter.
// CHECK: op1 = (*castedOp0.getODSOperands(0).begin()).getDefiningOp();
// CHECK: rewriter.create<test::BOp>((*a.getODSResults(0).begin()).getLoc()
// CHECK: test::BOp::create(rewriter, (*a.getODSResults(0).begin()).getLoc()
def test3 : Pat<(BOp $attr, (AOp:$a $input)),
(BOp $attr, (AOp $input), (location $a))>;

16
mlir/tools/mlir-tblgen/RewriterGen.cpp
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@ -632,7 +632,8 @@ void PatternEmitter::emitOpMatch(DagNode tree, StringRef opName, int depth) {
++opArgIdx;
continue;
}
if (auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
if (auto *operand =
llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
if (argTree.isVariadic()) {
if (!operand->isVariadic()) {
auto error = formatv("variadic DAG construct can't match op {0}'s "
@ -1695,7 +1696,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree, int resultIndex,
// Then create the op.
os.scope("", "\n}\n").os
<< formatv("{0} = rewriter.create<{1}>({2}, tblgen_values, {3});",
<< formatv("{0} = {1}::create(rewriter, {2}, tblgen_values, {3});",
valuePackName, resultOp.getQualCppClassName(), locToUse,
useProperties ? "tblgen_props" : "tblgen_attrs");
return resultValue;
@ -1714,7 +1715,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree, int resultIndex,
// aggregate-parameter builders.
createSeparateLocalVarsForOpArgs(tree, childNodeNames);
os.scope().os << formatv("{0} = rewriter.create<{1}>({2}", valuePackName,
os.scope().os << formatv("{0} = {1}::create(rewriter, {2}", valuePackName,
resultOp.getQualCppClassName(), locToUse);
supplyValuesForOpArgs(tree, childNodeNames, depth);
os << "\n );\n}\n";
@ -1753,7 +1754,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree, int resultIndex,
resultIndex + i);
}
}
os << formatv("{0} = rewriter.create<{1}>({2}, tblgen_types, "
os << formatv("{0} = {1}::create(rewriter, {2}, tblgen_types, "
"tblgen_values, {3});\n",
valuePackName, resultOp.getQualCppClassName(), locToUse,
useProperties ? "tblgen_props" : "tblgen_attrs");
@ -1772,8 +1773,8 @@ void PatternEmitter::createSeparateLocalVarsForOpArgs(
int valueIndex = 0; // An index for uniquing local variable names.
for (int argIndex = 0, e = resultOp.getNumArgs(); argIndex < e; ++argIndex) {
const auto *operand =
llvm::dyn_cast_if_present<NamedTypeConstraint *>(resultOp.getArg(argIndex));
const auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(
resultOp.getArg(argIndex));
// We do not need special handling for attributes or properties.
if (!operand)
continue;
@ -1828,7 +1829,8 @@ void PatternEmitter::supplyValuesForOpArgs(
Argument opArg = resultOp.getArg(argIndex);
// Handle the case of operand first.
if (auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
if (auto *operand =
llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
if (!operand->name.empty())
os << "/*" << operand->name << "=*/";
os << childNodeNames.lookup(argIndex);

12
mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
View File

@ -397,10 +397,9 @@ static void emitAvailabilityQueryForBitEnum(const Record &enumDef,
avail.getMergeInstanceType(), avail.getQueryFnName(),
enumName);
os << formatv(
" assert(::llvm::popcount(static_cast<{0}>(value)) <= 1"
" && \"cannot have more than one bit set\");\n",
underlyingType);
os << formatv(" assert(::llvm::popcount(static_cast<{0}>(value)) <= 1"
" && \"cannot have more than one bit set\");\n",
underlyingType);
os << " switch (value) {\n";
for (const auto &caseSpecPair : classCasePair.getValue()) {
@ -933,7 +932,8 @@ static void emitOperandDeserialization(const Operator &op, ArrayRef<SMLoc> loc,
// Process operands/attributes
for (unsigned i = 0, e = op.getNumArgs(); i < e; ++i) {
auto argument = op.getArg(i);
if (auto *valueArg = llvm::dyn_cast_if_present<NamedTypeConstraint *>(argument)) {
if (auto *valueArg =
llvm::dyn_cast_if_present<NamedTypeConstraint *>(argument)) {
if (valueArg->isVariableLength()) {
if (i != e - 1) {
PrintFatalError(
@ -1044,7 +1044,7 @@ static void emitDeserializationFunction(const Record *attrClass,
emitDecorationDeserialization(op, " ", valueID, attributes, os);
os << formatv(" Location loc = createFileLineColLoc(opBuilder);\n");
os << formatv(" auto {1} = opBuilder.create<{0}>(loc, {2}, {3}, {4}); "
os << formatv(" auto {1} = {0}::create(opBuilder, loc, {2}, {3}, {4}); "
"(void){1};\n",
op.getQualCppClassName(), opVar, resultTypes, operands,
attributes);

92
mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
View File

@ -52,33 +52,33 @@ Value createPredicate(OpBuilder &builder, tblgen::Pred pred) {
}
if (combiner == "PredCombinerAnd") {
auto op =
builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
auto op =
builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), constraints);
irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
}
std::string condition = pred.getCondition();
// Build a CPredOp to match the C constraint built.
irdl::CPredOp op = builder.create<irdl::CPredOp>(
UnknownLoc::get(ctx), StringAttr::get(ctx, condition));
irdl::CPredOp op = irdl::CPredOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, condition));
return op;
}
Value typeToConstraint(OpBuilder &builder, Type type) {
MLIRContext *ctx = builder.getContext();
auto op =
builder.create<irdl::IsOp>(UnknownLoc::get(ctx), TypeAttr::get(type));
irdl::IsOp::create(builder, UnknownLoc::get(ctx), TypeAttr::get(type));
return op.getOutput();
}
Value baseToConstraint(OpBuilder &builder, StringRef baseClass) {
MLIRContext *ctx = builder.getContext();
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx),
StringAttr::get(ctx, baseClass));
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, baseClass));
return op.getOutput();
}
@ -179,7 +179,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
return createTypeConstraint(builder, predRec.getValueAsDef("baseType"));
if (predRec.getName() == "AnyType") {
auto op = builder.create<irdl::AnyOp>(UnknownLoc::get(ctx));
auto op = irdl::AnyOp::create(builder, UnknownLoc::get(ctx));
return op.getOutput();
}
@ -190,12 +190,12 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
SmallVector<FlatSymbolRefAttr> nested = {
SymbolRefAttr::get(ctx, combined)};
auto typeSymbol = SymbolRefAttr::get(ctx, dialect, nested);
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx), typeSymbol);
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx), typeSymbol);
return op.getOutput();
}
std::string typeName = ("!" + predRec.getValueAsString("typeName")).str();
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx),
StringAttr::get(ctx, typeName));
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, typeName));
return op.getOutput();
}
@ -205,7 +205,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
constraints.push_back(
createTypeConstraint(builder, tblgen::Constraint(child)));
}
auto op = builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), constraints);
auto op = irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
@ -215,14 +215,14 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
constraints.push_back(
createTypeConstraint(builder, tblgen::Constraint(child)));
}
auto op = builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
auto op = irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
// Integer types
if (predRec.getName() == "AnyInteger") {
auto op = builder.create<irdl::BaseOp>(
UnknownLoc::get(ctx), StringAttr::get(ctx, "!builtin.integer"));
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, "!builtin.integer"));
return op.getOutput();
}
@ -235,7 +235,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
IntegerType::get(ctx, width, IntegerType::Signed)),
typeToConstraint(builder,
IntegerType::get(ctx, width, IntegerType::Unsigned))};
auto op = builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), types);
auto op = irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), types);
return op.getOutput();
}
@ -253,7 +253,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
for (const Record *child : predRec.getValueAsListOfDefs("predicateList")) {
constraints.push_back(createPredicate(builder, tblgen::Pred(child)));
}
auto op = builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
auto op = irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
@ -279,7 +279,7 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
constraints.push_back(createPredicate(
builder, tblgen::Pred(child->getValueAsDef("predicate"))));
}
auto op = builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
auto op = irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
@ -290,12 +290,12 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
constraints.push_back(
createAttrConstraint(builder, tblgen::Constraint(child)));
}
auto op = builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), constraints);
auto op = irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), constraints);
return op.getOutput();
}
if (predRec.getName() == "AnyAttr") {
auto op = builder.create<irdl::AnyOp>(UnknownLoc::get(ctx));
auto op = irdl::AnyOp::create(builder, UnknownLoc::get(ctx));
return op.getOutput();
}
@ -317,7 +317,7 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
if (predRec.getName() == "UnitAttr") {
auto op =
builder.create<irdl::IsOp>(UnknownLoc::get(ctx), UnitAttr::get(ctx));
irdl::IsOp::create(builder, UnknownLoc::get(ctx), UnitAttr::get(ctx));
return op.getOutput();
}
@ -329,12 +329,12 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
};
auto typeSymbol = SymbolRefAttr::get(ctx, dialect, nested);
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx), typeSymbol);
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx), typeSymbol);
return op.getOutput();
}
std::string typeName = ("#" + predRec.getValueAsString("attrName")).str();
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx),
StringAttr::get(ctx, typeName));
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, typeName));
return op.getOutput();
}
@ -348,15 +348,15 @@ Value createRegionConstraint(OpBuilder &builder, tblgen::Region constraint) {
if (predRec.getName() == "AnyRegion") {
ValueRange entryBlockArgs = {};
auto op =
builder.create<irdl::RegionOp>(UnknownLoc::get(ctx), entryBlockArgs);
irdl::RegionOp::create(builder, UnknownLoc::get(ctx), entryBlockArgs);
return op.getResult();
}
if (predRec.isSubClassOf("SizedRegion")) {
ValueRange entryBlockArgs = {};
auto ty = IntegerType::get(ctx, 32);
auto op = builder.create<irdl::RegionOp>(
UnknownLoc::get(ctx), entryBlockArgs,
auto op = irdl::RegionOp::create(
builder, UnknownLoc::get(ctx), entryBlockArgs,
IntegerAttr::get(ty, predRec.getValueAsInt("blocks")));
return op.getResult();
}
@ -388,8 +388,8 @@ irdl::OperationOp createIRDLOperation(OpBuilder &builder,
MLIRContext *ctx = builder.getContext();
StringRef opName = getOperatorName(tblgenOp);
irdl::OperationOp op = builder.create<irdl::OperationOp>(
UnknownLoc::get(ctx), StringAttr::get(ctx, opName));
irdl::OperationOp op = irdl::OperationOp::create(
builder, UnknownLoc::get(ctx), StringAttr::get(ctx, opName));
// Add the block in the region.
Block &opBlock = op.getBody().emplaceBlock();
@ -471,19 +471,19 @@ irdl::OperationOp createIRDLOperation(OpBuilder &builder,
// Create the operands and results operations.
if (!operands.empty())
consBuilder.create<irdl::OperandsOp>(UnknownLoc::get(ctx), operands,
ArrayAttr::get(ctx, operandNames),
operandVariadicity);
irdl::OperandsOp::create(consBuilder, UnknownLoc::get(ctx), operands,
ArrayAttr::get(ctx, operandNames),
operandVariadicity);
if (!results.empty())
consBuilder.create<irdl::ResultsOp>(UnknownLoc::get(ctx), results,
ArrayAttr::get(ctx, resultNames),
resultVariadicity);
irdl::ResultsOp::create(consBuilder, UnknownLoc::get(ctx), results,
ArrayAttr::get(ctx, resultNames),
resultVariadicity);
if (!attributes.empty())
consBuilder.create<irdl::AttributesOp>(UnknownLoc::get(ctx), attributes,
ArrayAttr::get(ctx, attrNames));
irdl::AttributesOp::create(consBuilder, UnknownLoc::get(ctx), attributes,
ArrayAttr::get(ctx, attrNames));
if (!regions.empty())
consBuilder.create<irdl::RegionsOp>(UnknownLoc::get(ctx), regions,
ArrayAttr::get(ctx, regionNames));
irdl::RegionsOp::create(consBuilder, UnknownLoc::get(ctx), regions,
ArrayAttr::get(ctx, regionNames));
return op;
}
@ -493,8 +493,8 @@ irdl::TypeOp createIRDLType(OpBuilder &builder, tblgen::TypeDef &tblgenType) {
StringRef typeName = getTypeName(tblgenType);
std::string combined = ("!" + typeName).str();
irdl::TypeOp op = builder.create<irdl::TypeOp>(
UnknownLoc::get(ctx), StringAttr::get(ctx, combined));
irdl::TypeOp op = irdl::TypeOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, combined));
op.getBody().emplaceBlock();
@ -507,8 +507,8 @@ irdl::AttributeOp createIRDLAttr(OpBuilder &builder,
StringRef attrName = getAttrName(tblgenAttr);
std::string combined = ("#" + attrName).str();
irdl::AttributeOp op = builder.create<irdl::AttributeOp>(
UnknownLoc::get(ctx), StringAttr::get(ctx, combined));
irdl::AttributeOp op = irdl::AttributeOp::create(
builder, UnknownLoc::get(ctx), StringAttr::get(ctx, combined));
op.getBody().emplaceBlock();
@ -517,8 +517,8 @@ irdl::AttributeOp createIRDLAttr(OpBuilder &builder,
static irdl::DialectOp createIRDLDialect(OpBuilder &builder) {
MLIRContext *ctx = builder.getContext();
return builder.create<irdl::DialectOp>(UnknownLoc::get(ctx),
StringAttr::get(ctx, selectedDialect));
return irdl::DialectOp::create(builder, UnknownLoc::get(ctx),
StringAttr::get(ctx, selectedDialect));
}
static bool emitDialectIRDLDefs(const RecordKeeper &records, raw_ostream &os) {
@ -529,7 +529,7 @@ static bool emitDialectIRDLDefs(const RecordKeeper &records, raw_ostream &os) {
// Create a module op and set it as the insertion point.
OwningOpRef<ModuleOp> module =
builder.create<ModuleOp>(UnknownLoc::get(&ctx));
ModuleOp::create(builder, UnknownLoc::get(&ctx));
builder = builder.atBlockBegin(module->getBody());
// Create the dialect and insert it.
irdl::DialectOp dialect = createIRDLDialect(builder);