[LLD][COFF] Support MinGW constructor and destructor lists on ARM64X (#127205)
Split the chunks for EC and native views, inserting headers and tails for both.
This commit is contained in:
Jacek Caban
GitHub
parent
a8b177aa60
commit
a92bfaa7d9
@ -1070,16 +1070,20 @@ void MergeChunk::writeTo(uint8_t *buf) const {
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}
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// MinGW specific.
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size_t AbsolutePointerChunk::getSize() const { return ctx.config.wordsize; }
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size_t AbsolutePointerChunk::getSize() const {
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return symtab.ctx.config.wordsize;
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}
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void AbsolutePointerChunk::writeTo(uint8_t *buf) const {
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if (ctx.config.is64()) {
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if (symtab.ctx.config.is64()) {
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write64le(buf, value);
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} else {
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write32le(buf, value);
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}
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}
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MachineTypes AbsolutePointerChunk::getMachine() const { return symtab.machine; }
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void ECExportThunkChunk::writeTo(uint8_t *buf) const {
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memcpy(buf, ECExportThunkCode, sizeof(ECExportThunkCode));
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write32le(buf + 10, target->getRVA() - rva - 14);
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@ -910,16 +910,17 @@ private:
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// MinGW specific. A Chunk that contains one pointer-sized absolute value.
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class AbsolutePointerChunk : public NonSectionChunk {
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public:
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AbsolutePointerChunk(COFFLinkerContext &ctx, uint64_t value)
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: value(value), ctx(ctx) {
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AbsolutePointerChunk(SymbolTable &symtab, uint64_t value)
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: value(value), symtab(symtab) {
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setAlignment(getSize());
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}
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size_t getSize() const override;
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void writeTo(uint8_t *buf) const override;
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MachineTypes getMachine() const override;
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private:
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uint64_t value;
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COFFLinkerContext &ctx;
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SymbolTable &symtab;
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};
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// Return true if this file has the hotpatch flag set to true in the S_COMPILE3
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@ -2335,21 +2335,28 @@ void Writer::createRuntimePseudoRelocs() {
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// There's a symbol pointing to the start sentinel pointer, __CTOR_LIST__
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// and __DTOR_LIST__ respectively.
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void Writer::insertCtorDtorSymbols() {
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AbsolutePointerChunk *ctorListHead = make<AbsolutePointerChunk>(ctx, -1);
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AbsolutePointerChunk *ctorListEnd = make<AbsolutePointerChunk>(ctx, 0);
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AbsolutePointerChunk *dtorListHead = make<AbsolutePointerChunk>(ctx, -1);
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AbsolutePointerChunk *dtorListEnd = make<AbsolutePointerChunk>(ctx, 0);
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ctorsSec->insertChunkAtStart(ctorListHead);
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ctorsSec->addChunk(ctorListEnd);
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dtorsSec->insertChunkAtStart(dtorListHead);
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dtorsSec->addChunk(dtorListEnd);
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ctx.forEachSymtab([&](SymbolTable &symtab) {
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AbsolutePointerChunk *ctorListHead = make<AbsolutePointerChunk>(symtab, -1);
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AbsolutePointerChunk *ctorListEnd = make<AbsolutePointerChunk>(symtab, 0);
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AbsolutePointerChunk *dtorListHead = make<AbsolutePointerChunk>(symtab, -1);
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AbsolutePointerChunk *dtorListEnd = make<AbsolutePointerChunk>(symtab, 0);
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ctorsSec->insertChunkAtStart(ctorListHead);
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ctorsSec->addChunk(ctorListEnd);
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dtorsSec->insertChunkAtStart(dtorListHead);
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dtorsSec->addChunk(dtorListEnd);
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Symbol *ctorListSym = ctx.symtab.findUnderscore("__CTOR_LIST__");
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Symbol *dtorListSym = ctx.symtab.findUnderscore("__DTOR_LIST__");
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replaceSymbol<DefinedSynthetic>(ctorListSym, ctorListSym->getName(),
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ctorListHead);
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replaceSymbol<DefinedSynthetic>(dtorListSym, dtorListSym->getName(),
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dtorListHead);
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Symbol *ctorListSym = symtab.findUnderscore("__CTOR_LIST__");
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Symbol *dtorListSym = symtab.findUnderscore("__DTOR_LIST__");
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replaceSymbol<DefinedSynthetic>(ctorListSym, ctorListSym->getName(),
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ctorListHead);
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replaceSymbol<DefinedSynthetic>(dtorListSym, dtorListSym->getName(),
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dtorListHead);
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});
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if (ctx.hybridSymtab) {
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ctorsSec->splitECChunks();
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dtorsSec->splitECChunks();
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}
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}
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// Handles /section options to allow users to overwrite
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76
lld/test/COFF/arm64x-ctors-sec.s
Normal file
76
lld/test/COFF/arm64x-ctors-sec.s
Normal file
@ -0,0 +1,76 @@
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// REQUIRES: aarch64, x86
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// RUN: split-file %s %t.dir && cd %t.dir
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows ctor1-arm64.s -o ctor1-arm64.obj
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows ctor2-arm64.s -o ctor2-arm64.obj
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// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows ctor1-arm64ec.s -o ctor1-arm64ec.obj
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// RUN: llvm-mc -filetype=obj -triple=x86_64-windows ctor2-amd64.s -o ctor2-amd64.obj
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows test.s -o test-arm64.obj
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// RUN: llvm-mc -filetype=obj -triple=arm64ec-windows test.s -o test-arm64ec.obj
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// Check that .ctors and .dtors chunks are correctly sorted and that EC and native chunks are split.
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// RUN: lld-link -out:out.dll -machine:arm64x -lldmingw -dll -noentry test-arm64.obj test-arm64ec.obj \
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// RUN: ctor1-arm64.obj ctor2-arm64.obj ctor1-arm64ec.obj ctor2-amd64.obj
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// RUN: llvm-readobj --hex-dump=.rdata --hex-dump=.test out.dll | FileCheck %s
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// RUN: lld-link -out:out2.dll -machine:arm64x -lldmingw -dll -noentry test-arm64.obj test-arm64ec.obj \
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// RUN: ctor1-arm64ec.obj ctor2-amd64.obj ctor1-arm64.obj ctor2-arm64.obj
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// RUN: llvm-readobj --hex-dump=.rdata --hex-dump=.test out2.dll | FileCheck %s
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// RUN: lld-link -out:out3.dll -machine:arm64x -lldmingw -dll -noentry test-arm64.obj test-arm64ec.obj \
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// RUN: ctor2-arm64.obj ctor1-arm64ec.obj ctor2-amd64.obj ctor1-arm64.obj
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// RUN: llvm-readobj --hex-dump=.rdata --hex-dump=.test out3.dll | FileCheck %s
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// CHECK: Hex dump of section '.rdata':
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// CHECK-NEXT: 0x180001000 ffffffff ffffffff 01000000 00000000
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// CHECK-NEXT: 0x180001010 02000000 00000000 03000000 00000000
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// CHECK-NEXT: 0x180001020 00000000 00000000 ffffffff ffffffff
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// CHECK-NEXT: 0x180001030 11000000 00000000 12000000 00000000
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// CHECK-NEXT: 0x180001040 13000000 00000000 00000000 00000000
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// CHECK-NEXT: 0x180001050 ffffffff ffffffff 01010000 00000000
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// CHECK-NEXT: 0x180001060 02010000 00000000 03010000 00000000
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// CHECK-NEXT: 0x180001070 00000000 00000000 ffffffff ffffffff
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// CHECK-NEXT: 0x180001080 11010000 00000000 12010000 00000000
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// CHECK-NEXT: 0x180001090 13010000 00000000 00000000 00000000
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// CHECK-EMPTY:
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// CHECK-NEXT: Hex dump of section '.test':
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// CHECK-NEXT: 0x180003000 00100000 50100000 28100000 78100000
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#--- ctor1-arm64.s
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.section .ctors.1,"drw"
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.xword 1
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.section .ctors.3,"drw"
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.xword 3
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.section .dtors.1,"drw"
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.xword 0x101
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.section .dtors.3,"drw"
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.xword 0x103
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#--- ctor2-arm64.s
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.section .ctors.2,"drw"
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.xword 2
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.section .dtors.2,"drw"
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.xword 0x102
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#--- ctor1-arm64ec.s
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.section .ctors.1,"drw"
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.xword 0x11
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.section .ctors.3,"drw"
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.xword 0x13
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.section .dtors.1,"drw"
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.xword 0x111
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.section .dtors.3,"drw"
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.xword 0x113
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#--- ctor2-amd64.s
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.section .ctors.2,"drw"
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.quad 0x12
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.section .dtors.2,"drw"
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.quad 0x112
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#--- test.s
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.section .test
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.rva __CTOR_LIST__
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.rva __DTOR_LIST__
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