[RISCV] Move volatile check to isCandidate in VL optimizer. NFC (#154685)

This keeps it closer to the other legality checks like the FP exceptions
check.
It also means that isSupportedInstr only needs to check the opcode,
which allows it to be replaced with a TSFlags based check in a later
patch.
This commit is contained in:
Luke Lau 2025-08-21 16:37:10 +08:00 committed by GitHub
parent 5c411b3c0b
commit a9692391f6
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@ -847,13 +847,7 @@ static bool isSupportedInstr(const MachineInstr &MI) {
case RISCV::VLUXEI32_V:
case RISCV::VLOXEI32_V:
case RISCV::VLUXEI64_V:
case RISCV::VLOXEI64_V: {
for (const MachineMemOperand *MMO : MI.memoperands())
if (MMO->isVolatile())
return false;
return true;
}
case RISCV::VLOXEI64_V:
// Vector Single-Width Integer Add and Subtract
case RISCV::VADD_VI:
case RISCV::VADD_VV:
@ -1292,6 +1286,13 @@ bool RISCVVLOptimizer::isCandidate(const MachineInstr &MI) const {
return false;
}
for (const MachineMemOperand *MMO : MI.memoperands()) {
if (MMO->isVolatile()) {
LLVM_DEBUG(dbgs() << "Not a candidate because contains volatile MMO\n");
return false;
}
}
// Some instructions that produce vectors have semantics that make it more
// difficult to determine whether the VL can be reduced. For example, some
// instructions, such as reductions, may write lanes past VL to a scalar