[AMDGPU] Fix warnings

This patch fixes warnings like:

  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:711: warning:
  enumerated and non-enumerated type in conditional expression
This commit is contained in:
Kazu Hirata 2023-05-19 10:56:22 -07:00
parent 85cb7fbc07
commit aa144fbeaf
2 changed files with 7 additions and 4 deletions

View File

@ -4979,7 +4979,7 @@ void AMDGPUInstructionSelector::renderOpSelTImm(MachineInstrBuilder &MIB,
const MachineInstr &MI,
int OpIdx) const {
assert(OpIdx >= 0 && "expected to match an immediate operand");
MIB.addImm(MI.getOperand(OpIdx).getImm() ? SISrcMods::OP_SEL_0 : 0);
MIB.addImm(MI.getOperand(OpIdx).getImm() ? (int64_t)SISrcMods::OP_SEL_0 : 0);
}
void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,

View File

@ -699,7 +699,8 @@ public:
// Add system SGPRs.
Register addWorkGroupIDX(bool HasArchitectedSGPRs) {
Register Reg = HasArchitectedSGPRs ? AMDGPU::TTMP9 : getNextSystemSGPR();
Register Reg =
HasArchitectedSGPRs ? (MCPhysReg)AMDGPU::TTMP9 : getNextSystemSGPR();
ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(Reg);
if (!HasArchitectedSGPRs)
NumSystemSGPRs += 1;
@ -708,7 +709,8 @@ public:
}
Register addWorkGroupIDY(bool HasArchitectedSGPRs) {
Register Reg = HasArchitectedSGPRs ? AMDGPU::TTMP7 : getNextSystemSGPR();
Register Reg =
HasArchitectedSGPRs ? (MCPhysReg)AMDGPU::TTMP7 : getNextSystemSGPR();
unsigned Mask = HasArchitectedSGPRs && hasWorkGroupIDZ() ? 0xffff : ~0u;
ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(Reg, Mask);
if (!HasArchitectedSGPRs)
@ -718,7 +720,8 @@ public:
}
Register addWorkGroupIDZ(bool HasArchitectedSGPRs) {
Register Reg = HasArchitectedSGPRs ? AMDGPU::TTMP7 : getNextSystemSGPR();
Register Reg =
HasArchitectedSGPRs ? (MCPhysReg)AMDGPU::TTMP7 : getNextSystemSGPR();
unsigned Mask = HasArchitectedSGPRs ? 0xffff << 16 : ~0u;
ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(Reg, Mask);
if (!HasArchitectedSGPRs)