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[RISCV] Tweak zdinx-large-spill.mir so it tests what it was intended to. NFC

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This commit is contained in:
Craig Topper 2025-05-14 12:35:44 -07:00
parent cb53ece2ca
commit b6c7d7c879
1 changed files with 30 additions and 23 deletions
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53
llvm/test/CodeGen/RISCV/zdinx-large-spill.mir
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@ -10,34 +10,40 @@
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -2048
; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: .cfi_def_cfa_offset 2064
; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: .cfi_def_cfa_offset 2080
; CHECK-NEXT: lui t0, 1
; CHECK-NEXT: add t0, sp, t0
; CHECK-NEXT: sw a0, -2040(t0) # 4-byte Folded Spill
; CHECK-NEXT: sw a1, -2036(t0) # 4-byte Folded Spill
; CHECK-NEXT: sw a0, -2024(t0) # 4-byte Folded Spill
; CHECK-NEXT: sw a1, -2020(t0) # 4-byte Folded Spill
; CHECK-NEXT: lui a0, 1
; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: sw a2, -2048(a0) # 4-byte Folded Spill
; CHECK-NEXT: sw a3, -2044(a0) # 4-byte Folded Spill
; CHECK-NEXT: sw a4, 2040(sp) # 4-byte Folded Spill
; CHECK-NEXT: sw a5, 2044(sp) # 4-byte Folded Spill
; CHECK-NEXT: sw a6, 2032(sp) # 4-byte Folded Spill
; CHECK-NEXT: sw a7, 2036(sp) # 4-byte Folded Spill
; CHECK-NEXT: sw a2, -2032(a0) # 4-byte Folded Spill
; CHECK-NEXT: sw a3, -2028(a0) # 4-byte Folded Spill
; CHECK-NEXT: lui a0, 1
; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: lw a1, -2036(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a0, -2040(a0) # 4-byte Folded Reload
; CHECK-NEXT: sw a4, -2040(a0) # 4-byte Folded Spill
; CHECK-NEXT: sw a5, -2036(a0) # 4-byte Folded Spill
; CHECK-NEXT: addi a0, sp, 2044
; CHECK-NEXT: sw a6, 0(a0) # 4-byte Folded Spill
; CHECK-NEXT: sw a7, 4(a0) # 4-byte Folded Spill
; CHECK-NEXT: lui a0, 1
; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: lw a2, -2048(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a3, -2044(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a4, 2040(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw a5, 2044(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw a6, 2032(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw a7, 2036(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw a1, -2020(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a0, -2024(a0) # 4-byte Folded Reload
; CHECK-NEXT: lui a0, 1
; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: lw a2, -2032(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a3, -2028(a0) # 4-byte Folded Reload
; CHECK-NEXT: lui a0, 1
; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: lw a4, -2040(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a5, -2036(a0) # 4-byte Folded Reload
; CHECK-NEXT: addi a0, sp, 2044
; CHECK-NEXT: lw a6, 0(a0) # 4-byte Folded Reload
; CHECK-NEXT: lw a7, 4(a0) # 4-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 2032
; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: addi sp, sp, 48
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: ret
ret void
@ -53,8 +59,9 @@ stack:
- { id: 0, type: spill-slot, size: 8, alignment: 4 }
- { id: 1, type: spill-slot, size: 8, alignment: 4 }
- { id: 2, type: spill-slot, size: 8, alignment: 4 }
- { id: 3, type: spill-slot, size: 8, alignment: 4 }
- { id: 4, type: spill-slot, size: 2024, alignment: 4 }
- { id: 3, type: spill-slot, size: 4, alignment: 4 }
- { id: 4, type: spill-slot, size: 8, alignment: 4 }
- { id: 5, type: spill-slot, size: 2028, alignment: 4 }
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
@ -65,11 +72,11 @@ body: |
PseudoRV32ZdinxSD killed renamable $x10_x11, %stack.0, 0 :: (store (s64) into %stack.0, align 4)
PseudoRV32ZdinxSD killed renamable $x12_x13, %stack.1, 0 :: (store (s64) into %stack.1, align 4)
PseudoRV32ZdinxSD killed renamable $x14_x15, %stack.2, 0 :: (store (s64) into %stack.2, align 4)
PseudoRV32ZdinxSD killed renamable $x16_x17, %stack.3, 0 :: (store (s64) into %stack.3, align 4)
PseudoRV32ZdinxSD killed renamable $x16_x17, %stack.4, 0 :: (store (s64) into %stack.4, align 4)
renamable $x10_x11 = PseudoRV32ZdinxLD %stack.0, 0 :: (load (s64) from %stack.0, align 4)
renamable $x12_x13 = PseudoRV32ZdinxLD %stack.1, 0 :: (load (s64) from %stack.1, align 4)
renamable $x14_x15 = PseudoRV32ZdinxLD %stack.2, 0 :: (load (s64) from %stack.2, align 4)
renamable $x16_x17 = PseudoRV32ZdinxLD %stack.3, 0 :: (load (s64) from %stack.3, align 4)
renamable $x16_x17 = PseudoRV32ZdinxLD %stack.4, 0 :: (load (s64) from %stack.4, align 4)
PseudoRET
...