[TTI] Plumb CostKind through getPartialReductionCost (#144953)
Purely for the sake of being idiomatic with other TTI costing routines, no direct motivation beyond that.
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@ -1332,8 +1332,8 @@ public:
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LLVM_ABI InstructionCost getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, PartialReductionExtendKind OpAExtend,
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PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp = std::nullopt) const;
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PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const;
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/// \return The maximum interleave factor that any transform should try to
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/// perform for this target. This number depends on the level of parallelism
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@ -652,12 +652,11 @@ public:
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virtual bool enableWritePrefetching() const { return false; }
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virtual bool shouldPrefetchAddressSpace(unsigned AS) const { return !AS; }
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virtual InstructionCost
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getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB,
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Type *AccumType, ElementCount VF,
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TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp = std::nullopt) const {
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virtual InstructionCost getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const {
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return InstructionCost::getInvalid();
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}
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@ -871,10 +871,11 @@ bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
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InstructionCost TargetTransformInfo::getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, PartialReductionExtendKind OpAExtend,
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PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp) const {
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PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const {
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return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
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AccumType, VF, OpAExtend, OpBExtend,
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BinOp);
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BinOp, CostKind);
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}
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unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const {
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@ -5395,11 +5395,14 @@ AArch64TTIImpl::getSpliceCost(VectorType *Tp, int Index,
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InstructionCost AArch64TTIImpl::getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp) const {
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const {
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InstructionCost Invalid = InstructionCost::getInvalid();
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InstructionCost Cost(TTI::TCC_Basic);
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if (CostKind != TTI::TCK_RecipThroughput)
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return Invalid;
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// Sub opcodes currently only occur in chained cases.
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// Independent partial reduction subtractions are still costed as an add
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if (Opcode != Instruction::Add && Opcode != Instruction::Sub)
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@ -382,12 +382,11 @@ public:
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return BaseT::isLegalNTLoad(DataType, Alignment);
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}
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InstructionCost
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getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB,
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Type *AccumType, ElementCount VF,
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TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp) const override;
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InstructionCost getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const override;
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bool enableOrderedReductions() const override { return true; }
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@ -297,8 +297,8 @@ RISCVTTIImpl::getPopcntSupport(unsigned TyWidth) const {
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InstructionCost RISCVTTIImpl::getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp) const {
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const {
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// zve32x is broken for partial_reduce_umla, but let's make sure we
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// don't generate them.
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@ -311,9 +311,8 @@ InstructionCost RISCVTTIImpl::getPartialReductionCost(
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Type *Tp = VectorType::get(AccumType, VF.divideCoefficientBy(4));
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std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
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// Note: Asuming all vqdot* variants are equal cost
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// TODO: Thread CostKind through this API
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return LT.first * getRISCVInstructionCost(RISCV::VQDOT_VV, LT.second,
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TTI::TCK_RecipThroughput);
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return LT.first *
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getRISCVInstructionCost(RISCV::VQDOT_VV, LT.second, CostKind);
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}
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bool RISCVTTIImpl::shouldExpandReduction(const IntrinsicInst *II) const {
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@ -100,12 +100,11 @@ public:
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TargetTransformInfo::PopcntSupportKind
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getPopcntSupport(unsigned TyWidth) const override;
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InstructionCost
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getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB,
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Type *AccumType, ElementCount VF,
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TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp) const override;
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InstructionCost getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const override;
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bool shouldExpandReduction(const IntrinsicInst *II) const override;
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bool supportsScalableVectors() const override {
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@ -198,12 +198,15 @@ InstructionCost WebAssemblyTTIImpl::getVectorInstrCost(
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InstructionCost WebAssemblyTTIImpl::getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp) const {
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const {
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InstructionCost Invalid = InstructionCost::getInvalid();
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if (!VF.isFixed() || !ST->hasSIMD128())
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return Invalid;
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if (CostKind != TTI::TCK_RecipThroughput)
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return Invalid;
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InstructionCost Cost(TTI::TCC_Basic);
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// Possible options:
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@ -86,8 +86,8 @@ public:
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InstructionCost getPartialReductionCost(
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unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
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ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
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TTI::PartialReductionExtendKind OpBExtend,
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std::optional<unsigned> BinOp = std::nullopt) const override;
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TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
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TTI::TargetCostKind CostKind) const override;
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TTI::ReductionShuffle
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getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const override;
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@ -8240,7 +8240,7 @@ bool VPRecipeBuilder::getScaledReductions(
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[&](ElementCount VF) {
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InstructionCost Cost = TTI->getPartialReductionCost(
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Update->getOpcode(), A->getType(), B->getType(), PHI->getType(),
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VF, OpAExtend, OpBExtend, BinOp->getOpcode());
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VF, OpAExtend, OpBExtend, BinOp->getOpcode(), CM.CostKind);
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return Cost.isValid();
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},
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Range)) {
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@ -336,9 +336,9 @@ VPPartialReductionRecipe::computeCost(ElementCount VF,
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return TargetTransformInfo::PR_None;
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};
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return Ctx.TTI.getPartialReductionCost(getOpcode(), InputTypeA, InputTypeB,
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PhiType, VF, GetExtendKind(ExtAR),
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GetExtendKind(ExtBR), Opcode);
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return Ctx.TTI.getPartialReductionCost(
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getOpcode(), InputTypeA, InputTypeB, PhiType, VF, GetExtendKind(ExtAR),
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GetExtendKind(ExtBR), Opcode, Ctx.CostKind);
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}
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void VPPartialReductionRecipe::execute(VPTransformState &State) {
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