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[MachinePipeliner] Fix incorrect dependency direction (#149436)

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This patch fixes a bug introduced in #145878. A dependency was added in
the wrong direction, causing an assertion failure due to broken
topological order.

(cherry picked from commit 6df012ab48ececd27359bdc9448ee101b39eea7a)
This commit is contained in:
Ryotaro Kasuga 2025-07-22 09:53:13 +09:00 committed by Tobias Hieta
parent 6df2bfd66b
commit ba5aa84b54
2 changed files with 52 additions and 2 deletions
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4
llvm/lib/CodeGen/MachinePipeliner.cpp
View File

@ -4279,8 +4279,8 @@ void LoopCarriedEdges::modifySUnits(std::vector<SUnit> &SUnits,
!TII->isGlobalMemoryObject(FromMI) &&
!TII->isGlobalMemoryObject(ToMI) && !isSuccOrder(From, To)) {
SDep Pred = Dep;
Pred.setSUnit(Src);
Dst->addPred(Pred);
Pred.setSUnit(From);
To->addPred(Pred);
}
}
}

50
llvm/test/CodeGen/Hexagon/swp-load-to-store-forward.mir Normal file
View File

@ -0,0 +1,50 @@
# RUN: llc -mtriple=hexagon -run-pass pipeliner %s -o /dev/null
# Check that edges that violate topological order are not added to the
# SwingSchedulerDAG. This is a case where the crash was caused by PR 145878.
--- |
target triple = "hexagon"
define void @crash_145878() {
entry:
br label %loop
loop: ; preds = %loop, %entry
%lsr.iv2 = phi i32 [ %lsr.iv.next, %loop ], [ 1, %entry ]
%lsr.iv = phi ptr [ %cgep3, %loop ], [ inttoptr (i32 -8 to ptr), %entry ]
%cgep = getelementptr i8, ptr %lsr.iv, i32 12
%load = load i32, ptr %cgep, align 4
store i32 %load, ptr %lsr.iv, align 4
%lsr.iv.next = add nsw i32 %lsr.iv2, -1
%iv.cmp.not = icmp eq i32 %lsr.iv.next, 0
%cgep3 = getelementptr i8, ptr %lsr.iv, i32 -8
br i1 %iv.cmp.not, label %exit, label %loop
exit: ; preds = %loop
ret void
}
...
---
name: crash_145878
tracksRegLiveness: true
body: |
bb.0.entry:
successors: %bb.1(0x80000000)
%5:intregs = A2_tfrsi -8
J2_loop0i %bb.1, 1, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
bb.1.loop (machine-block-address-taken):
successors: %bb.2(0x04000000), %bb.1(0x7c000000)
%1:intregs = PHI %5, %bb.0, %3, %bb.1
%6:intregs = L2_loadri_io %1, 12 :: (load (s32) from %ir.cgep)
S2_storeri_io %1, 0, killed %6 :: (store (s32) into %ir.lsr.iv)
%3:intregs = A2_addi %1, -8
ENDLOOP0 %bb.1, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
J2_jump %bb.2, implicit-def dead $pc
bb.2.exit:
PS_jmpret $r31, implicit-def dead $pc
...