[BOLT] Extend Inliner to work on functions with Pointer Authentication (#162458)
The inliner uses DirectSP to check if a function has instructions that modify the SP. Exceptions are stack Push and Pop instructions. We can also allow pointer signing and authenticating instructions. The inliner removes the Return instructions from the inlined functions. If it is a fused pointer-authentication-and-return (e.g. RETAA), we have to generate a new authentication instruction.
This commit is contained in:
Gergely Bálint
GitHub
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@ -632,6 +632,12 @@ public:
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return false;
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}
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/// Generate the matching pointer authentication instruction from a fused
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/// pauth-and-return instruction.
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virtual void createMatchingAuth(const MCInst &AuthAndRet, MCInst &Auth) {
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llvm_unreachable("not implemented");
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}
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/// Returns the register used as a return address. Returns std::nullopt if
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/// not applicable, such as reading the return address from a system register
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/// or from the stack.
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@ -195,6 +195,13 @@ InliningInfo getInliningInfo(const BinaryFunction &BF) {
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if (BC.MIB->isPush(Inst) || BC.MIB->isPop(Inst))
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continue;
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// Pointer signing and authenticatin instructions are used around
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// Push and Pop. These are also straightforward to handle.
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if (BC.isAArch64() &&
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(BC.MIB->isPSignOnLR(Inst) || BC.MIB->isPAuthOnLR(Inst) ||
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BC.MIB->isPAuthAndRet(Inst)))
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continue;
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DirectSP |= BC.MIB->hasDefOfPhysReg(Inst, SPReg) ||
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BC.MIB->hasUseOfPhysReg(Inst, SPReg);
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}
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@ -338,6 +345,18 @@ Inliner::inlineCall(BinaryBasicBlock &CallerBB,
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BC.Ctx.get());
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}
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// Handling fused authentication and return instructions (Armv8.3-A):
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// if the Callee does not end in a tailcall, the return will be removed
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// from the inlined block. If that return is RETA(A|B), we have to keep
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// the authentication part.
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// RETAA -> AUTIASP
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// RETAB -> AUTIBSP
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if (!CSIsTailCall && BC.isAArch64() && BC.MIB->isPAuthAndRet(Inst)) {
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MCInst Auth;
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BC.MIB->createMatchingAuth(Inst, Auth);
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InsertII =
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std::next(InlinedBB->insertInstruction(InsertII, std::move(Auth)));
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}
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if (CSIsTailCall || (!MIB.isCall(Inst) && !MIB.isReturn(Inst))) {
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InsertII =
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std::next(InlinedBB->insertInstruction(InsertII, std::move(Inst)));
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@ -313,6 +313,33 @@ public:
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Inst.getOpcode() == AArch64::RETABSPPCr;
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}
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void createMatchingAuth(const MCInst &AuthAndRet, MCInst &Auth) override {
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Auth.clear();
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Auth.setOperands(AuthAndRet.getOperands());
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switch (AuthAndRet.getOpcode()) {
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case AArch64::RETAA:
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Auth.setOpcode(AArch64::AUTIASP);
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break;
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case AArch64::RETAB:
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Auth.setOpcode(AArch64::AUTIBSP);
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break;
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case AArch64::RETAASPPCi:
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Auth.setOpcode(AArch64::AUTIASPPCi);
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break;
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case AArch64::RETABSPPCi:
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Auth.setOpcode(AArch64::AUTIBSPPCi);
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break;
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case AArch64::RETAASPPCr:
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Auth.setOpcode(AArch64::AUTIASPPCr);
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break;
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case AArch64::RETABSPPCr:
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Auth.setOpcode(AArch64::AUTIBSPPCr);
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break;
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default:
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llvm_unreachable("Unhandled fused pauth-and-return instruction");
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}
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}
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std::optional<MCPhysReg> getSignedReg(const MCInst &Inst) const override {
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switch (Inst.getOpcode()) {
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case AArch64::PACIA:
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45
bolt/test/AArch64/inline-armv8.3-returns.s
Normal file
45
bolt/test/AArch64/inline-armv8.3-returns.s
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@ -0,0 +1,45 @@
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# This test checks that inlining functions with fused pointer-auth-and-return
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# instructions is properly handled by BOLT.
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# REQUIRES: system-linux
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# RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown -mattr=+v8.3a %s -o %t.o
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# RUN: %clang %cflags -O0 %t.o -o %t.exe -Wl,-q
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# RUN: llvm-bolt --inline-all --print-inline --print-only=_Z3barP1A \
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# RUN: %t.exe -o %t.bolt | FileCheck %s
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# CHECK: BOLT-INFO: inlined 0 calls at 1 call sites in 2 iteration(s). Change in binary size: 8 bytes.
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# CHECK: Binary Function "_Z3barP1A" after inlining {
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# CHECK-NOT: bl _Z3fooP1A
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# CHECK: ldr x8, [x0]
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# CHECK-NEXT: ldr w0, [x8]
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# CHECK-NEXT: autiasp
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.text
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.globl _Z3fooP1A
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.type _Z3fooP1A,@function
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_Z3fooP1A:
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paciasp
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ldr x8, [x0]
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ldr w0, [x8]
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retaa
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.size _Z3fooP1A, .-_Z3fooP1A
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.globl _Z3barP1A
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.type _Z3barP1A,@function
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_Z3barP1A:
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stp x29, x30, [sp, #-16]!
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mov x29, sp
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bl _Z3fooP1A
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mul w0, w0, w0
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ldp x29, x30, [sp], #16
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ret
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.size _Z3barP1A, .-_Z3barP1A
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.globl main
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.p2align 2
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.type main,@function
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main:
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mov w0, wzr
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ret
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.size main, .-main
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46
bolt/test/AArch64/inline-armv8.3-tailcall.s
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46
bolt/test/AArch64/inline-armv8.3-tailcall.s
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@ -0,0 +1,46 @@
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# This test checks that inlining functions with fused pointer-auth-and-return
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# instructions into a location with a tailcall is properly handled by BOLT.
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# Because _Z3barP1A ends in a tailcall, we don't remove the return instruction
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# from the inlined block. Therefore, we should see a retaa, and not an autiasp.
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# REQUIRES: system-linux
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# RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown -mattr=+v8.3a %s -o %t.o
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# RUN: %clang %cflags -O0 %t.o -o %t.exe -Wl,-q
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# RUN: llvm-bolt --inline-all --print-inline --print-only=_Z3barP1A \
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# RUN: %t.exe -o %t.bolt | FileCheck %s
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# CHECK: BOLT-INFO: inlined 0 calls at 1 call sites in 2 iteration(s). Change in binary size: 12 bytes.
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# CHECK: Binary Function "_Z3barP1A" after inlining {
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# CHECK-NOT: bl _Z3fooP1A
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# CHECK: mov x29, sp
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# CHECK-NEXT: paciasp
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# CHECK-NEXT: ldr x8, [x0]
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# CHECK-NEXT: ldr w0, [x8]
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# CHECK-NEXT: retaa
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.text
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.globl _Z3fooP1A
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.type _Z3fooP1A,@function
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_Z3fooP1A:
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paciasp
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ldr x8, [x0]
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ldr w0, [x8]
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retaa
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.size _Z3fooP1A, .-_Z3fooP1A
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.globl _Z3barP1A
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.type _Z3barP1A,@function
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_Z3barP1A:
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stp x29, x30, [sp, #-16]!
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mov x29, sp
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b _Z3fooP1A // tailcall
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.size _Z3barP1A, .-_Z3barP1A
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.globl main
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.p2align 2
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.type main,@function
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main:
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mov w0, wzr
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ret
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.size main, .-main
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61
bolt/test/AArch64/inline-pauth-lr.s
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61
bolt/test/AArch64/inline-pauth-lr.s
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@ -0,0 +1,61 @@
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# This test checks that inlining functions with the pauth-lr variants of
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# fused pointer-auth-and-return instructions is properly handled by BOLT.
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# REQUIRES: system-linux
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# RUN: %clang %cflags -march=armv9.5-a+pauth-lr -O0 %s -o %t.exe -Wl,-q
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# RUN: llvm-bolt --inline-all --print-inline --print-only=_Z3barP1A \
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# RUN: %t.exe -o %t.bolt | FileCheck %s
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# CHECK: BOLT-INFO: inlined 0 calls at 2 call sites in 2 iteration(s). Change in binary size: 16 bytes.
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# CHECK: Binary Function "_Z3barP1A" after inlining {
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# CHECK-NOT: bl _Z3fooP1A
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# CHECK: paciasppc
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# CHECK-NEXT: ldr x8, [x0]
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# CHECK-NEXT: ldr w0, [x8]
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# CHECK-NEXT: autiasppcr x28
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# CHECK-NEXT: paciasppc
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# CHECK-NEXT: ldr x7, [x0]
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# CHECK-NEXT: ldr w0, [x7]
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# CHECK-NEXT: autiasppc _Z3bazP1A
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.text
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.globl _Z3fooP1A
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.type _Z3fooP1A,@function
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_Z3fooP1A:
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paciasppc
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ldr x8, [x0]
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ldr w0, [x8]
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retaasppcr x28
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.size _Z3fooP1A, .-_Z3fooP1A
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.text
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.globl _Z3bazP1A
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.type _Z3bazP1A,@function
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_Z3bazP1A:
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0:
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paciasppc
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ldr x7, [x0]
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ldr w0, [x7]
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retaasppc 0b
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.size _Z3bazP1A, .-_Z3bazP1A
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.globl _Z3barP1A
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.type _Z3barP1A,@function
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_Z3barP1A:
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stp x29, x30, [sp, #-16]!
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mov x29, sp
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bl _Z3fooP1A
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bl _Z3bazP1A
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mul w0, w0, w0
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ldp x29, x30, [sp], #16
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ret
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.size _Z3barP1A, .-_Z3barP1A
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.globl main
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.p2align 2
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.type main,@function
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main:
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mov w0, wzr
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ret
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.size main, .-main
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