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[InstCombine] fold unsigned predicates on srem result (#122520)

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This allows optimization of more signed floor implementations when the
divisor is a known power of two to an arithmetic shift.

Proof for the implemented optimizations:
https://alive2.llvm.org/ce/z/j6C-Nz

Proof for the test cases:
https://alive2.llvm.org/ce/z/M_PBjw

---------

Co-authored-by: Jacob Young <jacobly0@users.noreply.github.com>
This commit is contained in:
Jacob Young 2025-01-18 17:05:31 -05:00 committed by GitHub
parent 4233a15c9f
commit bb59eb8ed5
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GPG Key ID: B5690EEEBB952194
3 changed files with 442 additions and 1 deletions
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33
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -2674,10 +2674,41 @@ Instruction *InstCombinerImpl::foldICmpShrConstant(ICmpInst &Cmp,
Instruction *InstCombinerImpl::foldICmpSRemConstant(ICmpInst &Cmp,
BinaryOperator *SRem,
const APInt &C) {
const ICmpInst::Predicate Pred = Cmp.getPredicate();
if (Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_ULT) {
// Canonicalize unsigned predicates to signed:
// (X s% DivisorC) u> C -> (X s% DivisorC) s< 0
// iff (C s< 0 ? ~C : C) u>= abs(DivisorC)-1
// (X s% DivisorC) u< C+1 -> (X s% DivisorC) s> -1
// iff (C+1 s< 0 ? ~C : C) u>= abs(DivisorC)-1
const APInt *DivisorC;
if (!match(SRem->getOperand(1), m_APInt(DivisorC)))
return nullptr;
APInt NormalizedC = C;
if (Pred == ICmpInst::ICMP_ULT) {
assert(!NormalizedC.isZero() &&
"ult X, 0 should have been simplified already.");
--NormalizedC;
}
if (C.isNegative())
NormalizedC.flipAllBits();
assert(!DivisorC->isZero() &&
"srem X, 0 should have been simplified already.");
if (!NormalizedC.uge(DivisorC->abs() - 1))
return nullptr;
Type *Ty = SRem->getType();
if (Pred == ICmpInst::ICMP_UGT)
return new ICmpInst(ICmpInst::ICMP_SLT, SRem,
ConstantInt::getNullValue(Ty));
return new ICmpInst(ICmpInst::ICMP_SGT, SRem,
ConstantInt::getAllOnesValue(Ty));
}
// Match an 'is positive' or 'is negative' comparison of remainder by a
// constant power-of-2 value:
// (X % pow2C) sgt/slt 0
const ICmpInst::Predicate Pred = Cmp.getPredicate();
if (Pred != ICmpInst::ICMP_SGT && Pred != ICmpInst::ICMP_SLT &&
Pred != ICmpInst::ICMP_EQ && Pred != ICmpInst::ICMP_NE)
return nullptr;

26
llvm/test/Transforms/InstCombine/add.ll
View File

@ -3018,6 +3018,32 @@ define i32 @floor_sdiv_wrong_op(i32 %x, i32 %y) {
ret i32 %r
}
define i32 @floor_sdiv_using_srem_by_8(i32 %x) {
; CHECK-LABEL: @floor_sdiv_using_srem_by_8(
; CHECK-NEXT: [[F:%.*]] = ashr i32 [[X:%.*]], 3
; CHECK-NEXT: ret i32 [[F]]
;
%d = sdiv i32 %x, 8
%r = srem i32 %x, 8
%i = icmp ugt i32 %r, -2147483648
%s = sext i1 %i to i32
%f = add i32 %d, %s
ret i32 %f
}
define i32 @floor_sdiv_using_srem_by_2(i32 %x) {
; CHECK-LABEL: @floor_sdiv_using_srem_by_2(
; CHECK-NEXT: [[F:%.*]] = ashr i32 [[X:%.*]], 1
; CHECK-NEXT: ret i32 [[F]]
;
%d = sdiv i32 %x, 2
%r = srem i32 %x, 2
%i = icmp ugt i32 %r, -2147483648
%s = sext i1 %i to i32
%f = add i32 %d, %s
ret i32 %f
}
; (X s>> (BW - 1)) + (zext (X s> 0)) --> (X s>> (BW - 1)) | (zext (X != 0))
define i8 @signum_i8_i8(i8 %x) {

384
llvm/test/Transforms/InstCombine/icmp-srem.ll Normal file
View File

@ -0,0 +1,384 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
define i1 @icmp_ugt_sremsmin_smin(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smin(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], -2147483648
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ugt i32 %r, -2147483648
ret i1 %c
}
define i1 @icmp_ugt_sremsmin_sminp1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_sminp1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -2147483647
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ugt i32 %r, -2147483647
ret i1 %c
}
define i1 @icmp_ugt_sremsmin_smaxm1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smaxm1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 2147483646
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ugt i32 %r, 2147483646
ret i1 %c
}
define i1 @icmp_ugt_sremsmin_smax(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smax(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], -2147483648
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ugt i32 %r, 2147483647
ret i1 %c
}
define i1 @icmp_ult_sremsmin_smin(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmin_smin(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ult i32 %r, -2147483648
ret i1 %c
}
define i1 @icmp_ult_sremsmin_sminp1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmin_sminp1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ult i32 %r, -2147483647
ret i1 %c
}
define i1 @icmp_ult_sremsmin_sminp2(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmin_sminp2(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -2147483646
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ult i32 %r, -2147483646
ret i1 %c
}
define i1 @icmp_ult_sremsmin_smax(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmin_smax(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 2147483647
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, -2147483648
%c = icmp ult i32 %r, 2147483647
ret i1 %c
}
define i1 @icmp_ugt_srem5_smin(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_srem5_smin(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ugt i32 %r, -2147483648
ret i1 %c
}
define i1 @icmp_ugt_srem5_m5(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_srem5_m5(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ugt i32 %r, -5
ret i1 %c
}
define i1 @icmp_ugt_srem5_m4(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_srem5_m4(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -4
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ugt i32 %r, -4
ret i1 %c
}
define i1 @icmp_ugt_srem5_3(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_srem5_3(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 3
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ugt i32 %r, 3
ret i1 %c
}
define i1 @icmp_ugt_srem5_4(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_srem5_4(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ugt i32 %r, 4
ret i1 %c
}
define i1 @icmp_ugt_srem5_smaxm1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_srem5_smaxm1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ugt i32 %r, 2147483646
ret i1 %c
}
define i1 @icmp_ult_srem5_sminp1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_srem5_sminp1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ult i32 %r, -2147483647
ret i1 %c
}
define i1 @icmp_ult_srem5_m4(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_srem5_m4(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ult i32 %r, -4
ret i1 %c
}
define i1 @icmp_ult_srem5_m3(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_srem5_m3(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -3
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ult i32 %r, -3
ret i1 %c
}
define i1 @icmp_ult_srem5_4(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_srem5_4(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 4
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ult i32 %r, 4
ret i1 %c
}
define i1 @icmp_ult_srem5_5(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_srem5_5(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ult i32 %r, 5
ret i1 %c
}
define i1 @icmp_ult_srem5_smax(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_srem5_smax(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 5
%c = icmp ult i32 %r, 2147483647
ret i1 %c
}
define i1 @icmp_ugt_sremsmax_smin(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smin(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ugt i32 %r, -2147483648
ret i1 %c
}
define i1 @icmp_ugt_sremsmax_sminp1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_sminp1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ugt i32 %r, -2147483647
ret i1 %c
}
define i1 @icmp_ugt_sremsmax_sminp2(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_sminp2(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -2147483646
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ugt i32 %r, -2147483646
ret i1 %c
}
define i1 @icmp_ugt_sremsmax_smaxm2(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smaxm2(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 2147483645
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ugt i32 %r, 2147483645
ret i1 %c
}
define i1 @icmp_ugt_sremsmax_smaxm1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smaxm1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ugt i32 %r, 2147483646
ret i1 %c
}
define i1 @icmp_ugt_sremsmax_smax(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smax(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ugt i32 %r, 2147483647
ret i1 %c
}
define i1 @icmp_ult_sremsmax_smin(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smin(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ult i32 %r, -2147483648
ret i1 %c
}
define i1 @icmp_ult_sremsmax_sminp1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ult i32 %r, -2147483647
ret i1 %c
}
define i1 @icmp_ult_sremsmax_sminp2(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp2(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ult i32 %r, -2147483646
ret i1 %c
}
define i1 @icmp_ult_sremsmax_sminp3(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp3(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -2147483645
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ult i32 %r, -2147483645
ret i1 %c
}
define i1 @icmp_ult_sremsmax_smaxm1(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smaxm1(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 2147483646
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ult i32 %r, 2147483646
ret i1 %c
}
define i1 @icmp_ult_sremsmax_smax(i32 %x) {
; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smax(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1
; CHECK-NEXT: ret i1 [[C]]
;
%r = srem i32 %x, 2147483647
%c = icmp ult i32 %r, 2147483647
ret i1 %c
}