[SystemZ][z/OS] Make emitIncrement() a member function of SystemZFrameLowering. (#188254)
Function `emitIncrement()` uses 8 for stack alignment, but the stack alignment for 64-bit XPLINK is 32 on z/OS. This PR changes it to a member function of SystemZFrameLowering to get the correct stack alignment by `getStackAlignment()`. It also adds a test to verify it.
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@ -162,6 +162,35 @@ bool SystemZFrameLowering::hasReservedCallFrame(
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return true;
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}
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void SystemZFrameLowering::emitIncrement(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI,
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const DebugLoc &DL, Register Reg,
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int64_t NumBytes,
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const TargetInstrInfo *TII) const {
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while (NumBytes) {
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unsigned Opcode;
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int64_t ThisVal = NumBytes;
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if (isInt<16>(NumBytes))
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Opcode = SystemZ::AGHI;
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else {
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Opcode = SystemZ::AGFI;
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// Make sure we maintain stack alignment.
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int64_t MinVal = -uint64_t(1) << 31;
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int64_t MaxVal = (int64_t(1) << 31) - getStackAlignment();
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if (ThisVal < MinVal)
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ThisVal = MinVal;
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else if (ThisVal > MaxVal)
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ThisVal = MaxVal;
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}
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
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.addReg(Reg)
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.addImm(ThisVal);
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// The CC implicit def is dead.
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MI->getOperand(3).setIsDead();
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NumBytes -= ThisVal;
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}
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}
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bool SystemZELFFrameLowering::assignCalleeSavedSpillSlots(
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MachineFunction &MF, const TargetRegisterInfo *TRI,
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std::vector<CalleeSavedInfo> &CSI) const {
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@ -474,34 +503,6 @@ void SystemZELFFrameLowering::processFunctionBeforeFrameFinalized(
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MO.setIsKill(false);
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}
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// Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
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static void emitIncrement(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI, const DebugLoc &DL,
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Register Reg, int64_t NumBytes,
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const TargetInstrInfo *TII) {
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while (NumBytes) {
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unsigned Opcode;
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int64_t ThisVal = NumBytes;
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if (isInt<16>(NumBytes))
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Opcode = SystemZ::AGHI;
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else {
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Opcode = SystemZ::AGFI;
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// Make sure we maintain 8-byte stack alignment.
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int64_t MinVal = -uint64_t(1) << 31;
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int64_t MaxVal = (int64_t(1) << 31) - 8;
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if (ThisVal < MinVal)
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ThisVal = MinVal;
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else if (ThisVal > MaxVal)
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ThisVal = MaxVal;
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}
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
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.addReg(Reg).addImm(ThisVal);
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// The CC implicit def is dead.
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MI->getOperand(3).setIsDead();
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NumBytes -= ThisVal;
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}
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}
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// Add CFI for the new CFA offset.
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static void buildCFAOffs(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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@ -54,6 +54,11 @@ public:
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// Return the size of a pointer (in bytes).
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unsigned getPointerSize() const { return PointerSize; }
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// Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
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void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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const DebugLoc &DL, Register Reg, int64_t NumBytes,
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const TargetInstrInfo *TII) const;
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private:
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unsigned PointerSize;
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};
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@ -400,6 +400,18 @@ define void @large_stack2(i64 %n1, i64 %n2, i64 %n3) {
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ret void
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}
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; Verify stack alignment is 32
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; CHECK-LABEL: large_stack3
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; CHECK: agfi 4,-2147483648
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; CHECK-NEXT: aghi 4,-224
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; CHECK: agfi 4,2147483616
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; CHECK-NEXT: aghi 4,256
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define void @large_stack3() {
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%arr = alloca [268435457 x i64], align 8
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call i64 (ptr) @fun1(ptr %arr)
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ret void
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}
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; CHECK-LABEL: L#EPM_leaf_func0_0 DS 0H
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; CHECK: * DSA Size 0x0
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; CHECK: * Entry Flags
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