From bdf00e2216280edef1ec91ccc07987db92197b59 Mon Sep 17 00:00:00 2001 From: Yadong Chen Date: Tue, 19 Nov 2024 22:15:52 +0800 Subject: [PATCH] [mlir][spirv] Use assemblyFormat to define AccessChainOp assembly (#116545) see #73359 Declarative assemblyFormat ODS is more concise and requires less boilerplate than filling out cpp interfaces. Changes: - updates the AccessChainOp defined in SPIRVMemoryOps.td to use assemblyFormat. - Removes part print/parse from MemoryOps.cpp which is now generated by assemblyFormat - Updates tests to updated format --- .../mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td | 6 +++ mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp | 50 ------------------ .../lower-gpu-launch-vulkan-launch.mlir | 2 +- .../SPIRVToLLVM/memory-ops-to-llvm.mlir | 4 +- mlir/test/Dialect/SPIRV/IR/memory-ops.mlir | 38 +++++++------- mlir/test/Dialect/SPIRV/IR/structure-ops.mlir | 2 +- .../SPIRV/Transforms/abi-load-store.mlir | 6 +-- .../SPIRV/Transforms/canonicalize.mlir | 14 ++--- .../Dialect/SPIRV/Transforms/inlining.mlir | 6 +-- .../SPIRV/Transforms/layout-decoration.mlir | 2 +- .../Transforms/unify-aliased-resource.mlir | 52 +++++++++---------- .../SPIRV/array-two-step-roundtrip.mlir | 2 +- mlir/test/Target/SPIRV/array.mlir | 2 +- mlir/test/Target/SPIRV/debug.mlir | 2 +- mlir/test/Target/SPIRV/global-variable.mlir | 2 +- mlir/test/Target/SPIRV/loop.mlir | 8 +-- mlir/test/Target/SPIRV/matrix.mlir | 2 +- mlir/test/Target/SPIRV/memory-ops.mlir | 12 ++--- .../Target/SPIRV/physical-storage-buffer.mlir | 8 +-- mlir/test/Target/SPIRV/undef.mlir | 2 +- 20 files changed, 89 insertions(+), 133 deletions(-) diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td index 291f2ef055c8..de7be3f21f3b 100644 --- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td +++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td @@ -74,6 +74,12 @@ def SPIRV_AccessChainOp : SPIRV_Op<"AccessChain", [Pure]> { let builders = [OpBuilder<(ins "Value":$basePtr, "ValueRange":$indices)>]; let hasCanonicalizer = 1; + + let hasCustomAssemblyFormat = 0; + + let assemblyFormat = [{ + $base_ptr `[` $indices `]` attr-dict `:` type($base_ptr) `,` type($indices) `->` type(results) + }]; } // ----- diff --git a/mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp b/mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp index c4c7ff722175..154e955d6057 100644 --- a/mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp +++ b/mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp @@ -320,62 +320,12 @@ void AccessChainOp::build(OpBuilder &builder, OperationState &state, build(builder, state, type, basePtr, indices); } -ParseResult AccessChainOp::parse(OpAsmParser &parser, OperationState &result) { - OpAsmParser::UnresolvedOperand ptrInfo; - SmallVector indicesInfo; - Type type; - auto loc = parser.getCurrentLocation(); - SmallVector indicesTypes; - - if (parser.parseOperand(ptrInfo) || - parser.parseOperandList(indicesInfo, OpAsmParser::Delimiter::Square) || - parser.parseColonType(type) || - parser.resolveOperand(ptrInfo, type, result.operands)) { - return failure(); - } - - // Check that the provided indices list is not empty before parsing their - // type list. - if (indicesInfo.empty()) { - return mlir::emitError(result.location, - "'spirv.AccessChain' op expected at " - "least one index "); - } - - if (parser.parseComma() || parser.parseTypeList(indicesTypes)) - return failure(); - - // Check that the indices types list is not empty and that it has a one-to-one - // mapping to the provided indices. - if (indicesTypes.size() != indicesInfo.size()) { - return mlir::emitError( - result.location, "'spirv.AccessChain' op indices types' count must be " - "equal to indices info count"); - } - - if (parser.resolveOperands(indicesInfo, indicesTypes, loc, result.operands)) - return failure(); - - auto resultType = getElementPtrType( - type, llvm::ArrayRef(result.operands).drop_front(), result.location); - if (!resultType) { - return failure(); - } - - result.addTypes(resultType); - return success(); -} - template static void printAccessChain(Op op, ValueRange indices, OpAsmPrinter &printer) { printer << ' ' << op.getBasePtr() << '[' << indices << "] : " << op.getBasePtr().getType() << ", " << indices.getTypes(); } -void spirv::AccessChainOp::print(OpAsmPrinter &printer) { - printAccessChain(*this, getIndices(), printer); -} - template static LogicalResult verifyAccessChain(Op accessChainOp, ValueRange indices) { auto resultType = getElementPtrType(accessChainOp.getBasePtr().getType(), diff --git a/mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir b/mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir index 13eb3a194df4..665d0a33abed 100644 --- a/mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir +++ b/mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir @@ -11,7 +11,7 @@ module attributes {gpu.container_module} { %0 = spirv.mlir.addressof @kernel_arg_0 : !spirv.ptr [0])>, StorageBuffer> %2 = spirv.Constant 0 : i32 %3 = spirv.mlir.addressof @kernel_arg_0 : !spirv.ptr [0])>, StorageBuffer> - %4 = spirv.AccessChain %0[%2, %2] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %4 = spirv.AccessChain %0[%2, %2] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %5 = spirv.Load "StorageBuffer" %4 : f32 spirv.Return } diff --git a/mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir index 1847975b279a..803722294b31 100644 --- a/mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir +++ b/mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir @@ -11,7 +11,7 @@ spirv.func @access_chain() "None" { %1 = spirv.Variable : !spirv.ptr)>, Function> // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32 // CHECK: llvm.getelementptr %{{.*}}[%[[ZERO]], 1, %[[ONE]]] : (!llvm.ptr, i32, i32) -> !llvm.ptr, !llvm.struct)> - %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Function>, i32, i32 + %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Function>, i32, i32 -> !spirv.ptr spirv.Return } @@ -20,7 +20,7 @@ spirv.func @access_chain_array(%arg0 : i32) "None" { %0 = spirv.Variable : !spirv.ptr>, Function> // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32 // CHECK: llvm.getelementptr %{{.*}}[%[[ZERO]], %{{.*}}] : (!llvm.ptr, i32, i32) -> !llvm.ptr, !llvm.array<4 x array<4 x f32>> - %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr>, Function>, i32 + %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr>, Function>, i32 -> !spirv.ptr, Function> %2 = spirv.Load "Function" %1 ["Volatile"] : !spirv.array<4xf32> spirv.Return } diff --git a/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir b/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir index fcc5299e39d7..12bfee9fb651 100644 --- a/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir +++ b/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir @@ -8,21 +8,21 @@ func.func @access_chain_struct() -> () { %0 = spirv.Constant 1: i32 %1 = spirv.Variable : !spirv.ptr)>, Function> // CHECK: spirv.AccessChain {{.*}}[{{.*}}, {{.*}}] : !spirv.ptr)>, Function> - %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Function>, i32, i32 + %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Function>, i32, i32 -> !spirv.ptr return } func.func @access_chain_1D_array(%arg0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr, Function> // CHECK: spirv.AccessChain {{.*}}[{{.*}}] : !spirv.ptr, Function> - %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr, Function>, i32 + %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr, Function>, i32 -> !spirv.ptr return } func.func @access_chain_2D_array_1(%arg0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> // CHECK: spirv.AccessChain {{.*}}[{{.*}}, {{.*}}] : !spirv.ptr>, Function> - %1 = spirv.AccessChain %0[%arg0, %arg0] : !spirv.ptr>, Function>, i32, i32 + %1 = spirv.AccessChain %0[%arg0, %arg0] : !spirv.ptr>, Function>, i32, i32 -> !spirv.ptr %2 = spirv.Load "Function" %1 ["Volatile"] : f32 return } @@ -30,7 +30,7 @@ func.func @access_chain_2D_array_1(%arg0 : i32) -> () { func.func @access_chain_2D_array_2(%arg0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> // CHECK: spirv.AccessChain {{.*}}[{{.*}}] : !spirv.ptr>, Function> - %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr>, Function>, i32 + %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr>, Function>, i32 -> !spirv.ptr, Function> %2 = spirv.Load "Function" %1 ["Volatile"] : !spirv.array<4xf32> return } @@ -38,7 +38,7 @@ func.func @access_chain_2D_array_2(%arg0 : i32) -> () { func.func @access_chain_rtarray(%arg0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr, Function> // CHECK: spirv.AccessChain {{.*}}[{{.*}}] : !spirv.ptr, Function> - %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr, Function>, i32 + %1 = spirv.AccessChain %0[%arg0] : !spirv.ptr, Function>, i32 -> !spirv.ptr %2 = spirv.Load "Function" %1 ["Volatile"] : f32 return } @@ -49,7 +49,7 @@ func.func @access_chain_non_composite() -> () { %0 = spirv.Constant 1: i32 %1 = spirv.Variable : !spirv.ptr // expected-error @+1 {{cannot extract from non-composite type 'f32' with index 0}} - %2 = spirv.AccessChain %1[%0] : !spirv.ptr, i32 + %2 = spirv.AccessChain %1[%0] : !spirv.ptr, i32 -> !spirv.ptr return } @@ -57,8 +57,8 @@ func.func @access_chain_non_composite() -> () { func.func @access_chain_no_indices(%index0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> - // expected-error @+1 {{expected at least one index}} - %1 = spirv.AccessChain %0[] : !spirv.ptr>, Function>, i32 + // expected-error @+1 {{custom op 'spirv.AccessChain' 0 operands present, but expected 1}} + %1 = spirv.AccessChain %0[] : !spirv.ptr>, Function>, i32 -> !spirv.ptr return } @@ -75,8 +75,8 @@ func.func @access_chain_missing_comma(%index0 : i32) -> () { func.func @access_chain_invalid_indices_types_count(%index0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> - // expected-error @+1 {{'spirv.AccessChain' op indices types' count must be equal to indices info count}} - %1 = spirv.AccessChain %0[%index0] : !spirv.ptr>, Function>, i32, i32 + // expected-error @+1 {{custom op 'spirv.AccessChain' 1 operands present, but expected 2}} + %1 = spirv.AccessChain %0[%index0] : !spirv.ptr>, Function>, i32, i32 -> !spirv.ptr, Function> return } @@ -84,8 +84,8 @@ func.func @access_chain_invalid_indices_types_count(%index0 : i32) -> () { func.func @access_chain_missing_indices_type(%index0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> - // expected-error @+1 {{'spirv.AccessChain' op indices types' count must be equal to indices info count}} - %1 = spirv.AccessChain %0[%index0, %index0] : !spirv.ptr>, Function>, i32 + // expected-error @+1 {{custom op 'spirv.AccessChain' 2 operands present, but expected 1}} + %1 = spirv.AccessChain %0[%index0, %index0] : !spirv.ptr>, Function>, i32 -> !spirv.ptr return } @@ -94,8 +94,8 @@ func.func @access_chain_missing_indices_type(%index0 : i32) -> () { func.func @access_chain_invalid_type(%index0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> %1 = spirv.Load "Function" %0 ["Volatile"] : !spirv.array<4x!spirv.array<4xf32>> - // expected-error @+1 {{expected a pointer to composite type, but provided '!spirv.array<4 x !spirv.array<4 x f32>>'}} - %2 = spirv.AccessChain %1[%index0] : !spirv.array<4x!spirv.array<4xf32>>, i32 + // expected-error @+1 {{'spirv.AccessChain' op operand #0 must be any SPIR-V pointer type, but got '!spirv.array<4 x !spirv.array<4 x f32>>'}} + %2 = spirv.AccessChain %1[%index0] : !spirv.array<4x!spirv.array<4xf32>>, i32 -> f32 return } @@ -113,7 +113,7 @@ func.func @access_chain_invalid_index_1(%index0 : i32) -> () { func.func @access_chain_invalid_index_2(%index0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr)>, Function> // expected-error @+1 {{index must be an integer spirv.Constant to access element of spirv.struct}} - %1 = spirv.AccessChain %0[%index0, %index0] : !spirv.ptr)>, Function>, i32, i32 + %1 = spirv.AccessChain %0[%index0, %index0] : !spirv.ptr)>, Function>, i32, i32 -> !spirv.ptr return } @@ -123,7 +123,7 @@ func.func @access_chain_invalid_constant_type_1() -> () { %0 = arith.constant 1: i32 %1 = spirv.Variable : !spirv.ptr)>, Function> // expected-error @+1 {{index must be an integer spirv.Constant to access element of spirv.struct, but provided arith.constant}} - %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Function>, i32, i32 + %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Function>, i32, i32 -> !spirv.ptr return } @@ -133,7 +133,7 @@ func.func @access_chain_out_of_bounds() -> () { %index0 = "spirv.Constant"() { value = 12: i32} : () -> i32 %0 = spirv.Variable : !spirv.ptr)>, Function> // expected-error @+1 {{'spirv.AccessChain' op index 12 out of bounds for '!spirv.struct<(f32, !spirv.array<4 x f32>)>'}} - %1 = spirv.AccessChain %0[%index0, %index0] : !spirv.ptr)>, Function>, i32, i32 + %1 = spirv.AccessChain %0[%index0, %index0] : !spirv.ptr)>, Function>, i32, i32 -> !spirv.ptr return } @@ -142,9 +142,9 @@ func.func @access_chain_out_of_bounds() -> () { func.func @access_chain_invalid_accessing_type(%index0 : i32) -> () { %0 = spirv.Variable : !spirv.ptr>, Function> // expected-error @+1 {{cannot extract from non-composite type 'f32' with index 0}} - %1 = spirv.AccessChain %0[%index, %index0, %index0] : !spirv.ptr>, Function>, i32, i32, i32 + %1 = spirv.AccessChain %0[%index0, %index0, %index0] : !spirv.ptr>, Function>, i32, i32, i32 -> !spirv.ptr return - +} // ----- //===----------------------------------------------------------------------===// diff --git a/mlir/test/Dialect/SPIRV/IR/structure-ops.mlir b/mlir/test/Dialect/SPIRV/IR/structure-ops.mlir index 1eed5892a085..5e98b9fdb3c5 100644 --- a/mlir/test/Dialect/SPIRV/IR/structure-ops.mlir +++ b/mlir/test/Dialect/SPIRV/IR/structure-ops.mlir @@ -11,7 +11,7 @@ spirv.module Logical GLSL450 { // CHECK: [[VAR1:%.*]] = spirv.mlir.addressof @var1 : !spirv.ptr)>, Input> // CHECK-NEXT: spirv.AccessChain [[VAR1]][{{.*}}, {{.*}}] : !spirv.ptr)>, Input> %1 = spirv.mlir.addressof @var1 : !spirv.ptr)>, Input> - %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Input>, i32, i32 + %2 = spirv.AccessChain %1[%0, %0] : !spirv.ptr)>, Input>, i32, i32 -> !spirv.ptr spirv.Return } } diff --git a/mlir/test/Dialect/SPIRV/Transforms/abi-load-store.mlir b/mlir/test/Dialect/SPIRV/Transforms/abi-load-store.mlir index 6a5edc7f1781..4fdb6799c97f 100644 --- a/mlir/test/Dialect/SPIRV/Transforms/abi-load-store.mlir +++ b/mlir/test/Dialect/SPIRV/Transforms/abi-load-store.mlir @@ -103,14 +103,14 @@ spirv.module Logical GLSL450 { %37 = spirv.IAdd %arg4, %11 : i32 // CHECK: spirv.AccessChain [[ARG0]] %c0 = spirv.Constant 0 : i32 - %38 = spirv.AccessChain %arg0[%c0, %36, %37] : !spirv.ptr>)>, StorageBuffer>, i32, i32, i32 + %38 = spirv.AccessChain %arg0[%c0, %36, %37] : !spirv.ptr>)>, StorageBuffer>, i32, i32, i32 -> !spirv.ptr %39 = spirv.Load "StorageBuffer" %38 : f32 // CHECK: spirv.AccessChain [[ARG1]] - %40 = spirv.AccessChain %arg1[%c0, %36, %37] : !spirv.ptr>)>, StorageBuffer>, i32, i32, i32 + %40 = spirv.AccessChain %arg1[%c0, %36, %37] : !spirv.ptr>)>, StorageBuffer>, i32, i32, i32 -> !spirv.ptr %41 = spirv.Load "StorageBuffer" %40 : f32 %42 = spirv.FAdd %39, %41 : f32 // CHECK: spirv.AccessChain [[ARG2]] - %43 = spirv.AccessChain %arg2[%c0, %36, %37] : !spirv.ptr>)>, StorageBuffer>, i32, i32, i32 + %43 = spirv.AccessChain %arg2[%c0, %36, %37] : !spirv.ptr>)>, StorageBuffer>, i32, i32, i32 -> !spirv.ptr spirv.Store "StorageBuffer" %43, %42 : f32 spirv.Return } diff --git a/mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir b/mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir index d07389d6822c..3a775e209903 100644 --- a/mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir +++ b/mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir @@ -11,8 +11,8 @@ func.func @combine_full_access_chain() -> f32 { // CHECK-NEXT: spirv.Load "Function" %[[PTR]] %c0 = spirv.Constant 0: i32 %0 = spirv.Variable : !spirv.ptr>, !spirv.array<4xi32>)>, Function> - %1 = spirv.AccessChain %0[%c0] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 - %2 = spirv.AccessChain %1[%c0, %c0] : !spirv.ptr>, Function>, i32, i32 + %1 = spirv.AccessChain %0[%c0] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 -> !spirv.ptr>, Function> + %2 = spirv.AccessChain %1[%c0, %c0] : !spirv.ptr>, Function>, i32, i32 -> !spirv.ptr %3 = spirv.Load "Function" %2 : f32 spirv.ReturnValue %3 : f32 } @@ -28,9 +28,9 @@ func.func @combine_access_chain_multi_use() -> !spirv.array<4xf32> { // CHECK-NEXT: spirv.Load "Function" %[[PTR_1]] %c0 = spirv.Constant 0: i32 %0 = spirv.Variable : !spirv.ptr>, !spirv.array<4xi32>)>, Function> - %1 = spirv.AccessChain %0[%c0] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 - %2 = spirv.AccessChain %1[%c0] : !spirv.ptr>, Function>, i32 - %3 = spirv.AccessChain %2[%c0] : !spirv.ptr, Function>, i32 + %1 = spirv.AccessChain %0[%c0] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 -> !spirv.ptr>, Function> + %2 = spirv.AccessChain %1[%c0] : !spirv.ptr>, Function>, i32 -> !spirv.ptr, Function> + %3 = spirv.AccessChain %2[%c0] : !spirv.ptr, Function>, i32 -> !spirv.ptr %4 = spirv.Load "Function" %2 : !spirv.array<4xf32> %5 = spirv.Load "Function" %3 : f32 spirv.ReturnValue %4: !spirv.array<4xf32> @@ -49,8 +49,8 @@ func.func @dont_combine_access_chain_without_common_base() -> !spirv.array<4xi32 %c1 = spirv.Constant 1: i32 %0 = spirv.Variable : !spirv.ptr>, !spirv.array<4xi32>)>, Function> %1 = spirv.Variable : !spirv.ptr>, !spirv.array<4xi32>)>, Function> - %2 = spirv.AccessChain %0[%c1] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 - %3 = spirv.AccessChain %1[%c1] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 + %2 = spirv.AccessChain %0[%c1] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 -> !spirv.ptr, Function> + %3 = spirv.AccessChain %1[%c1] : !spirv.ptr>, !spirv.array<4xi32>)>, Function>, i32 -> !spirv.ptr, Function> %4 = spirv.Load "Function" %2 : !spirv.array<4xi32> %5 = spirv.Load "Function" %3 : !spirv.array<4xi32> spirv.ReturnValue %4 : !spirv.array<4xi32> diff --git a/mlir/test/Dialect/SPIRV/Transforms/inlining.mlir b/mlir/test/Dialect/SPIRV/Transforms/inlining.mlir index 3aadb19ec158..bd3c66501313 100644 --- a/mlir/test/Dialect/SPIRV/Transforms/inlining.mlir +++ b/mlir/test/Dialect/SPIRV/Transforms/inlining.mlir @@ -37,7 +37,7 @@ spirv.module Logical GLSL450 { spirv.func @callee() "None" { %0 = spirv.mlir.addressof @data : !spirv.ptr [0])>, StorageBuffer> %1 = spirv.Constant 0: i32 - %2 = spirv.AccessChain %0[%1, %1] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %2 = spirv.AccessChain %0[%1, %1] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Branch ^next ^next: @@ -196,7 +196,7 @@ spirv.module Logical GLSL450 { // CHECK: [[VAL:%.*]] = spirv.Load "StorageBuffer" [[LOADPTR]] %2 = spirv.mlir.addressof @arg_0 : !spirv.ptr, StorageBuffer> %3 = spirv.mlir.addressof @arg_1 : !spirv.ptr, StorageBuffer> - %4 = spirv.AccessChain %2[%1] : !spirv.ptr, StorageBuffer>, i32 + %4 = spirv.AccessChain %2[%1] : !spirv.ptr, StorageBuffer>, i32 -> !spirv.ptr %5 = spirv.Load "StorageBuffer" %4 : i32 %6 = spirv.SGreaterThan %5, %1 : i32 // CHECK: spirv.mlir.selection @@ -204,7 +204,7 @@ spirv.module Logical GLSL450 { spirv.BranchConditional %6, ^bb1, ^bb2 ^bb1: // pred: ^bb0 // CHECK: [[STOREPTR:%.*]] = spirv.AccessChain [[ADDRESS_ARG1]] - %7 = spirv.AccessChain %3[%1] : !spirv.ptr, StorageBuffer>, i32 + %7 = spirv.AccessChain %3[%1] : !spirv.ptr, StorageBuffer>, i32 -> !spirv.ptr // CHECK-NOT: spirv.FunctionCall // CHECK: spirv.AtomicIAdd [[STOREPTR]], [[VAL]] // CHECK: spirv.Branch diff --git a/mlir/test/Dialect/SPIRV/Transforms/layout-decoration.mlir b/mlir/test/Dialect/SPIRV/Transforms/layout-decoration.mlir index d2c9f832346c..656bd43c6ed9 100644 --- a/mlir/test/Dialect/SPIRV/Transforms/layout-decoration.mlir +++ b/mlir/test/Dialect/SPIRV/Transforms/layout-decoration.mlir @@ -24,7 +24,7 @@ spirv.module Logical GLSL450 { // CHECK: {{%.*}} = spirv.mlir.addressof @var0 : !spirv.ptr [4], f32 [12])>, Uniform> %0 = spirv.mlir.addressof @var0 : !spirv.ptr, f32)>, Uniform> // CHECK: {{%.*}} = spirv.AccessChain {{%.*}}[{{%.*}}] : !spirv.ptr [4], f32 [12])>, Uniform> - %1 = spirv.AccessChain %0[%c0] : !spirv.ptr, f32)>, Uniform>, i32 + %1 = spirv.AccessChain %0[%c0] : !spirv.ptr, f32)>, Uniform>, i32 -> !spirv.ptr spirv.Return } } diff --git a/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir b/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir index ac9589ba2432..f5cd490c164d 100644 --- a/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir +++ b/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir @@ -7,7 +7,7 @@ spirv.module Logical GLSL450 { spirv.func @load_store_scalar(%index: i32) -> f32 "None" { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %value = spirv.Load "StorageBuffer" %ac : f32 spirv.Store "StorageBuffer" %ac, %value : f32 spirv.ReturnValue %value : f32 @@ -39,7 +39,7 @@ spirv.module Logical GLSL450 { spirv.func @load_store_scalar_64bit(%index: i64) -> f32 "None" { %c0 = spirv.Constant 0 : i64 %addr = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i64, i64 + %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i64, i64 -> !spirv.ptr %value = spirv.Load "StorageBuffer" %ac : f32 spirv.Store "StorageBuffer" %ac, %value : f32 spirv.ReturnValue %value : f32 @@ -66,9 +66,9 @@ spirv.module Logical GLSL450 { spirv.func @multiple_uses(%i0: i32, %i1: i32) -> f32 "None" { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val0 = spirv.Load "StorageBuffer" %ac0 : f32 - %ac1 = spirv.AccessChain %addr[%c0, %i1] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr[%c0, %i1] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val1 = spirv.Load "StorageBuffer" %ac1 : f32 %value = spirv.FAdd %val0, %val1 : f32 spirv.ReturnValue %value : f32 @@ -95,7 +95,7 @@ spirv.module Logical GLSL450 { spirv.func @vector3(%index: i32) -> f32 "None" { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %value = spirv.Load "StorageBuffer" %ac : f32 spirv.ReturnValue %value : f32 } @@ -116,7 +116,7 @@ spirv.module Logical GLSL450 { spirv.func @not_aliased(%index: i32) -> f32 "None" { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %value = spirv.Load "StorageBuffer" %ac : f32 spirv.Store "StorageBuffer" %ac, %value : f32 spirv.ReturnValue %value : f32 @@ -141,15 +141,15 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr0 = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val0 = spirv.Load "StorageBuffer" %ac0 : f32 %addr1 = spirv.mlir.addressof @var01s_1 : !spirv.ptr [0])>, StorageBuffer> - %ac1 = spirv.AccessChain %addr1[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr1[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val1 = spirv.Load "StorageBuffer" %ac1 : f32 %addr2 = spirv.mlir.addressof @var01v_1 : !spirv.ptr, stride=16> [0])>, StorageBuffer> - %ac2 = spirv.AccessChain %addr2[%c0, %index, %c0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32, i32 + %ac2 = spirv.AccessChain %addr2[%c0, %index, %c0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32, i32 -> !spirv.ptr %val2 = spirv.Load "StorageBuffer" %ac2 : f32 %add0 = spirv.FAdd %val0, %val1 : f32 @@ -182,11 +182,11 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr0 = spirv.mlir.addressof @var01s_i32 : !spirv.ptr [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val0 = spirv.Load "StorageBuffer" %ac0 : i32 %addr1 = spirv.mlir.addressof @var01s_f32 : !spirv.ptr [0])>, StorageBuffer> - %ac1 = spirv.AccessChain %addr1[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr1[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Store "StorageBuffer" %ac1, %val1 : f32 spirv.ReturnValue %val0 : i32 @@ -219,7 +219,7 @@ spirv.module Logical GLSL450 { spirv.func @different_primitive_type(%index: i32, %val0: i32) -> i32 "None" { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01s : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val1 = spirv.Load "StorageBuffer" %ac : i32 spirv.Store "StorageBuffer" %ac, %val0 : i32 spirv.ReturnValue %val1 : i32 @@ -251,7 +251,7 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr0 = spirv.mlir.addressof @var01s_i64 : !spirv.ptr [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val0 = spirv.Load "StorageBuffer" %ac0 : i64 spirv.ReturnValue %val0 : i64 @@ -292,13 +292,13 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr0 = spirv.mlir.addressof @var01s_f32 : !spirv.ptr [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %f32val = spirv.Load "StorageBuffer" %ac0 : f32 %f64val = spirv.FConvert %f32val : f32 to f64 %i64val = spirv.Bitcast %f64val : f64 to i64 %addr1 = spirv.mlir.addressof @var01s_i64 : !spirv.ptr [0])>, StorageBuffer> - %ac1 = spirv.AccessChain %addr1[%c0, %i1] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr1[%c0, %i1] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr // expected-error@+1 {{failed to legalize operation 'spirv.Store'}} spirv.Store "StorageBuffer" %ac1, %i64val : i64 @@ -317,11 +317,11 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr0 = spirv.mlir.addressof @var01_vec4 : !spirv.ptr, stride=16> [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %i0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %i0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr, StorageBuffer> %vec4val = spirv.Load "StorageBuffer" %ac0 : vector<4xf32> %addr1 = spirv.mlir.addressof @var01_scalar : !spirv.ptr [0])>, StorageBuffer> - %ac1 = spirv.AccessChain %addr1[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr1[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %scalarval = spirv.Load "StorageBuffer" %ac1 : f32 %val = spirv.CompositeInsert %scalarval, %vec4val[0 : i32] : f32 into vector<4xf32> @@ -368,15 +368,15 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr0 = spirv.mlir.addressof @var01_v4f32 : !spirv.ptr, stride=16> [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %i0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %i0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr, StorageBuffer> %vec4val = spirv.Load "StorageBuffer" %ac0 : vector<4xf32> %addr1 = spirv.mlir.addressof @var01_f32 : !spirv.ptr [0])>, StorageBuffer> - %ac1 = spirv.AccessChain %addr1[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr1[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %f32val = spirv.Load "StorageBuffer" %ac1 : f32 %addr2 = spirv.mlir.addressof @var01_i64 : !spirv.ptr [0])>, StorageBuffer> - %ac2 = spirv.AccessChain %addr2[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac2 = spirv.AccessChain %addr2[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %i64val = spirv.Load "StorageBuffer" %ac2 : i64 %i32val = spirv.SConvert %i64val : i64 to i32 %castval = spirv.Bitcast %i32val : i32 to f32 @@ -433,7 +433,7 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01_i64 : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val = spirv.Load "StorageBuffer" %ac : i64 spirv.ReturnValue %val : i64 @@ -462,7 +462,7 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var01_i16 : !spirv.ptr [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %val = spirv.Load "StorageBuffer" %ac : i16 spirv.ReturnValue %val : i16 @@ -486,7 +486,7 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %addr = spirv.mlir.addressof @var00_v4f32 : !spirv.ptr, stride=16> [0])>, StorageBuffer> - %ac = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32 + %ac = spirv.AccessChain %addr[%c0, %i0] : !spirv.ptr, stride=16> [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr, StorageBuffer> %val = spirv.Load "StorageBuffer" %ac : vector<4xf32> spirv.ReturnValue %val : vector<4xf32> @@ -516,11 +516,11 @@ spirv.module Logical GLSL450 { %c0 = spirv.Constant 0 : i32 %v0 = spirv.Constant dense<0.0> : vector<3xf32> %addr0 = spirv.mlir.addressof @var01_v2f16 : !spirv.ptr, stride=4> [0])>, StorageBuffer> - %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr, stride=4> [0])>, StorageBuffer>, i32, i32 + %ac0 = spirv.AccessChain %addr0[%c0, %index] : !spirv.ptr, stride=4> [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr, StorageBuffer> %value0 = spirv.Load "StorageBuffer" %ac0 : vector<2xf16> %addr1 = spirv.mlir.addressof @var01_v2f32 : !spirv.ptr, stride=8> [0])>, StorageBuffer> - %ac1 = spirv.AccessChain %addr1[%c0, %index] : !spirv.ptr, stride=8> [0])>, StorageBuffer>, i32, i32 + %ac1 = spirv.AccessChain %addr1[%c0, %index] : !spirv.ptr, stride=8> [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr, StorageBuffer> %value1 = spirv.Load "StorageBuffer" %ac1 : vector<2xf32> %val0_as_f32 = spirv.Bitcast %value0 : vector<2xf16> to f32 @@ -554,7 +554,7 @@ spirv.module Logical GLSL450 { spirv.module Logical GLSL450 { spirv.func @main(%arg0: !spirv.ptr [0])>, StorageBuffer>) "None" { %cst0_i32 = spirv.Constant 0 : i32 - %0 = spirv.AccessChain %arg0[%cst0_i32, %cst0_i32] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %0 = spirv.AccessChain %arg0[%cst0_i32, %cst0_i32] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Return } } diff --git a/mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir b/mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir index 427b92652724..1a3bc88633d0 100644 --- a/mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir +++ b/mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir @@ -3,7 +3,7 @@ spirv.module Logical GLSL450 requires #spirv.vce { spirv.func @array_stride(%arg0 : !spirv.ptr, stride=128>, StorageBuffer>, %arg1 : i32, %arg2 : i32) "None" { // CHECK: {{%.*}} = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr, stride=128>, StorageBuffer>, i32, i32 - %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr, stride=128>, StorageBuffer>, i32, i32 + %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr, stride=128>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Return } } diff --git a/mlir/test/Target/SPIRV/array.mlir b/mlir/test/Target/SPIRV/array.mlir index c01b295b1abe..56908e687a91 100644 --- a/mlir/test/Target/SPIRV/array.mlir +++ b/mlir/test/Target/SPIRV/array.mlir @@ -3,7 +3,7 @@ spirv.module Logical GLSL450 requires #spirv.vce { spirv.func @array_stride(%arg0 : !spirv.ptr, stride=128>, StorageBuffer>, %arg1 : i32, %arg2 : i32) "None" { // CHECK: {{%.*}} = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr, stride=128>, StorageBuffer>, i32, i32 - %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr, stride=128>, StorageBuffer>, i32, i32 + %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr, stride=128>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Return } } diff --git a/mlir/test/Target/SPIRV/debug.mlir b/mlir/test/Target/SPIRV/debug.mlir index d1cd71d65ca8..58bf364593fc 100644 --- a/mlir/test/Target/SPIRV/debug.mlir +++ b/mlir/test/Target/SPIRV/debug.mlir @@ -58,7 +58,7 @@ spirv.module Logical GLSL450 requires #spirv.vce { spirv.func @memory_accesses(%arg0 : !spirv.ptr>, StorageBuffer>, %arg1 : i32, %arg2 : i32) "None" { // CHECK: loc({{".*debug.mlir"}}:61:10) - %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr>, StorageBuffer>, i32, i32 + %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr>, StorageBuffer>, i32, i32 -> !spirv.ptr // CHECK: loc({{".*debug.mlir"}}:63:10) %3 = spirv.Load "StorageBuffer" %2 : f32 // CHECK: loc({{.*debug.mlir"}}:65:5) diff --git a/mlir/test/Target/SPIRV/global-variable.mlir b/mlir/test/Target/SPIRV/global-variable.mlir index 28b2706d3d16..a70ed316c68d 100644 --- a/mlir/test/Target/SPIRV/global-variable.mlir +++ b/mlir/test/Target/SPIRV/global-variable.mlir @@ -54,7 +54,7 @@ spirv.module Logical GLSL450 requires #spirv.vce { %0 = spirv.mlir.addressof @globalInvocationID : !spirv.ptr, Input> %1 = spirv.Constant 0: i32 // CHECK: spirv.AccessChain %[[ADDR]] - %2 = spirv.AccessChain %0[%1] : !spirv.ptr, Input>, i32 + %2 = spirv.AccessChain %0[%1] : !spirv.ptr, Input>, i32 -> !spirv.ptr spirv.Return } } diff --git a/mlir/test/Target/SPIRV/loop.mlir b/mlir/test/Target/SPIRV/loop.mlir index 08039ccc822d..d89600558f56 100644 --- a/mlir/test/Target/SPIRV/loop.mlir +++ b/mlir/test/Target/SPIRV/loop.mlir @@ -69,9 +69,9 @@ spirv.module Logical GLSL450 requires #spirv.vce { spirv.func @loop_kernel() "None" { %0 = spirv.mlir.addressof @GV1 : !spirv.ptr [0])>, StorageBuffer> %1 = spirv.Constant 0 : i32 - %2 = spirv.AccessChain %0[%1] : !spirv.ptr [0])>, StorageBuffer>, i32 + %2 = spirv.AccessChain %0[%1] : !spirv.ptr [0])>, StorageBuffer>, i32 -> !spirv.ptr, StorageBuffer> %3 = spirv.mlir.addressof @GV2 : !spirv.ptr [0])>, StorageBuffer> - %5 = spirv.AccessChain %3[%1] : !spirv.ptr [0])>, StorageBuffer>, i32 + %5 = spirv.AccessChain %3[%1] : !spirv.ptr [0])>, StorageBuffer>, i32 -> !spirv.ptr, StorageBuffer> %6 = spirv.Constant 4 : i32 %7 = spirv.Constant 42 : i32 %8 = spirv.Constant 2 : i32 @@ -88,9 +88,9 @@ spirv.module Logical GLSL450 requires #spirv.vce { spirv.BranchConditional %10, ^body, ^merge // CHECK-NEXT: ^bb2: // pred: ^bb1 ^body: - %11 = spirv.AccessChain %2[%9] : !spirv.ptr, StorageBuffer>, i32 + %11 = spirv.AccessChain %2[%9] : !spirv.ptr, StorageBuffer>, i32 -> !spirv.ptr %12 = spirv.Load "StorageBuffer" %11 : f32 - %13 = spirv.AccessChain %5[%9] : !spirv.ptr, StorageBuffer>, i32 + %13 = spirv.AccessChain %5[%9] : !spirv.ptr, StorageBuffer>, i32 -> !spirv.ptr spirv.Store "StorageBuffer" %13, %12 : f32 // CHECK: %[[ADD:.*]] = spirv.IAdd %14 = spirv.IAdd %9, %8 : i32 diff --git a/mlir/test/Target/SPIRV/matrix.mlir b/mlir/test/Target/SPIRV/matrix.mlir index b52c3f4aa2f1..2a391df4bff3 100644 --- a/mlir/test/Target/SPIRV/matrix.mlir +++ b/mlir/test/Target/SPIRV/matrix.mlir @@ -4,7 +4,7 @@ spirv.module Logical GLSL450 requires #spirv.vce { // CHECK-LABEL: @matrix_access_chain spirv.func @matrix_access_chain(%arg0 : !spirv.ptr>, Function>, %arg1 : i32) -> !spirv.ptr, Function> "None" { // CHECK: {{%.*}} = spirv.AccessChain {{%.*}}[{{%.*}}] : !spirv.ptr>, Function> - %0 = spirv.AccessChain %arg0[%arg1] : !spirv.ptr>,Function>, i32 + %0 = spirv.AccessChain %arg0[%arg1] : !spirv.ptr>, Function>, i32 -> !spirv.ptr, Function> spirv.ReturnValue %0 : !spirv.ptr, Function> } diff --git a/mlir/test/Target/SPIRV/memory-ops.mlir b/mlir/test/Target/SPIRV/memory-ops.mlir index f7abdabeac3e..6b50c3921d42 100644 --- a/mlir/test/Target/SPIRV/memory-ops.mlir +++ b/mlir/test/Target/SPIRV/memory-ops.mlir @@ -28,8 +28,8 @@ spirv.module Logical GLSL450 requires #spirv.vce { spirv.func @access_chain(%arg0 : !spirv.ptr>, Function>, %arg1 : i32, %arg2 : i32) "None" { // CHECK: {{%.*}} = spirv.AccessChain {{%.*}}[{{%.*}}] : !spirv.ptr>, Function> // CHECK-NEXT: {{%.*}} = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr>, Function> - %1 = spirv.AccessChain %arg0[%arg1] : !spirv.ptr>, Function>, i32 - %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr>, Function>, i32, i32 + %1 = spirv.AccessChain %arg0[%arg1] : !spirv.ptr>, Function>, i32 -> !spirv.ptr, Function> + %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr>, Function>, i32, i32 -> !spirv.ptr spirv.Return } } @@ -41,13 +41,13 @@ spirv.module Logical GLSL450 requires #spirv.vce { // CHECK: [[LOAD_PTR:%.*]] = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr [0])> // CHECK-NEXT: [[VAL:%.*]] = spirv.Load "StorageBuffer" [[LOAD_PTR]] : f32 %0 = spirv.Constant 0 : i32 - %1 = spirv.AccessChain %arg0[%0, %0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %1 = spirv.AccessChain %arg0[%0, %0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %2 = spirv.Load "StorageBuffer" %1 : f32 // CHECK: [[STORE_PTR:%.*]] = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr [0])> // CHECK-NEXT: spirv.Store "StorageBuffer" [[STORE_PTR]], [[VAL]] : f32 %3 = spirv.Constant 0 : i32 - %4 = spirv.AccessChain %arg1[%3, %3] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %4 = spirv.AccessChain %arg1[%3, %3] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Store "StorageBuffer" %4, %2 : f32 spirv.Return } @@ -56,13 +56,13 @@ spirv.module Logical GLSL450 requires #spirv.vce { // CHECK: [[LOAD_PTR:%.*]] = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr [0])> // CHECK-NEXT: [[VAL:%.*]] = spirv.Load "StorageBuffer" [[LOAD_PTR]] : i32 %0 = spirv.Constant 0 : i32 - %1 = spirv.AccessChain %arg0[%0, %0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %1 = spirv.AccessChain %arg0[%0, %0] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr %2 = spirv.Load "StorageBuffer" %1 : i32 // CHECK: [[STORE_PTR:%.*]] = spirv.AccessChain {{%.*}}[{{%.*}}, {{%.*}}] : !spirv.ptr [0])> // CHECK-NEXT: spirv.Store "StorageBuffer" [[STORE_PTR]], [[VAL]] : i32 %3 = spirv.Constant 0 : i32 - %4 = spirv.AccessChain %arg1[%3, %3] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 + %4 = spirv.AccessChain %arg1[%3, %3] : !spirv.ptr [0])>, StorageBuffer>, i32, i32 -> !spirv.ptr spirv.Store "StorageBuffer" %4, %2 : i32 spirv.Return } diff --git a/mlir/test/Target/SPIRV/physical-storage-buffer.mlir b/mlir/test/Target/SPIRV/physical-storage-buffer.mlir index 040cfb891cb3..7cbd3f94e55f 100644 --- a/mlir/test/Target/SPIRV/physical-storage-buffer.mlir +++ b/mlir/test/Target/SPIRV/physical-storage-buffer.mlir @@ -26,17 +26,17 @@ spirv.module PhysicalStorageBuffer64 GLSL450 requires #spirv.vce !spirv.ptr %b2_ptr = spirv.Load "StorageBuffer" %s0_b2_ptr : !f32_binding_ptr - %b2_data_ptr = spirv.AccessChain %b2_ptr[%idx0, %idx0] : !f32_binding_ptr, i64, i64 + %b2_data_ptr = spirv.AccessChain %b2_ptr[%idx0, %idx0] : !f32_binding_ptr, i64, i64 -> !spirv.ptr // CHECK: spirv.Load "PhysicalStorageBuffer" %b2_data = spirv.Load "PhysicalStorageBuffer" %b2_data_ptr ["Aligned", 4] : f32 %set_1_addr = spirv.mlir.addressof @set_1 : !set_1_ptr - %s1_b1_ptr = spirv.AccessChain %set_1_addr[%idx1] : !set_1_ptr, i64 + %s1_b1_ptr = spirv.AccessChain %set_1_addr[%idx1] : !set_1_ptr, i64 -> !spirv.ptr %b1_ptr = spirv.Load "StorageBuffer" %s1_b1_ptr : !f32_binding_ptr - %b1_data_ptr = spirv.AccessChain %b1_ptr[%idx0, %idx0] : !f32_binding_ptr, i64, i64 + %b1_data_ptr = spirv.AccessChain %b1_ptr[%idx0, %idx0] : !f32_binding_ptr, i64, i64 -> !spirv.ptr // CHECK: spirv.Store "PhysicalStorageBuffer" spirv.Store "PhysicalStorageBuffer" %b1_data_ptr, %b2_data ["Aligned", 4] : f32 diff --git a/mlir/test/Target/SPIRV/undef.mlir b/mlir/test/Target/SPIRV/undef.mlir index 217018184429..b9044fe8b40a 100644 --- a/mlir/test/Target/SPIRV/undef.mlir +++ b/mlir/test/Target/SPIRV/undef.mlir @@ -16,7 +16,7 @@ spirv.module Logical GLSL450 requires #spirv.vce { // CHECK: {{%.*}} = spirv.Undef : !spirv.ptr, StorageBuffer> %7 = spirv.Undef : !spirv.ptr, StorageBuffer> %8 = spirv.Constant 0 : i32 - %9 = spirv.AccessChain %7[%8] : !spirv.ptr, StorageBuffer>, i32 + %9 = spirv.AccessChain %7[%8] : !spirv.ptr, StorageBuffer>, i32 -> !spirv.ptr spirv.Return } }