[ARM] Add new test that will demonstrate the cmn node in the ARM backend (NFC) (#179282)
No code changes yet, but this is going to change once the cmn node lands in the backend.
This commit is contained in:
SiliconA-Z
GitHub
parent
0732841440
commit
c061f33f66
478
llvm/test/CodeGen/ARM/cmp-to-cmn.ll
Normal file
478
llvm/test/CodeGen/ARM/cmp-to-cmn.ll
Normal file
@ -0,0 +1,478 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
|
||||
; RUN: llc -mtriple=armv7 %s -o - | FileCheck %s --check-prefixes=CHECK-ARM
|
||||
; RUN: llc -mtriple=thumb-eabi -mcpu=arm7tdmi %s -o - | FileCheck %s --check-prefix=CHECK-T1
|
||||
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s --check-prefix=CHECK-T2
|
||||
define i1 @cmn_large_imm(i32 %a) {
|
||||
; CHECK-ARM-LABEL: cmn_large_imm:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #64765
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #64764
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwgt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: cmn_large_imm:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI0_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bgt .LBB0_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB0_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI0_0:
|
||||
; CHECK-T1-NEXT: .long 4244438269 @ 0xfcfcfcfd
|
||||
;
|
||||
; CHECK-T2-LABEL: cmn_large_imm:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmn.w r0, #50529027
|
||||
; CHECK-T2-NEXT: it gt
|
||||
; CHECK-T2-NEXT: movgt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp sgt i32 %a, -50529027
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_slt(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_slt:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4097
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65281
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwlt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_slt:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI1_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: blt .LBB1_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB1_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI1_0:
|
||||
; CHECK-T1-NEXT: .long 4278259713 @ 0xff011001
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_slt:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4097
|
||||
; CHECK-T2-NEXT: movt r2, #65281
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it lt
|
||||
; CHECK-T2-NEXT: movlt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp slt i32 %x, -16707583
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_sge(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_sge:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4096
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65281
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwgt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_sge:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI2_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bgt .LBB2_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB2_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI2_0:
|
||||
; CHECK-T1-NEXT: .long 4278259712 @ 0xff011000
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_sge:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4096
|
||||
; CHECK-T2-NEXT: movt r2, #65281
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it gt
|
||||
; CHECK-T2-NEXT: movgt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp sge i32 %x, -16707583
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_uge(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_uge:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4096
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65281
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwhi r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_uge:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI3_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bhi .LBB3_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB3_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI3_0:
|
||||
; CHECK-T1-NEXT: .long 4278259712 @ 0xff011000
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_uge:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4096
|
||||
; CHECK-T2-NEXT: movt r2, #65281
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it hi
|
||||
; CHECK-T2-NEXT: movhi r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp uge i32 %x, -16707583
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_ult(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_ult:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4097
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65281
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwlo r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_ult:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI4_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: blo .LBB4_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB4_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI4_0:
|
||||
; CHECK-T1-NEXT: .long 4278259713 @ 0xff011001
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_ult:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4097
|
||||
; CHECK-T2-NEXT: movt r2, #65281
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it lo
|
||||
; CHECK-T2-NEXT: movlo r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp ult i32 %x, -16707583
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_sle(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_sle:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4096
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65280
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwlt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_sle:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI5_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: blt .LBB5_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB5_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI5_0:
|
||||
; CHECK-T1-NEXT: .long 4278194176 @ 0xff001000
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_sle:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4096
|
||||
; CHECK-T2-NEXT: movt r2, #65280
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it lt
|
||||
; CHECK-T2-NEXT: movlt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp sle i32 %x, -16773121
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_sgt(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_sgt:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4095
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65280
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwgt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_sgt:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI6_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bgt .LBB6_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB6_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI6_0:
|
||||
; CHECK-T1-NEXT: .long 4278194175 @ 0xff000fff
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_sgt:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4095
|
||||
; CHECK-T2-NEXT: movt r2, #65280
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it gt
|
||||
; CHECK-T2-NEXT: movgt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp sgt i32 %x, -16773121
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_ule(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_ule:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4096
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65280
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwlo r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_ule:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI7_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: blo .LBB7_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB7_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI7_0:
|
||||
; CHECK-T1-NEXT: .long 4278194176 @ 0xff001000
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_ule:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4096
|
||||
; CHECK-T2-NEXT: movt r2, #65280
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it lo
|
||||
; CHECK-T2-NEXT: movlo r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp ule i32 %x, -16773121
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @almost_immediate_neg_ugt(i32 %x) {
|
||||
; CHECK-ARM-LABEL: almost_immediate_neg_ugt:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: movw r2, #4095
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: movt r2, #65280
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwhi r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: almost_immediate_neg_ugt:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: ldr r1, .LCPI8_0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bhi .LBB8_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB8_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .p2align 2
|
||||
; CHECK-T1-NEXT: @ %bb.3:
|
||||
; CHECK-T1-NEXT: .LCPI8_0:
|
||||
; CHECK-T1-NEXT: .long 4278194175 @ 0xff000fff
|
||||
;
|
||||
; CHECK-T2-LABEL: almost_immediate_neg_ugt:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: movw r2, #4095
|
||||
; CHECK-T2-NEXT: movt r2, #65280
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it hi
|
||||
; CHECK-T2-NEXT: movhi r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%cmp = icmp ugt i32 %x, -16773121
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @cmn_nsw(i32 %a, i32 %b) {
|
||||
; CHECK-ARM-LABEL: cmn_nsw:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: rsb r2, r1, #0
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwgt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: cmn_nsw:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: rsbs r1, r1, #0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bgt .LBB9_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB9_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T2-LABEL: cmn_nsw:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: rsbs r2, r1, #0
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it gt
|
||||
; CHECK-T2-NEXT: movgt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%sub = sub nsw i32 0, %b
|
||||
%cmp = icmp sgt i32 %a, %sub
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @cmn_nsw_neg(i32 %a, i32 %b) {
|
||||
; CHECK-ARM-LABEL: cmn_nsw_neg:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: rsb r2, r1, #0
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: cmp r0, r2
|
||||
; CHECK-ARM-NEXT: movwgt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: cmn_nsw_neg:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: rsbs r1, r1, #0
|
||||
; CHECK-T1-NEXT: cmp r0, r1
|
||||
; CHECK-T1-NEXT: bgt .LBB10_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB10_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T2-LABEL: cmn_nsw_neg:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: rsbs r2, r1, #0
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r0, r2
|
||||
; CHECK-T2-NEXT: it gt
|
||||
; CHECK-T2-NEXT: movgt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%sub = sub i32 0, %b
|
||||
%cmp = icmp sgt i32 %a, %sub
|
||||
ret i1 %cmp
|
||||
}
|
||||
|
||||
define i1 @cmn_swap(i32 %a, i32 %b) {
|
||||
; CHECK-ARM-LABEL: cmn_swap:
|
||||
; CHECK-ARM: @ %bb.0:
|
||||
; CHECK-ARM-NEXT: rsb r2, r1, #0
|
||||
; CHECK-ARM-NEXT: mov r1, #0
|
||||
; CHECK-ARM-NEXT: cmp r2, r0
|
||||
; CHECK-ARM-NEXT: movwgt r1, #1
|
||||
; CHECK-ARM-NEXT: mov r0, r1
|
||||
; CHECK-ARM-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T1-LABEL: cmn_swap:
|
||||
; CHECK-T1: @ %bb.0:
|
||||
; CHECK-T1-NEXT: rsbs r1, r1, #0
|
||||
; CHECK-T1-NEXT: cmp r1, r0
|
||||
; CHECK-T1-NEXT: bgt .LBB11_2
|
||||
; CHECK-T1-NEXT: @ %bb.1:
|
||||
; CHECK-T1-NEXT: movs r0, #0
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
; CHECK-T1-NEXT: .LBB11_2:
|
||||
; CHECK-T1-NEXT: movs r0, #1
|
||||
; CHECK-T1-NEXT: bx lr
|
||||
;
|
||||
; CHECK-T2-LABEL: cmn_swap:
|
||||
; CHECK-T2: @ %bb.0:
|
||||
; CHECK-T2-NEXT: rsbs r2, r1, #0
|
||||
; CHECK-T2-NEXT: movs r1, #0
|
||||
; CHECK-T2-NEXT: cmp r2, r0
|
||||
; CHECK-T2-NEXT: it gt
|
||||
; CHECK-T2-NEXT: movgt r1, #1
|
||||
; CHECK-T2-NEXT: mov r0, r1
|
||||
; CHECK-T2-NEXT: bx lr
|
||||
%sub = sub nsw i32 0, %b
|
||||
%cmp = icmp sgt i32 %sub, %a
|
||||
ret i1 %cmp
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user