[TailDup] Delay aggressive computed-goto taildup to after RegAlloc. (#150911)
Back-ports additional tests (eb9febb4a6b0, dc697de12792), refactoring (43c9c14577db) and functional change (18f1369297f4) in a single PR. https://github.com/llvm/llvm-project/pull/114990 allowed more aggressive tail duplication for computed-gotos in both pre- and post-regalloc tail duplication. In some cases, performing tail-duplication too early can lead to worse results, especially if we duplicate blocks with a number of phi nodes. This is causing a ~3% performance regression in some workloads using Python 3.12. This patch updates TailDup to delay aggressive tail-duplication for computed gotos to after register allocation. This means we can keep the non-duplicated version for a bit longer throughout the backend, which should reduce compile-time as well as allowing a number of optimizations and simplifications to trigger before drastically expanding the CFG. For the case in https://github.com/llvm/llvm-project/issues/106846, I get the same performance with and without this patch on Skylake. PR: https://github.com/llvm/llvm-project/pull/150911
This commit is contained in:
Florian Hahn
parent
993c5643ce
commit
c587c24db5
@ -323,10 +323,11 @@ public:
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const MachineFunction *getParent() const { return xParent; }
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MachineFunction *getParent() { return xParent; }
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/// Returns true if the original IR terminator is an `indirectbr`. This
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/// typically corresponds to a `goto` in C, rather than jump tables.
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bool terminatorIsComputedGoto() const {
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return back().isIndirectBranch() &&
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/// Returns true if the original IR terminator is an `indirectbr` with
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/// successor blocks. This typically corresponds to a `goto` in C, rather than
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/// jump tables.
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bool terminatorIsComputedGotoWithSuccessors() const {
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return back().isIndirectBranch() && !succ_empty() &&
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llvm::all_of(successors(), [](const MachineBasicBlock *Succ) {
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return Succ->isIRBlockAddressTaken();
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});
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@ -604,12 +604,23 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
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bool HasComputedGoto = false;
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if (!TailBB.empty()) {
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HasIndirectbr = TailBB.back().isIndirectBranch();
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HasComputedGoto = TailBB.terminatorIsComputedGoto();
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HasComputedGoto = TailBB.terminatorIsComputedGotoWithSuccessors();
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}
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if (HasIndirectbr && PreRegAlloc)
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MaxDuplicateCount = TailDupIndirectBranchSize;
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// Allow higher limits when the block has computed-gotos and running after
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// register allocation. NB. This basically unfactors computed gotos that were
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// factored early on in the compilation process to speed up edge based data
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// flow. If we do not unfactor them again, it can seriously pessimize code
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// with many computed jumps in the source code, such as interpreters.
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// Therefore we do not restrict the computed gotos.
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bool DupComputedGotoLate =
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HasComputedGoto && MF->getTarget().getTargetTriple().isOSDarwin();
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if (DupComputedGotoLate && !PreRegAlloc)
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MaxDuplicateCount = std::max(MaxDuplicateCount, 10u);
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// Check the instructions in the block to determine whether tail-duplication
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// is invalid or unlikely to be profitable.
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unsigned InstrCount = 0;
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@ -663,12 +674,10 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
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// Duplicating a BB which has both multiple predecessors and successors will
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// may cause huge amount of PHI nodes. If we want to remove this limitation,
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// we have to address https://github.com/llvm/llvm-project/issues/78578.
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// NB. This basically unfactors computed gotos that were factored early on in
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// the compilation process to speed up edge based data flow. If we do not
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// unfactor them again, it can seriously pessimize code with many computed
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// jumps in the source code, such as interpreters. Therefore we do not
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// restrict the computed gotos.
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if (!HasComputedGoto && TailBB.pred_size() > TailDupPredSize &&
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bool CheckSuccessorAndPredecessorSize =
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DupComputedGotoLate ? PreRegAlloc : !HasComputedGoto;
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if (CheckSuccessorAndPredecessorSize &&
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TailBB.pred_size() > TailDupPredSize &&
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TailBB.succ_size() > TailDupSuccSize) {
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// If TailBB or any of its successors contains a phi, we may have to add a
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// large number of additional phis with additional incoming values.
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143
llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
Normal file
143
llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
Normal file
@ -0,0 +1,143 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -tail-dup-pred-size=2 -tail-dup-succ-size=2 -o - %s | FileCheck %s
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target triple = "arm64-apple-macosx13.0.0"
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@opcode.targets = local_unnamed_addr constant [6 x ptr] [ptr blockaddress(@test_interp, %op1.bb), ptr blockaddress(@test_interp, %op6.bb), ptr blockaddress(@test_interp, %loop.header), ptr blockaddress(@test_interp, %op2.bb), ptr blockaddress(@test_interp, %op4.bb), ptr blockaddress(@test_interp, %op5.bb)]
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define void @test_interp(ptr %frame, ptr %dst) {
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; CHECK-LABEL: test_interp:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: stp x24, x23, [sp, #-64]! ; 16-byte Folded Spill
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; CHECK-NEXT: stp x22, x21, [sp, #16] ; 16-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #32] ; 16-byte Folded Spill
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; CHECK-NEXT: stp x29, x30, [sp, #48] ; 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 64
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; CHECK-NEXT: .cfi_offset w30, -8
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: .cfi_offset w19, -24
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; CHECK-NEXT: .cfi_offset w20, -32
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; CHECK-NEXT: .cfi_offset w21, -40
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; CHECK-NEXT: .cfi_offset w22, -48
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; CHECK-NEXT: .cfi_offset w23, -56
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; CHECK-NEXT: .cfi_offset w24, -64
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; CHECK-NEXT: Lloh0:
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; CHECK-NEXT: adrp x21, _opcode.targets@PAGE
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; CHECK-NEXT: Lloh1:
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; CHECK-NEXT: add x21, x21, _opcode.targets@PAGEOFF
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; CHECK-NEXT: mov x24, xzr
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; CHECK-NEXT: add x8, x21, xzr, lsl #3
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; CHECK-NEXT: mov x19, x1
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; CHECK-NEXT: mov x20, x0
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; CHECK-NEXT: mov x23, xzr
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; CHECK-NEXT: mov w22, #1 ; =0x1
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; CHECK-NEXT: add x24, x24, #1
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; CHECK-NEXT: br x8
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; CHECK-NEXT: Ltmp0: ; Block address taken
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; CHECK-NEXT: LBB0_1: ; %loop.header
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: add x8, x21, x24, lsl #3
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; CHECK-NEXT: mov x20, xzr
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; CHECK-NEXT: mov x23, xzr
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; CHECK-NEXT: add x24, x24, #1
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; CHECK-NEXT: br x8
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; CHECK-NEXT: Ltmp1: ; Block address taken
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; CHECK-NEXT: LBB0_2: ; %op1.bb
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; CHECK-NEXT: str xzr, [x19]
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; CHECK-NEXT: Ltmp2: ; Block address taken
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; CHECK-NEXT: LBB0_3: ; %op6.bb
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr x0, [x20, #-8]!
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; CHECK-NEXT: ldr x8, [x0, #8]
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; CHECK-NEXT: str x22, [x0]
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; CHECK-NEXT: ldr x8, [x8, #48]
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; CHECK-NEXT: blr x8
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; CHECK-NEXT: add x8, x21, x24, lsl #3
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; CHECK-NEXT: add x24, x24, #1
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; CHECK-NEXT: br x8
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; CHECK-NEXT: Ltmp3: ; Block address taken
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; CHECK-NEXT: LBB0_4: ; %op2.bb
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: add x8, x21, x24, lsl #3
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; CHECK-NEXT: mov x20, xzr
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; CHECK-NEXT: str x23, [x19]
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; CHECK-NEXT: mov x23, xzr
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; CHECK-NEXT: add x24, x24, #1
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; CHECK-NEXT: br x8
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; CHECK-NEXT: Ltmp4: ; Block address taken
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; CHECK-NEXT: LBB0_5: ; %op4.bb
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; CHECK-NEXT: Ltmp5: ; Block address taken
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; CHECK-NEXT: LBB0_6: ; %op5.bb
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: str x23, [x19]
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; CHECK-NEXT: ldur x8, [x23, #12]
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; CHECK-NEXT: ldur x9, [x20, #-8]
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; CHECK-NEXT: add x23, x23, #20
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; CHECK-NEXT: stp x8, x9, [x20, #-8]
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; CHECK-NEXT: add x8, x21, x24, lsl #3
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; CHECK-NEXT: add x20, x20, #8
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; CHECK-NEXT: add x24, x24, #1
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; CHECK-NEXT: br x8
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; CHECK-NEXT: .loh AdrpAdd Lloh0, Lloh1
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %op1.bb ], [ %iv.next, %op2.bb ], [ %iv.next, %op4.bb ], [ %iv.next, %op5.bb ], [ %iv.next, %op6.bb ], [ %iv.next, %loop.header ]
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%stack.pointer = phi ptr [ %frame, %entry ], [ %stack.8, %op1.bb ], [ null, %op2.bb ], [ %stack.next, %op4.bb ], [ %stack.next.2, %op5.bb ], [ %stack.4, %op6.bb ], [ null, %loop.header ]
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%next.instr = phi ptr [ null, %entry ], [ %next.instr, %op1.bb ], [ null, %op2.bb ], [ %next.instr.20, %op4.bb ], [ %next.instr.21, %op5.bb ], [ %next.instr, %op6.bb ], [ null, %loop.header ]
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%iv.next = add i64 %iv, 1
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%next_op = getelementptr [6 x ptr], ptr @opcode.targets, i64 0, i64 %iv
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indirectbr ptr %next_op, [label %op1.bb, label %op6.bb, label %loop.header, label %op2.bb, label %op4.bb, label %op5.bb]
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op1.bb:
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store ptr null, ptr %dst, align 8
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%stack.8 = getelementptr i8, ptr %stack.pointer, i64 -8
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%l.0 = load ptr, ptr %stack.8, align 8
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store i64 1, ptr %l.0, align 8
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%gep.0 = getelementptr i8, ptr %l.0, i64 8
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%l.1 = load ptr, ptr %gep.0, align 8
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%gep.1 = getelementptr i8, ptr %l.1, i64 48
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%l.2 = load ptr, ptr %gep.1, align 8
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tail call void %l.2(ptr nonnull %l.0)
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br label %loop.header
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op2.bb:
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store ptr %next.instr, ptr %dst, align 8
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br label %loop.header
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op4.bb:
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store ptr %next.instr, ptr %dst, align 8
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%next.instr.20 = getelementptr i8, ptr %next.instr, i64 20
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%stack.2 = getelementptr i8, ptr %stack.pointer, i64 -8
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%l.3 = load ptr, ptr %stack.2, align 8
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%next.instr.12 = getelementptr i8, ptr %next.instr, i64 12
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%next.instr.12.val = load ptr, ptr %next.instr.12, align 2
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store ptr %next.instr.12.val, ptr %stack.2, align 8
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store ptr %l.3, ptr %stack.pointer, align 8
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%stack.next = getelementptr i8, ptr %stack.pointer, i64 8
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br label %loop.header
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op5.bb:
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store ptr %next.instr, ptr %dst, align 8
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%next.instr.21 = getelementptr i8, ptr %next.instr, i64 20
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%stack.3 = getelementptr i8, ptr %stack.pointer, i64 -8
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%l.4 = load ptr, ptr %stack.3, align 8
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%next.instr.2 = getelementptr i8, ptr %next.instr, i64 12
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%next.instr.2.val = load ptr, ptr %next.instr.2, align 2
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store ptr %next.instr.2.val, ptr %stack.3, align 8
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store ptr %l.4, ptr %stack.pointer, align 8
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%stack.next.2 = getelementptr i8, ptr %stack.pointer, i64 8
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br label %loop.header
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op6.bb:
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%stack.4 = getelementptr i8, ptr %stack.pointer, i64 -8
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%l.5 = load ptr, ptr %stack.4, align 8
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store i64 1, ptr %l.5, align 8
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%gep.5 = getelementptr i8, ptr %l.5, i64 8
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%l.6 = load ptr, ptr %gep.5, align 8
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%gep.6 = getelementptr i8, ptr %l.6, i64 48
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%l.7 = load ptr, ptr %gep.6, align 8
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tail call void %l.7(ptr nonnull %l.5)
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br label %loop.header
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}
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@ -1,6 +1,8 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size=1 -tail-dup-succ-size=1 %s -o - | FileCheck %s
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# Check that only the computed goto is not be restrict by tail-dup-pred-size and tail-dup-succ-size.
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#
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# Check that only the computed goto and others are restricted by tail-dup-pred-size and tail-dup-succ-size.
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#
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--- |
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@computed_goto.dispatch = constant [5 x ptr] [ptr null, ptr blockaddress(@computed_goto, %bb1), ptr blockaddress(@computed_goto, %bb2), ptr blockaddress(@computed_goto, %bb3), ptr blockaddress(@computed_goto, %bb4)]
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declare i64 @f0()
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128
llvm/test/CodeGen/X86/late-tail-dup-computed-goto.mir
Normal file
128
llvm/test/CodeGen/X86/late-tail-dup-computed-goto.mir
Normal file
@ -0,0 +1,128 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=tailduplication -tail-dup-pred-size=1 -tail-dup-succ-size=1 %s -o - | FileCheck %s
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#
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# Check that only the computed gotos are duplicated aggressively.
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#
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--- |
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@computed_goto.dispatch = constant [5 x ptr] [ptr null, ptr blockaddress(@computed_goto, %bb1), ptr blockaddress(@computed_goto, %bb2), ptr blockaddress(@computed_goto, %bb3), ptr blockaddress(@computed_goto, %bb4)]
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declare i64 @f0()
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declare i64 @f1()
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declare i64 @f2()
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declare i64 @f3()
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declare i64 @f4()
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declare i64 @f5()
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define void @computed_goto() {
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start:
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ret void
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bb1:
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ret void
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bb2:
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ret void
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bb3:
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ret void
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bb4:
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ret void
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}
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define void @jump_table() { ret void }
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define void @jump_table_pic() { ret void }
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...
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---
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name: computed_goto
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alignment: 1
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: computed_goto
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rax
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY [[COPY1]]
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; CHECK-NEXT: JMP64m $noreg, 8, [[COPY2]], @computed_goto.dispatch, $noreg
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1.bb1 (ir-block-address-taken %ir-block.bb1):
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; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY $rax
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY3]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY [[COPY1]]
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; CHECK-NEXT: JMP64m $noreg, 8, [[COPY2]], @computed_goto.dispatch, $noreg
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2.bb2 (ir-block-address-taken %ir-block.bb2):
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; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
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; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64 = COPY $rax
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY4]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY [[COPY1]]
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; CHECK-NEXT: JMP64m $noreg, 8, [[COPY2]], @computed_goto.dispatch, $noreg
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3.bb3 (ir-block-address-taken %ir-block.bb3):
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; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
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; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr64 = COPY $rax
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY5]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY [[COPY1]]
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; CHECK-NEXT: JMP64m $noreg, 8, [[COPY2]], @computed_goto.dispatch, $noreg
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4.bb4 (ir-block-address-taken %ir-block.bb4):
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; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
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; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64 = COPY $rax
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY6]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY [[COPY1]]
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; CHECK-NEXT: JMP64m $noreg, 8, [[COPY2]], @computed_goto.dispatch, $noreg
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bb.0:
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successors: %bb.5(0x80000000)
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||||
CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
|
||||
%0:gr64 = COPY $rax
|
||||
%6:gr64_nosp = COPY %0
|
||||
JMP_1 %bb.5
|
||||
|
||||
bb.1.bb1 (ir-block-address-taken %ir-block.bb1):
|
||||
successors: %bb.5(0x80000000)
|
||||
|
||||
CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
|
||||
%1:gr64 = COPY $rax
|
||||
%6:gr64_nosp = COPY %1
|
||||
JMP_1 %bb.5
|
||||
|
||||
bb.2.bb2 (ir-block-address-taken %ir-block.bb2):
|
||||
successors: %bb.5(0x80000000)
|
||||
|
||||
CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
|
||||
%2:gr64 = COPY $rax
|
||||
%6:gr64_nosp = COPY %2
|
||||
JMP_1 %bb.5
|
||||
|
||||
bb.3.bb3 (ir-block-address-taken %ir-block.bb3):
|
||||
successors: %bb.5(0x80000000)
|
||||
|
||||
CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
|
||||
%3:gr64 = COPY $rax
|
||||
%6:gr64_nosp = COPY %3
|
||||
JMP_1 %bb.5
|
||||
|
||||
bb.4.bb4 (ir-block-address-taken %ir-block.bb4):
|
||||
successors: %bb.5(0x80000000)
|
||||
|
||||
CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
|
||||
%4:gr64 = COPY $rax
|
||||
%6:gr64_nosp = COPY %4
|
||||
|
||||
bb.5:
|
||||
successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
|
||||
|
||||
%5:gr64_nosp = COPY %6
|
||||
JMP64m $noreg, 8, %5, @computed_goto.dispatch, $noreg
|
||||
...
|
||||
Loading…
x
Reference in New Issue
Block a user