From caaf8aae4de8a6a6bb2baa8db6d62bc42dff4c98 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 1 Jan 2008 21:08:22 +0000 Subject: [PATCH] Make MachineRegisterInfo::getVRegDef more efficient by aiming the keep the def of the vreg at the start of the list, so the list doesn't need to be traversed. llvm-svn: 45483 --- llvm/lib/CodeGen/MachineInstr.cpp | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 0de5501b78d3..00be1f1f75e1 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -42,17 +42,23 @@ void MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) { } // Otherwise, add this operand to the head of the registers use/def list. - MachineOperand *&Head = RegInfo->getRegUseDefListHead(getReg()); + MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg()); - Contents.Reg.Next = Head; + // For SSA values, we prefer to keep the definition at the start of the list. + // we do this by skipping over the definition if it is at the head of the + // list. + if (*Head && (*Head)->isDef()) + Head = &(*Head)->Contents.Reg.Next; + + Contents.Reg.Next = *Head; if (Contents.Reg.Next) { assert(getReg() == Contents.Reg.Next->getReg() && "Different regs on the same list!"); Contents.Reg.Next->Contents.Reg.Prev = &Contents.Reg.Next; } - Contents.Reg.Prev = &Head; - Head = this; + Contents.Reg.Prev = Head; + *Head = this; } void MachineOperand::setReg(unsigned Reg) {