[mlir][OpenMP] Allow tile composition (#185380)
The verifier of the TileOp did not allow composition of multiple transformations out of precaution. However, composition works, therefore remove the "currently only supports omp.canonical_loop as applyee" check and add regression tests.
This commit is contained in:
Michael Kruse
GitHub
parent
2826924543
commit
cd3cab70fd
@ -3802,42 +3802,47 @@ static ParseResult parseLoopTransformClis(
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return success();
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}
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LogicalResult TileOp::verify() {
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if (getApplyees().empty())
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return emitOpError() << "must apply to at least one loop";
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if (getSizes().size() != getApplyees().size())
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return emitOpError() << "there must be one tile size for each applyee";
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if (!getGeneratees().empty() &&
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2 * getSizes().size() != getGeneratees().size())
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return emitOpError()
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<< "expecting two times the number of generatees than applyees";
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DenseSet<Value> parentIVs;
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Value parent = getApplyees().front();
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for (auto &&applyee : llvm::drop_begin(getApplyees())) {
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auto [parentCreate, parentGen, parentCons] = decodeCli(parent);
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/// Check properties of the loop nest consisting of the transformation's
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/// applyees:
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/// 1. They are nested inside each other
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/// 2. They are perfectly nested
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/// (no code with side-effects in-between the loops)
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/// 3. They are rectangular
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/// (loop bounds are invariant in respect to the outer loops)
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///
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/// TODO: Generalize for LoopTransformationInterface.
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static LogicalResult checkApplyeesNesting(TileOp op) {
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// Collect the loops from the nest
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bool isOnlyCanonLoops = true;
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SmallVector<CanonicalLoopOp> canonLoops;
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for (Value applyee : op.getApplyees()) {
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auto [create, gen, cons] = decodeCli(applyee);
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if (!parentGen)
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return emitOpError() << "applyee CLI has no generator";
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if (!gen)
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return op.emitOpError() << "applyee CLI has no generator";
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auto parentLoop = dyn_cast_or_null<CanonicalLoopOp>(parentGen->getOwner());
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if (!parentGen)
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return emitOpError()
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<< "currently only supports omp.canonical_loop as applyee";
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auto loop = dyn_cast_or_null<CanonicalLoopOp>(gen->getOwner());
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canonLoops.push_back(loop);
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if (!loop)
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isOnlyCanonLoops = false;
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}
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// FIXME: We currently can only verify non-rectangularity and perfect nest of
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// omp.canonical_loop.
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if (!isOnlyCanonLoops)
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return success();
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DenseSet<Value> parentIVs;
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for (auto i : llvm::seq<int>(1, canonLoops.size())) {
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auto parentLoop = canonLoops[i - 1];
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auto loop = canonLoops[i];
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if (parentLoop.getOperation() != loop.getOperation()->getParentOp())
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return op.emitOpError()
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<< "tiled loop nest must be nested within each other";
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parentIVs.insert(parentLoop.getInductionVar());
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if (!gen)
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return emitOpError() << "applyee CLI has no generator";
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auto loop = dyn_cast_or_null<CanonicalLoopOp>(gen->getOwner());
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if (!loop)
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return emitOpError()
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<< "currently only supports omp.canonical_loop as applyee";
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// Canonical loop must be perfectly nested, i.e. the body of the parent must
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// only contain the omp.canonical_loop of the nested loops, and
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// omp.terminator
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@ -3862,12 +3867,10 @@ LogicalResult TileOp::verify() {
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return true;
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}();
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if (!isPerfectlyNested)
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return emitOpError() << "tiled loop nest must be perfectly nested";
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return op.emitOpError() << "tiled loop nest must be perfectly nested";
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if (parentIVs.contains(loop.getTripCount()))
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return emitOpError() << "tiled loop nest must be rectangular";
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parent = applyee;
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return op.emitOpError() << "tiled loop nest must be rectangular";
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}
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// TODO: The tile sizes must be computed before the loop, but checking this
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@ -3884,6 +3887,21 @@ LogicalResult TileOp::verify() {
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return success();
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}
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LogicalResult TileOp::verify() {
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if (getApplyees().empty())
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return emitOpError() << "must apply to at least one loop";
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if (getSizes().size() != getApplyees().size())
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return emitOpError() << "there must be one tile size for each applyee";
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if (!getGeneratees().empty() &&
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2 * getSizes().size() != getGeneratees().size())
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return emitOpError()
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<< "expecting two times the number of generatees than applyees";
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return checkApplyeesNesting(*this);
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}
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std::pair<unsigned, unsigned> TileOp ::getApplyeesODSOperandIndexAndLength() {
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return getODSOperandIndexAndLength(odsIndex_applyees);
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}
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@ -136,3 +136,73 @@ func.func @omp_tile_3d_pretty(%tc : i32, %ts : i32) -> () {
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omp.tile (%grid1, %grid2, %grid3, %intratile1, %intratile2, %intratile3) <- (%cli_outer, %cli_middle, %cli_inner) sizes(%ts, %ts, %ts: i32, i32, i32)
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return
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}
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// Composition of multiple tilings
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// CHECK-LABEL: @omp_tile_composition(
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// CHECK-SAME: %[[tc:.+]]: i32, %[[ts:.+]]: i32, %[[grid_ts:.+]]: i32, %[[intratile_ts:.+]]: i32) {
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func.func @omp_tile_composition(%tc: i32, %ts: i32, %grid_ts: i32, %intratile_ts: i32) -> () {
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%canonloop = omp.new_cli
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%grid = omp.new_cli
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%intratile = omp.new_cli
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%grid_intratile = omp.new_cli
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%grid_grid = omp.new_cli
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%intratile_grid = omp.new_cli
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%intratile_intratile = omp.new_cli
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// CHECK: omp.canonical_loop(%canonloop) %iv : i32 in range(%[[tc]]) {
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omp.canonical_loop(%canonloop) %iv : i32 in range(%tc) {
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// CHECK: omp.terminator
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omp.terminator
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}
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// CHECK: omp.tile (%grid1, %intratile1) <- (%canonloop) sizes(%[[ts]] : i32)
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omp.tile(%grid, %intratile) <- (%canonloop) sizes(%ts : i32)
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// CHECK: omp.tile (%grid1_1, %intratile1_0) <- (%grid1) sizes(%[[grid_ts]] : i32)
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omp.tile(%grid_grid, %grid_intratile) <- (%grid) sizes(%grid_ts : i32)
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// CHECK: omp.tile (%grid1_2, %intratile1_3) <- (%intratile1) sizes(%[[intratile_ts]] : i32)
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omp.tile(%intratile_grid, %intratile_intratile) <- (%intratile) sizes(%intratile_ts : i32)
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// CHECK: return
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return
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}
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// Composition of multiple 2d-tilings
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// CHECK-LABEL: @omp_tile_2d_composition(
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// CHECK-SAME: %[[tc1:.+]]: i32, %[[tc2:.+]]: i32, %[[ts:.+]]: i32) {
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func.func @omp_tile_2d_composition(%tc1: i32, %tc2: i32, %ts: i32) -> () {
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%cli_outer = omp.new_cli
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%cli_inner = omp.new_cli
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%outer_grid = omp.new_cli
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%inner_grid = omp.new_cli
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%outer_intratile = omp.new_cli
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%inner_intratile = omp.new_cli
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%outer_grid_grid = omp.new_cli
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%inner_grid_grid = omp.new_cli
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%outer_grid_intratile = omp.new_cli
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%inner_grid_intratile = omp.new_cli
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%outer_intratile_grid = omp.new_cli
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%inner_intratile_grid = omp.new_cli
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%outer_intratile_intratile = omp.new_cli
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%inner_intratile_intratile = omp.new_cli
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// CHECK: omp.canonical_loop(%canonloop) %iv : i32 in range(%[[tc1]]) {
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omp.canonical_loop(%cli_outer) %iv_outer : i32 in range(%tc1) {
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// CHECK-NEXT: omp.canonical_loop(%canonloop_d1) %iv_d1 : i32 in range(%[[tc2]]) {
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omp.canonical_loop(%cli_inner) %iv_inner : i32 in range(%tc2) {
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// CHECK: omp.terminator
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omp.terminator
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}
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// CHECK: omp.terminator
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omp.terminator
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}
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// CHECK: omp.tile (%grid1, %grid2, %intratile1, %intratile2) <- (%canonloop, %canonloop_d1) sizes(%[[ts]], %[[ts]] : i32, i32)
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omp.tile(%outer_grid, %inner_grid, %outer_intratile, %inner_intratile) <- (%cli_outer, %cli_inner) sizes(%ts, %ts : i32, i32)
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// CHECK: omp.tile (%grid1_0, %grid2_1, %intratile1_2, %intratile2_3) <- (%grid1, %grid2) sizes(%[[ts]], %[[ts]] : i32, i32)
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omp.tile(%outer_grid_grid, %inner_grid_grid, %outer_grid_intratile, %inner_grid_intratile) <- (%outer_grid, %inner_grid) sizes(%ts, %ts : i32, i32)
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// CHECK: omp.tile (%grid1_4, %grid2_5, %intratile1_6, %intratile2_7) <- (%intratile2, %intratile1) sizes(%[[ts]], %[[ts]] : i32, i32)
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omp.tile(%outer_intratile_grid, %inner_intratile_grid, %outer_intratile_intratile, %inner_intratile_intratile) <- (%inner_intratile, %outer_intratile) sizes(%ts, %ts : i32, i32)
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// CHECK: return
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return
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}
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@ -39,10 +39,10 @@ func.func @missing_generator(%tc : i32, %ts : i32) {
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func.func @insufficient_sizes(%tc : i32, %ts : i32) {
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%canonloop1 = omp.new_cli
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%canonloop2 = omp.new_cli
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omp.canonical_loop(%canonloop1) %iv : i32 in range(%tc) {
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omp.terminator
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}
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omp.canonical_loop(%canonloop2) %iv : i32 in range(%tc) {
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omp.canonical_loop(%canonloop1) %iv1 : i32 in range(%tc) {
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omp.canonical_loop(%canonloop2) %iv2 : i32 in range(%tc) {
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omp.terminator
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}
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omp.terminator
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}
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@ -83,6 +83,24 @@ func.func @insufficient_generatees(%tc : i32, %ts : i32) {
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// -----
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func.func @not_nested(%tc : i32, %ts : i32) {
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%canonloop1 = omp.new_cli
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%canonloop2 = omp.new_cli
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omp.canonical_loop(%canonloop1) %iv1 : i32 in range(%tc) {
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omp.terminator
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}
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omp.canonical_loop(%canonloop2) %iv2 : i32 in range(%tc) {
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omp.terminator
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}
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// expected-error@+1 {{'omp.tile' op tiled loop nest must be nested within each other}}
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omp.tile <-(%canonloop1, %canonloop2) sizes(%ts, %ts : i32, i32)
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llvm.return
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}
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// -----
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func.func @not_perfectly_nested(%tc : i32, %ts : i32) {
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%canonloop1 = omp.new_cli
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%canonloop2 = omp.new_cli
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193
mlir/test/Target/LLVMIR/openmp-cli-tile03.mlir
Normal file
193
mlir/test/Target/LLVMIR/openmp-cli-tile03.mlir
Normal file
@ -0,0 +1,193 @@
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// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s --enable-var-scope
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llvm.func @tile_composition(%baseptr: !llvm.ptr, %tc: i32, %ts: i32, %grid_ts: i32, %intratile_ts: i32) -> () {
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%canonloop = omp.new_cli
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%grid = omp.new_cli
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%intratile = omp.new_cli
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%grid_intratile = omp.new_cli
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%grid_grid = omp.new_cli
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%intratile_grid = omp.new_cli
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%intratile_intratile = omp.new_cli
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omp.canonical_loop(%canonloop) %idx : i32 in range(%tc) {
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%ptr = llvm.getelementptr inbounds %baseptr[%idx] : (!llvm.ptr, i32) -> !llvm.ptr, f32
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%val = llvm.mlir.constant(42.0 : f32) : f32
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llvm.store %val, %ptr : f32, !llvm.ptr
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omp.terminator
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}
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omp.tile(%grid, %intratile) <- (%canonloop) sizes(%ts : i32)
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omp.tile(%grid_grid, %grid_intratile) <- (%grid) sizes(%grid_ts : i32)
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omp.tile(%intratile_grid, %intratile_intratile) <- (%intratile) sizes(%intratile_ts : i32)
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llvm.return
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}
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// CHECK-LABEL: define void @tile_composition(
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// CHECK-SAME: ptr %[[TMP0:.+]], i32 %[[TMP1:.+]], i32 %[[TMP2:.+]], i32 %[[TMP3:.+]], i32 %[[TMP4:.+]]) {
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// CHECK-NEXT: br label %[[OMP_OMP_LOOP_PREHEADER:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_OMP_LOOP_PREHEADER]]:
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// CHECK-NEXT: %[[TMP6:.+]] = udiv i32 %[[TMP1:.+]], %[[TMP2:.+]]
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// CHECK-NEXT: %[[TMP7:.+]] = urem i32 %[[TMP1:.+]], %[[TMP2:.+]]
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// CHECK-NEXT: %[[TMP8:.+]] = icmp ne i32 %[[TMP7:.+]], 0
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// CHECK-NEXT: %[[TMP9:.+]] = zext i1 %[[TMP8:.+]] to i32
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// CHECK-NEXT: %[[OMP_FLOOR0_TRIPCOUNT:.+]] = add nuw i32 %[[TMP6:.+]], %[[TMP9:.+]]
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// CHECK-NEXT: br label %[[OMP_FLOOR0_PREHEADER:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_PREHEADER]]:
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// CHECK-NEXT: %[[TMP10:.+]] = udiv i32 %[[OMP_FLOOR0_TRIPCOUNT:.+]], %[[TMP3:.+]]
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// CHECK-NEXT: %[[TMP11:.+]] = urem i32 %[[OMP_FLOOR0_TRIPCOUNT:.+]], %[[TMP3:.+]]
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// CHECK-NEXT: %[[TMP12:.+]] = icmp ne i32 %[[TMP11:.+]], 0
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// CHECK-NEXT: %[[TMP13:.+]] = zext i1 %[[TMP12:.+]] to i32
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// CHECK-NEXT: %[[OMP_FLOOR0_TRIPCOUNT1:.+]] = add nuw i32 %[[TMP10:.+]], %[[TMP13:.+]]
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// CHECK-NEXT: br label %[[OMP_FLOOR0_PREHEADER2:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_PREHEADER2]]:
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// CHECK-NEXT: br label %[[OMP_FLOOR0_HEADER3:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_HEADER3]]:
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// CHECK-NEXT: %[[OMP_FLOOR0_IV9:.+]] = phi i32 [ 0, %[[OMP_FLOOR0_PREHEADER2:.+]] ], [ %[[OMP_FLOOR0_NEXT11:.+]], %[[OMP_FLOOR0_INC6:.+]] ]
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// CHECK-NEXT: br label %[[OMP_FLOOR0_COND4:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_COND4]]:
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// CHECK-NEXT: %[[OMP_FLOOR0_CMP10:.+]] = icmp ult i32 %[[OMP_FLOOR0_IV9:.+]], %[[OMP_FLOOR0_TRIPCOUNT1:.+]]
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// CHECK-NEXT: br i1 %[[OMP_FLOOR0_CMP10:.+]], label %[[OMP_FLOOR0_BODY5:.+]], label %[[OMP_FLOOR0_EXIT7:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_BODY5]]:
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// CHECK-NEXT: %[[TMP14:.+]] = icmp eq i32 %[[OMP_FLOOR0_IV9:.+]], %[[TMP10:.+]]
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// CHECK-NEXT: %[[TMP15:.+]] = select i1 %[[TMP14:.+]], i32 %[[TMP11:.+]], i32 %[[TMP3:.+]]
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// CHECK-NEXT: br label %[[OMP_TILE0_PREHEADER12:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_TILE0_PREHEADER12]]:
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// CHECK-NEXT: br label %[[OMP_TILE0_HEADER13:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_TILE0_HEADER13]]:
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// CHECK-NEXT: %[[OMP_TILE0_IV19:.+]] = phi i32 [ 0, %[[OMP_TILE0_PREHEADER12:.+]] ], [ %[[OMP_TILE0_NEXT21:.+]], %[[OMP_TILE0_INC16:.+]] ]
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// CHECK-NEXT: br label %[[OMP_TILE0_COND14:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_TILE0_COND14]]:
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// CHECK-NEXT: %[[OMP_TILE0_CMP20:.+]] = icmp ult i32 %[[OMP_TILE0_IV19:.+]], %[[TMP15:.+]]
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// CHECK-NEXT: br i1 %[[OMP_TILE0_CMP20:.+]], label %[[OMP_TILE0_BODY15:.+]], label %[[OMP_TILE0_EXIT17:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_TILE0_BODY15]]:
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// CHECK-NEXT: %[[TMP16:.+]] = mul nuw i32 %[[TMP3:.+]], %[[OMP_FLOOR0_IV9:.+]]
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// CHECK-NEXT: %[[TMP17:.+]] = add nuw i32 %[[TMP16:.+]], %[[OMP_TILE0_IV19:.+]]
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// CHECK-NEXT: br label %[[OMP_FLOOR0_BODY:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_BODY]]:
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// CHECK-NEXT: %[[TMP18:.+]] = icmp eq i32 %[[TMP17:.+]], %[[TMP6:.+]]
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// CHECK-NEXT: %[[TMP19:.+]] = select i1 %[[TMP18:.+]], i32 %[[TMP7:.+]], i32 %[[TMP2:.+]]
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// CHECK-NEXT: br label %[[OMP_TILE0_PREHEADER:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_TILE0_PREHEADER]]:
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// CHECK-NEXT: %[[TMP20:.+]] = udiv i32 %[[TMP19:.+]], %[[TMP4:.+]]
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// CHECK-NEXT: %[[TMP21:.+]] = urem i32 %[[TMP19:.+]], %[[TMP4:.+]]
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// CHECK-NEXT: %[[TMP22:.+]] = icmp ne i32 %[[TMP21:.+]], 0
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// CHECK-NEXT: %[[TMP23:.+]] = zext i1 %[[TMP22:.+]] to i32
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// CHECK-NEXT: %[[OMP_FLOOR0_TRIPCOUNT22:.+]] = add nuw i32 %[[TMP20:.+]], %[[TMP23:.+]]
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// CHECK-NEXT: br label %[[OMP_FLOOR0_PREHEADER23:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_PREHEADER23]]:
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// CHECK-NEXT: br label %[[OMP_FLOOR0_HEADER:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_HEADER]]:
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// CHECK-NEXT: %[[OMP_FLOOR0_IV:.+]] = phi i32 [ 0, %[[OMP_FLOOR0_PREHEADER23:.+]] ], [ %[[OMP_FLOOR0_NEXT:.+]], %[[OMP_FLOOR0_INC:.+]] ]
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// CHECK-NEXT: br label %[[OMP_FLOOR0_COND:.+]]
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// CHECK-EMPTY:
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// CHECK-NEXT: [[OMP_FLOOR0_COND]]:
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// CHECK-NEXT: %[[OMP_FLOOR0_CMP:.+]] = icmp ult i32 %[[OMP_FLOOR0_IV:.+]], %[[OMP_FLOOR0_TRIPCOUNT22:.+]]
|
||||
// CHECK-NEXT: br i1 %[[OMP_FLOOR0_CMP:.+]], label %[[OMP_FLOOR0_BODY24:.+]], label %[[OMP_FLOOR0_EXIT:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_BODY24]]:
|
||||
// CHECK-NEXT: %[[TMP24:.+]] = icmp eq i32 %[[OMP_FLOOR0_IV:.+]], %[[TMP20:.+]]
|
||||
// CHECK-NEXT: %[[TMP25:.+]] = select i1 %[[TMP24:.+]], i32 %[[TMP21:.+]], i32 %[[TMP4:.+]]
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_PREHEADER26:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_PREHEADER26]]:
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_HEADER27:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_HEADER27]]:
|
||||
// CHECK-NEXT: %[[OMP_TILE0_IV33:.+]] = phi i32 [ 0, %[[OMP_TILE0_PREHEADER26:.+]] ], [ %[[OMP_TILE0_NEXT35:.+]], %[[OMP_TILE0_INC30:.+]] ]
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_COND28:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_COND28]]:
|
||||
// CHECK-NEXT: %[[OMP_TILE0_CMP34:.+]] = icmp ult i32 %[[OMP_TILE0_IV33:.+]], %[[TMP25:.+]]
|
||||
// CHECK-NEXT: br i1 %[[OMP_TILE0_CMP34:.+]], label %[[OMP_TILE0_BODY29:.+]], label %[[OMP_TILE0_EXIT31:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_BODY29]]:
|
||||
// CHECK-NEXT: %[[TMP26:.+]] = mul nuw i32 %[[TMP4:.+]], %[[OMP_FLOOR0_IV:.+]]
|
||||
// CHECK-NEXT: %[[TMP27:.+]] = add nuw i32 %[[TMP26:.+]], %[[OMP_TILE0_IV33:.+]]
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_BODY:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_BODY]]:
|
||||
// CHECK-NEXT: %[[TMP28:.+]] = mul nuw i32 %[[TMP2:.+]], %[[TMP17:.+]]
|
||||
// CHECK-NEXT: %[[TMP29:.+]] = add nuw i32 %[[TMP28:.+]], %[[TMP27:.+]]
|
||||
// CHECK-NEXT: br label %[[OMP_OMP_LOOP_BODY:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_OMP_LOOP_BODY]]:
|
||||
// CHECK-NEXT: br label %[[OMP_LOOP_REGION:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_LOOP_REGION]]:
|
||||
// CHECK-NEXT: %[[TMP30:.+]] = getelementptr inbounds float, ptr %[[TMP0:.+]], i32 %[[TMP29:.+]]
|
||||
// CHECK-NEXT: store float 4.200000e+01, ptr %[[TMP30:.+]], align 4
|
||||
// CHECK-NEXT: br label %[[OMP_REGION_CONT:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_REGION_CONT]]:
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_INC30:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_INC30]]:
|
||||
// CHECK-NEXT: %[[OMP_TILE0_NEXT35:.+]] = add nuw i32 %[[OMP_TILE0_IV33:.+]], 1
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_HEADER27:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_EXIT31]]:
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_AFTER32:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_AFTER32]]:
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_INC:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_INC]]:
|
||||
// CHECK-NEXT: %[[OMP_FLOOR0_NEXT:.+]] = add nuw i32 %[[OMP_FLOOR0_IV:.+]], 1
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_HEADER:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_EXIT]]:
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_AFTER25:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_AFTER25]]:
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_AFTER:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_AFTER]]:
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_INC16:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_INC16]]:
|
||||
// CHECK-NEXT: %[[OMP_TILE0_NEXT21:.+]] = add nuw i32 %[[OMP_TILE0_IV19:.+]], 1
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_HEADER13:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_EXIT17]]:
|
||||
// CHECK-NEXT: br label %[[OMP_TILE0_AFTER18:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_TILE0_AFTER18]]:
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_INC6:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_INC6]]:
|
||||
// CHECK-NEXT: %[[OMP_FLOOR0_NEXT11:.+]] = add nuw i32 %[[OMP_FLOOR0_IV9:.+]], 1
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_HEADER3:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_EXIT7]]:
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_AFTER8:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_AFTER8]]:
|
||||
// CHECK-NEXT: br label %[[OMP_FLOOR0_AFTER:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_FLOOR0_AFTER]]:
|
||||
// CHECK-NEXT: br label %[[OMP_OMP_LOOP_AFTER:.+]]
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: [[OMP_OMP_LOOP_AFTER]]:
|
||||
// CHECK-NEXT: ret void
|
||||
// CHECK-NEXT: }
|
||||
|
||||
|
||||
// CHECK: !llvm.module.flags = !{!0}
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: !0 = !{i32 2, !"Debug Info Version", i32 3}
|
||||
Loading…
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Reference in New Issue
Block a user