From cfaa67bb627d499763e849939f47fac2c551a8df Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Tue, 24 Feb 2026 10:20:58 +0000
Subject: [PATCH] [Thumb2] mve-vmovimm.ll - regenerate with missing check
 prefixes (#183019)

Add prefixes to discriminate between -mattr=+mve and -mattr=+mve.fp to
add missing check coverage

Fixes update_llc_test_checks warnings and simplifies regeneration for an
upcoming patch
---
 llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 270 +++++++++++++++++++++++-
 1 file changed, 267 insertions(+), 3 deletions(-)

diff --git a/llvm/test/CodeGen/Thumb2/mve-vmovimm.ll b/llvm/test/CodeGen/Thumb2/mve-vmovimm.ll
index 1970ff35f183..7ca077064780 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vmovimm.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vmovimm.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKLE
-; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKLE
-; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKBE
+; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECKLE,CHECKLE-MVE
+; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECKLE,CHECKLE-MVEFP
+; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECKBE
 
 define arm_aapcs_vfpcc <16 x i8> @mov_int8_1() {
 ; CHECK-LABEL: mov_int8_1:
@@ -1080,6 +1080,39 @@ entry:
 }
 
 define arm_aapcs_vfpcc <4 x float> @fadd_float_1(<4 x float> %a) {
+; CHECKLE-MVE-LABEL: fadd_float_1:
+; CHECKLE-MVE:       @ %bb.0: @ %entry
+; CHECKLE-MVE-NEXT:    .save {r4, lr}
+; CHECKLE-MVE-NEXT:    push {r4, lr}
+; CHECKLE-MVE-NEXT:    .vsave {d8, d9}
+; CHECKLE-MVE-NEXT:    vpush {d8, d9}
+; CHECKLE-MVE-NEXT:    vmov q4, q0
+; CHECKLE-MVE-NEXT:    mov.w r1, #1065353216
+; CHECKLE-MVE-NEXT:    vmov r4, r0, d9
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s19, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    mov.w r1, #1065353216
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s18, r0
+; CHECKLE-MVE-NEXT:    mov.w r1, #1065353216
+; CHECKLE-MVE-NEXT:    vmov r4, r0, d8
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s17, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    mov.w r1, #1065353216
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s16, r0
+; CHECKLE-MVE-NEXT:    vmov q0, q4
+; CHECKLE-MVE-NEXT:    vpop {d8, d9}
+; CHECKLE-MVE-NEXT:    pop {r4, pc}
+;
+; CHECKLE-MVEFP-LABEL: fadd_float_1:
+; CHECKLE-MVEFP:       @ %bb.0: @ %entry
+; CHECKLE-MVEFP-NEXT:    vmov.f32 q1, #1.000000e+00
+; CHECKLE-MVEFP-NEXT:    vadd.f32 q0, q0, q1
+; CHECKLE-MVEFP-NEXT:    bx lr
+;
 ; CHECKBE-LABEL: fadd_float_1:
 ; CHECKBE:       @ %bb.0: @ %entry
 ; CHECKBE-NEXT:    vmov.f32 q1, #1.000000e+00
@@ -1104,6 +1137,41 @@ entry:
 }
 
 define arm_aapcs_vfpcc <4 x float> @fadd_float_m3(<4 x float> %a) {
+; CHECKLE-MVE-LABEL: fadd_float_m3:
+; CHECKLE-MVE:       @ %bb.0: @ %entry
+; CHECKLE-MVE-NEXT:    .save {r4, r5, r7, lr}
+; CHECKLE-MVE-NEXT:    push {r4, r5, r7, lr}
+; CHECKLE-MVE-NEXT:    .vsave {d8, d9}
+; CHECKLE-MVE-NEXT:    vpush {d8, d9}
+; CHECKLE-MVE-NEXT:    vmov q4, q0
+; CHECKLE-MVE-NEXT:    movs r5, #0
+; CHECKLE-MVE-NEXT:    vmov r4, r0, d9
+; CHECKLE-MVE-NEXT:    movt r5, #49216
+; CHECKLE-MVE-NEXT:    mov r1, r5
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s19, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    mov r1, r5
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s18, r0
+; CHECKLE-MVE-NEXT:    mov r1, r5
+; CHECKLE-MVE-NEXT:    vmov r4, r0, d8
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s17, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    mov r1, r5
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    vmov s16, r0
+; CHECKLE-MVE-NEXT:    vmov q0, q4
+; CHECKLE-MVE-NEXT:    vpop {d8, d9}
+; CHECKLE-MVE-NEXT:    pop {r4, r5, r7, pc}
+;
+; CHECKLE-MVEFP-LABEL: fadd_float_m3:
+; CHECKLE-MVEFP:       @ %bb.0: @ %entry
+; CHECKLE-MVEFP-NEXT:    vmov.f32 q1, #-3.000000e+00
+; CHECKLE-MVEFP-NEXT:    vadd.f32 q0, q0, q1
+; CHECKLE-MVEFP-NEXT:    bx lr
+;
 ; CHECKBE-LABEL: fadd_float_m3:
 ; CHECKBE:       @ %bb.0: @ %entry
 ; CHECKBE-NEXT:    vmov.f32 q1, #-3.000000e+00
@@ -1126,6 +1194,104 @@ entry:
 }
 
 define arm_aapcs_vfpcc <8 x half> @fadd_float16_1(<8 x half> %a) {
+; CHECKLE-MVE-LABEL: fadd_float16_1:
+; CHECKLE-MVE:       @ %bb.0: @ %entry
+; CHECKLE-MVE-NEXT:    .save {r4, lr}
+; CHECKLE-MVE-NEXT:    push {r4, lr}
+; CHECKLE-MVE-NEXT:    .vsave {d8, d9, d10, d11, d12, d13}
+; CHECKLE-MVE-NEXT:    vpush {d8, d9, d10, d11, d12, d13}
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q0[0]
+; CHECKLE-MVE-NEXT:    vmov q4, q0
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    vmov.i16 q6, #0x3c00
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[0]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[0], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[1]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[1]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[1], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[2]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[2]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[2], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[3]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[3]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[3], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[4]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[4]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[4], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[5]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[5]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[5], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[6]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[6]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[6], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[7]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[7]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[7], r0
+; CHECKLE-MVE-NEXT:    vmov q0, q5
+; CHECKLE-MVE-NEXT:    vpop {d8, d9, d10, d11, d12, d13}
+; CHECKLE-MVE-NEXT:    pop {r4, pc}
+;
+; CHECKLE-MVEFP-LABEL: fadd_float16_1:
+; CHECKLE-MVEFP:       @ %bb.0: @ %entry
+; CHECKLE-MVEFP-NEXT:    vmov.i16 q1, #0x3c00
+; CHECKLE-MVEFP-NEXT:    vadd.f16 q0, q0, q1
+; CHECKLE-MVEFP-NEXT:    bx lr
+;
 ; CHECKBE-LABEL: fadd_float16_1:
 ; CHECKBE:       @ %bb.0: @ %entry
 ; CHECKBE-NEXT:    vmov.i16 q1, #0x3c00
@@ -1148,6 +1314,104 @@ entry:
 }
 
 define arm_aapcs_vfpcc <8 x half> @fadd_float16_m3(<8 x half> %a) {
+; CHECKLE-MVE-LABEL: fadd_float16_m3:
+; CHECKLE-MVE:       @ %bb.0: @ %entry
+; CHECKLE-MVE-NEXT:    .save {r4, lr}
+; CHECKLE-MVE-NEXT:    push {r4, lr}
+; CHECKLE-MVE-NEXT:    .vsave {d8, d9, d10, d11, d12, d13}
+; CHECKLE-MVE-NEXT:    vpush {d8, d9, d10, d11, d12, d13}
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q0[0]
+; CHECKLE-MVE-NEXT:    vmov q4, q0
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    vmov.i16 q6, #0xc200
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[0]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[0], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[1]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[1]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[1], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[2]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[2]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[2], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[3]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[3]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[3], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[4]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[4]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[4], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[5]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[5]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[5], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[6]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[6]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[6], r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q4[7]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r4, r0
+; CHECKLE-MVE-NEXT:    vmov.u16 r0, q6[7]
+; CHECKLE-MVE-NEXT:    bl __aeabi_h2f
+; CHECKLE-MVE-NEXT:    mov r1, r0
+; CHECKLE-MVE-NEXT:    mov r0, r4
+; CHECKLE-MVE-NEXT:    bl __aeabi_fadd
+; CHECKLE-MVE-NEXT:    bl __aeabi_f2h
+; CHECKLE-MVE-NEXT:    vmov.16 q5[7], r0
+; CHECKLE-MVE-NEXT:    vmov q0, q5
+; CHECKLE-MVE-NEXT:    vpop {d8, d9, d10, d11, d12, d13}
+; CHECKLE-MVE-NEXT:    pop {r4, pc}
+;
+; CHECKLE-MVEFP-LABEL: fadd_float16_m3:
+; CHECKLE-MVEFP:       @ %bb.0: @ %entry
+; CHECKLE-MVEFP-NEXT:    vmov.i16 q1, #0xc200
+; CHECKLE-MVEFP-NEXT:    vadd.f16 q0, q0, q1
+; CHECKLE-MVEFP-NEXT:    bx lr
+;
 ; CHECKBE-LABEL: fadd_float16_m3:
 ; CHECKBE:       @ %bb.0: @ %entry
 ; CHECKBE-NEXT:    vmov.i16 q1, #0xc200