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[GlobalIsel][X86] Move G_SDIV/G_SREM/G_UDIV/G_UREM legalization before legacy handling and merge 32-bit/64-bit handling

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This commit is contained in:
Simon Pilgrim 2023-06-02 15:46:24 +01:00
parent 9299bde9e3
commit d01ddfedba
1 changed files with 9 additions and 12 deletions
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21
llvm/lib/Target/X86/X86LegalizerInfo.cpp
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@ -117,6 +117,14 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.clampScalar(0, s8, sMaxScalar)
.scalarize(0);
// integer divisions
getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UDIV, G_UREM})
.legalIf([=](const LegalityQuery &Query) -> bool {
return typeInSet(0, {s8, s16, s32})(Query) ||
(Is64Bit && typeInSet(0, {s64})(Query));
})
.clampScalar(0, s8, sMaxScalar);
// bswap
getActionDefinitionsBuilder(G_BSWAP)
.legalIf([=](const LegalityQuery &Query) {
@ -237,12 +245,7 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
.widenScalarToNextPow2(0, /*Min*/ 8);
getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
// Shifts and SDIV
getActionDefinitionsBuilder(
{G_SDIV, G_SREM, G_UDIV, G_UREM})
.legalFor({s8, s16, s32})
.clampScalar(0, s8, s32);
// Shifts
getActionDefinitionsBuilder(
{G_SHL, G_LSHR, G_ASHR})
.legalFor({{s8, s8}, {s16, s8}, {s32, s8}})
@ -354,12 +357,6 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
.clampScalar(1, s32, s64)
.widenScalarToNextPow2(1);
// Divisions
getActionDefinitionsBuilder(
{G_SDIV, G_SREM, G_UDIV, G_UREM})
.legalFor({s8, s16, s32, s64})
.clampScalar(0, s8, s64);
// Shifts
getActionDefinitionsBuilder(
{G_SHL, G_LSHR, G_ASHR})