NetBSD: Define initial RegisterContextNetBSD_x86_64
Summary: Add basic support, i386 version will be added later. Reviewers: emaste, joerg, clayborg, tfiala Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D16508 llvm-svn: 259462
This commit is contained in:
Kamil Rytarowski
parent
44456b8963
commit
d08778bade
@ -34,6 +34,7 @@ add_lldb_library(lldbPluginProcessUtility
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RegisterContextMach_i386.cpp
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RegisterContextMach_x86_64.cpp
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RegisterContextMemory.cpp
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RegisterContextNetBSD_x86_64.cpp
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RegisterContextPOSIX_arm.cpp
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RegisterContextPOSIX_arm64.cpp
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RegisterContextPOSIX_mips64.cpp
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@ -0,0 +1,364 @@
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//===-- RegisterContextNetBSD_x86_64.cpp ----------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===---------------------------------------------------------------------===//
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#include <cstddef>
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#include <vector>
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#include "llvm/Support/Compiler.h"
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#include "RegisterContextPOSIX_x86.h"
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#include "RegisterContextNetBSD_x86_64.h"
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using namespace lldb_private;
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using namespace lldb;
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// src/sys/arch/amd64/include/frame_regs.h
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typedef struct _GPR
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{
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uint64_t rdi; /* 0 */
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uint64_t rsi; /* 1 */
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uint64_t rdx; /* 2 */
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uint64_t rcx; /* 3 */
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uint64_t r8; /* 4 */
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uint64_t r9; /* 5 */
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uint64_t r10; /* 6 */
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uint64_t r11; /* 7 */
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uint64_t r12; /* 8 */
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uint64_t r13; /* 9 */
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uint64_t r14; /* 10 */
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uint64_t r15; /* 11 */
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uint64_t rbp; /* 12 */
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uint64_t rbx; /* 13 */
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uint64_t rax; /* 14 */
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uint64_t gs; /* 15 */
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uint64_t fs; /* 16 */
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uint64_t es; /* 17 */
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uint64_t ds; /* 18 */
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uint64_t trapno; /* 19 */
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uint64_t err; /* 20 */
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uint64_t rip; /* 21 */
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uint64_t cs; /* 22 */
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uint64_t rflags; /* 23 */
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uint64_t rsp; /* 24 */
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uint64_t ss; /* 25 */
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} GPR;
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/*
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* As of NetBSD-7.99.25 there is no support for debug registers
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* https://en.wikipedia.org/wiki/X86_debug_register
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*/
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/*
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* src/sys/arch/amd64/include/mcontext.h
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*
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* typedef struct {
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* __gregset_t __gregs;
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* __greg_t _mc_tlsbase;
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* __fpregset_t __fpregs;
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* } mcontext_t;
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*/
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struct UserArea {
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GPR gpr;
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uint64_t mc_tlsbase;
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FPR fpr;
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};
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//---------------------------------------------------------------------------
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// Cherry-pick parts of RegisterInfos_x86_64.h, without debug registers
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//---------------------------------------------------------------------------
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// Computes the offset of the given GPR in the user data area.
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#define GPR_OFFSET(regname) \
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(LLVM_EXTENSION offsetof(GPR, regname))
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// Computes the offset of the given FPR in the extended data area.
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#define FPR_OFFSET(regname) \
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(LLVM_EXTENSION offsetof(UserArea, fpr) + \
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LLVM_EXTENSION offsetof(FPR, xstate) + \
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LLVM_EXTENSION offsetof(FXSAVE, regname))
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// Computes the offset of the YMM register assembled from register halves.
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// Based on DNBArchImplX86_64.cpp from debugserver
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#define YMM_OFFSET(reg_index) \
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(LLVM_EXTENSION offsetof(UserArea, fpr) + \
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LLVM_EXTENSION offsetof(FPR, xstate) + \
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LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + \
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(32 * reg_index))
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// Number of bytes needed to represent a FPR.
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#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
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// Number of bytes needed to represent the i'th FP register.
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#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
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// Number of bytes needed to represent an XMM register.
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#define XMM_SIZE sizeof(XMMReg)
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// Number of bytes needed to represent a YMM register.
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#define YMM_SIZE sizeof(YMMReg)
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// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
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// Note that the size and offset will be updated by platform-specific classes.
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#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
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{ #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
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eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL }
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#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
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{ #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
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eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL }
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#define DEFINE_FP_ST(reg, i) \
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{ #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
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eEncodingVector, eFormatVectorOfUInt8, \
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{ dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
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NULL, NULL }
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#define DEFINE_FP_MM(reg, i) \
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{ #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
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eEncodingUint, eFormatHex, \
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{ dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
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NULL, NULL }
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#define DEFINE_XMM(reg, i) \
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{ #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \
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eEncodingVector, eFormatVectorOfUInt8, \
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{ dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64}, \
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NULL, NULL }
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#define DEFINE_YMM(reg, i) \
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{ #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i), \
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eEncodingVector, eFormatVectorOfUInt8, \
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{ dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64 }, \
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NULL, NULL }
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#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
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{ #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint, \
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eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
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#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
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{ #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint, \
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eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
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#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
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{ #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint, \
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eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
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#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
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{ #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint, \
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eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
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static RegisterInfo
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g_register_infos_x86_64[] =
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{
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// General purpose registers. EH_Frame, DWARF, Generic, Process Plugin
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DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
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DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
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DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_GPR_PSEUDO_32(eax, rax),
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DEFINE_GPR_PSEUDO_32(ebx, rbx),
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DEFINE_GPR_PSEUDO_32(ecx, rcx),
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DEFINE_GPR_PSEUDO_32(edx, rdx),
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DEFINE_GPR_PSEUDO_32(edi, rdi),
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DEFINE_GPR_PSEUDO_32(esi, rsi),
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DEFINE_GPR_PSEUDO_32(ebp, rbp),
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DEFINE_GPR_PSEUDO_32(esp, rsp),
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DEFINE_GPR_PSEUDO_32(r8d, r8),
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DEFINE_GPR_PSEUDO_32(r9d, r9),
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DEFINE_GPR_PSEUDO_32(r10d, r10),
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DEFINE_GPR_PSEUDO_32(r11d, r11),
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DEFINE_GPR_PSEUDO_32(r12d, r12),
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DEFINE_GPR_PSEUDO_32(r13d, r13),
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DEFINE_GPR_PSEUDO_32(r14d, r14),
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DEFINE_GPR_PSEUDO_32(r15d, r15),
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DEFINE_GPR_PSEUDO_16(ax, rax),
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DEFINE_GPR_PSEUDO_16(bx, rbx),
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DEFINE_GPR_PSEUDO_16(cx, rcx),
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DEFINE_GPR_PSEUDO_16(dx, rdx),
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DEFINE_GPR_PSEUDO_16(di, rdi),
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DEFINE_GPR_PSEUDO_16(si, rsi),
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DEFINE_GPR_PSEUDO_16(bp, rbp),
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DEFINE_GPR_PSEUDO_16(sp, rsp),
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DEFINE_GPR_PSEUDO_16(r8w, r8),
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DEFINE_GPR_PSEUDO_16(r9w, r9),
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DEFINE_GPR_PSEUDO_16(r10w, r10),
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DEFINE_GPR_PSEUDO_16(r11w, r11),
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DEFINE_GPR_PSEUDO_16(r12w, r12),
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DEFINE_GPR_PSEUDO_16(r13w, r13),
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DEFINE_GPR_PSEUDO_16(r14w, r14),
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DEFINE_GPR_PSEUDO_16(r15w, r15),
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DEFINE_GPR_PSEUDO_8H(ah, rax),
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DEFINE_GPR_PSEUDO_8H(bh, rbx),
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DEFINE_GPR_PSEUDO_8H(ch, rcx),
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DEFINE_GPR_PSEUDO_8H(dh, rdx),
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DEFINE_GPR_PSEUDO_8L(al, rax),
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DEFINE_GPR_PSEUDO_8L(bl, rbx),
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DEFINE_GPR_PSEUDO_8L(cl, rcx),
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DEFINE_GPR_PSEUDO_8L(dl, rdx),
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DEFINE_GPR_PSEUDO_8L(dil, rdi),
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DEFINE_GPR_PSEUDO_8L(sil, rsi),
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DEFINE_GPR_PSEUDO_8L(bpl, rbp),
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DEFINE_GPR_PSEUDO_8L(spl, rsp),
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DEFINE_GPR_PSEUDO_8L(r8l, r8),
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DEFINE_GPR_PSEUDO_8L(r9l, r9),
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DEFINE_GPR_PSEUDO_8L(r10l, r10),
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DEFINE_GPR_PSEUDO_8L(r11l, r11),
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DEFINE_GPR_PSEUDO_8L(r12l, r12),
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DEFINE_GPR_PSEUDO_8L(r13l, r13),
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DEFINE_GPR_PSEUDO_8L(r14l, r14),
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DEFINE_GPR_PSEUDO_8L(r15l, r15),
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// i387 Floating point registers. EH_frame, DWARF, Generic, Process Plugin
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DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
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// FP registers.
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DEFINE_FP_ST(st, 0),
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DEFINE_FP_ST(st, 1),
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DEFINE_FP_ST(st, 2),
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DEFINE_FP_ST(st, 3),
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DEFINE_FP_ST(st, 4),
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DEFINE_FP_ST(st, 5),
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DEFINE_FP_ST(st, 6),
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DEFINE_FP_ST(st, 7),
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DEFINE_FP_MM(mm, 0),
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DEFINE_FP_MM(mm, 1),
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DEFINE_FP_MM(mm, 2),
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DEFINE_FP_MM(mm, 3),
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DEFINE_FP_MM(mm, 4),
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DEFINE_FP_MM(mm, 5),
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DEFINE_FP_MM(mm, 6),
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DEFINE_FP_MM(mm, 7),
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// XMM registers
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DEFINE_XMM(xmm, 0),
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DEFINE_XMM(xmm, 1),
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DEFINE_XMM(xmm, 2),
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DEFINE_XMM(xmm, 3),
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DEFINE_XMM(xmm, 4),
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DEFINE_XMM(xmm, 5),
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DEFINE_XMM(xmm, 6),
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DEFINE_XMM(xmm, 7),
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DEFINE_XMM(xmm, 8),
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DEFINE_XMM(xmm, 9),
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DEFINE_XMM(xmm, 10),
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DEFINE_XMM(xmm, 11),
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DEFINE_XMM(xmm, 12),
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DEFINE_XMM(xmm, 13),
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DEFINE_XMM(xmm, 14),
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DEFINE_XMM(xmm, 15),
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// Copy of YMM registers assembled from xmm and ymmh
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DEFINE_YMM(ymm, 0),
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DEFINE_YMM(ymm, 1),
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DEFINE_YMM(ymm, 2),
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DEFINE_YMM(ymm, 3),
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DEFINE_YMM(ymm, 4),
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DEFINE_YMM(ymm, 5),
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DEFINE_YMM(ymm, 6),
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DEFINE_YMM(ymm, 7),
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DEFINE_YMM(ymm, 8),
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DEFINE_YMM(ymm, 9),
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DEFINE_YMM(ymm, 10),
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DEFINE_YMM(ymm, 11),
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DEFINE_YMM(ymm, 12),
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DEFINE_YMM(ymm, 13),
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DEFINE_YMM(ymm, 14),
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DEFINE_YMM(ymm, 15),
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};
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//---------------------------------------------------------------------------
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// End of cherry-pick of RegisterInfos_x86_64.h
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
static std::vector<lldb_private::RegisterInfo>&
|
||||
GetSharedRegisterInfoVector ()
|
||||
{
|
||||
static std::vector<lldb_private::RegisterInfo> register_infos;
|
||||
return register_infos;
|
||||
}
|
||||
|
||||
static const RegisterInfo *
|
||||
PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
|
||||
{
|
||||
switch (target_arch.GetMachine())
|
||||
{
|
||||
case llvm::Triple::x86_64:
|
||||
return g_register_infos_x86_64;
|
||||
default:
|
||||
assert(false && "Unhandled target architecture.");
|
||||
return nullptr;
|
||||
}
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
|
||||
{
|
||||
switch (target_arch.GetMachine())
|
||||
{
|
||||
case llvm::Triple::x86_64:
|
||||
return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
|
||||
default:
|
||||
assert(false && "Unhandled target architecture.");
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
RegisterContextNetBSD_x86_64::RegisterContextNetBSD_x86_64(const ArchSpec &target_arch) :
|
||||
lldb_private::RegisterInfoInterface(target_arch),
|
||||
m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
|
||||
m_register_count (PrivateGetRegisterCount (target_arch))
|
||||
{
|
||||
}
|
||||
|
||||
size_t
|
||||
RegisterContextNetBSD_x86_64::GetGPRSize() const
|
||||
{
|
||||
return sizeof(GPR);
|
||||
}
|
||||
|
||||
const RegisterInfo *
|
||||
RegisterContextNetBSD_x86_64::GetRegisterInfo() const
|
||||
{
|
||||
return m_register_info_p;
|
||||
}
|
||||
|
||||
uint32_t
|
||||
RegisterContextNetBSD_x86_64::GetRegisterCount () const
|
||||
{
|
||||
return m_register_count;
|
||||
}
|
||||
@ -0,0 +1,35 @@
|
||||
//===-- RegisterContextNetBSD_x86_64.h -------------------------*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef liblldb_RegisterContextNetBSD_x86_64_H_
|
||||
#define liblldb_RegisterContextNetBSD_x86_64_H_
|
||||
|
||||
#include "RegisterInfoInterface.h"
|
||||
|
||||
class RegisterContextNetBSD_x86_64:
|
||||
public lldb_private::RegisterInfoInterface
|
||||
{
|
||||
public:
|
||||
RegisterContextNetBSD_x86_64(const lldb_private::ArchSpec &target_arch);
|
||||
|
||||
size_t
|
||||
GetGPRSize() const override;
|
||||
|
||||
const lldb_private::RegisterInfo *
|
||||
GetRegisterInfo() const override;
|
||||
|
||||
uint32_t
|
||||
GetRegisterCount () const override;
|
||||
|
||||
private:
|
||||
const lldb_private::RegisterInfo *m_register_info_p;
|
||||
const uint32_t m_register_count;
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
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Reference in New Issue
Block a user