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CodeGen: More accurate mayAlias for instructions with multiple MMOs (#166211)

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There can only be meaningful aliasing between the memory accesses of
different instructions if at least one of the accesses modifies memory.

This check is applied at the instruction-level earlier in the method.
This change merely extends the check on a per-MMO basis.

This affects a SystemZ test because PFD instructions are both mayLoad
and mayStore but may carry a load-only MMO which is now no longer
treated as aliasing loads. The PFD instructions are from llvm.prefetch
generated by loop-data-prefetch.
This commit is contained in:
Nicolai Hähnle 2025-11-06 09:19:37 -08:00 committed by GitHub
parent 70f5fd47a4
commit d1387ed272
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GPG Key ID: B5690EEEBB952194
2 changed files with 8 additions and 4 deletions
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8
llvm/lib/CodeGen/MachineInstr.cpp
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@ -1547,10 +1547,14 @@ bool MachineInstr::mayAlias(BatchAAResults *AA, const MachineInstr &Other,
// Check each pair of memory operands from both instructions, which can't
// alias only if all pairs won't alias.
for (auto *MMOa : memoperands())
for (auto *MMOb : Other.memoperands())
for (auto *MMOa : memoperands()) {
for (auto *MMOb : Other.memoperands()) {
if (!MMOa->isStore() && !MMOb->isStore())
continue;
if (MemOperandsHaveAlias(MFI, AA, UseTBAA, MMOa, MMOb))
return true;
}
}
return false;
}

4
llvm/test/CodeGen/SystemZ/vec-load-element.ll
View File

@ -5,8 +5,8 @@
; CHECK-LABEL: .LBB0_1:
; CHECK-NOT: l %r
; CHECK-NOT: vlvgf
; CHECK: pfd
; CHECK: vlef
; CHECK-DAG: pfd
; CHECK-DAG: vlef
%type0 = type { i32, [400 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@Mem = external global [150 x %type0], align 4