Add tests for combining mask with shuffles; NFC
Differential Revision: https://reviews.llvm.org/D144144
This commit is contained in:
Noah Goldstein
parent
6b6c62c75b
commit
d821ac1aaf
229
llvm/test/CodeGen/X86/combine-mask-with-shuffle.ll
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229
llvm/test/CodeGen/X86/combine-mask-with-shuffle.ll
Normal file
@ -0,0 +1,229 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vpopcntdq,+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
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define <16 x i32> @combine_mask_with_or(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_or:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $2570, %ax # imm = 0xA0A
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpord %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = or <16 x i32> %shuf0_0, %shuf0_1
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_mul(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_mul:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $2570, %ax # imm = 0xA0A
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpmulld %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = mul <16 x i32> %shuf0_0, %shuf0_1
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_abs(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_abs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: vpabsd %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0_tmp0 = tail call <16 x i32> @llvm.abs.v16i32(<16 x i32> %shuf0_0, i1 true)
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%op0_0_tmp1 = tail call <16 x i32> @llvm.abs.v16i32(<16 x i32> %shuf0_1, i1 true)
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%op0_0 = shufflevector <16 x i32> %op0_0_tmp0, <16 x i32> %op0_0_tmp0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_umin(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_umin:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $-21846, %ax # imm = 0xAAAA
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpminud %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = tail call <16 x i32> @llvm.umin.v16i32(<16 x i32> %shuf0_0, <16 x i32> %shuf0_1)
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_umax(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_umax:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $-21846, %ax # imm = 0xAAAA
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpmaxud %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = tail call <16 x i32> @llvm.umax.v16i32(<16 x i32> %shuf0_0, <16 x i32> %shuf0_1)
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_smin(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_smin:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $-21846, %ax # imm = 0xAAAA
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpminsd %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %shuf0_0, <16 x i32> %shuf0_1)
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_smax(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_smax:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $-21846, %ax # imm = 0xAAAA
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpmaxsd %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %shuf0_0, <16 x i32> %shuf0_1)
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_shl(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_shl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $2570, %ax # imm = 0xA0A
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpsllvd %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = shl <16 x i32> %shuf0_0, %shuf0_1
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_ashr(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_ashr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
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; CHECK-NEXT: movw $2570, %ax # imm = 0xA0A
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
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; CHECK-NEXT: vpsravd %zmm2, %zmm1, %zmm1
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; CHECK-NEXT: vpopcntd %zmm0, %zmm0
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; CHECK-NEXT: movb $-52, %al
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
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%op0_0 = ashr <16 x i32> %shuf0_0, %shuf0_1
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%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
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%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i32> %r
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}
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define <16 x i32> @combine_mask_with_lshr(<16 x i32> %v0) {
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; CHECK-LABEL: combine_mask_with_lshr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
|
||||
; CHECK-NEXT: movw $2570, %ax # imm = 0xA0A
|
||||
; CHECK-NEXT: kmovw %eax, %k1
|
||||
; CHECK-NEXT: vpblendmd %zmm1, %zmm0, %zmm2 {%k1}
|
||||
; CHECK-NEXT: vpsrlvd %zmm2, %zmm1, %zmm1
|
||||
; CHECK-NEXT: vpopcntd %zmm0, %zmm0
|
||||
; CHECK-NEXT: movb $-52, %al
|
||||
; CHECK-NEXT: kmovw %eax, %k1
|
||||
; CHECK-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
|
||||
; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
|
||||
; CHECK-NEXT: retq
|
||||
%shuf0_0 = shufflevector <16 x i32> %v0, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
|
||||
%shuf0_1 = shufflevector <16 x i32> %v0, <16 x i32> %shuf0_0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
|
||||
%op0_0 = lshr <16 x i32> %shuf0_0, %shuf0_1
|
||||
%op1_0 = tail call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %v0)
|
||||
%r = shufflevector <16 x i32> %op0_0, <16 x i32> %op1_0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
|
||||
ret <16 x i32> %r
|
||||
}
|
||||
|
||||
declare <16 x i32> @llvm.smin.v16i32(<16 x i32>, <16 x i32>)
|
||||
declare <16 x i32> @llvm.smax.v16i32(<16 x i32>, <16 x i32>)
|
||||
declare <16 x i32> @llvm.umin.v16i32(<16 x i32>, <16 x i32>)
|
||||
declare <16 x i32> @llvm.umax.v16i32(<16 x i32>, <16 x i32>)
|
||||
declare <16 x i32> @llvm.ctpop.v16i32(<16 x i32>)
|
||||
declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1)
|
||||
Loading…
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Reference in New Issue
Block a user