[OpenMP] Fix iteration count for nested triangular OpenMP loops (#190153)
This patch restricts the triangular loop iteration count optimization to only apply to nested triangular loops (`depth >= 2`), not first-level triangular loops. The optimization computes iterations as `(Upper - Lower + 1`) for triangular loops where the inner loop bound depends on an outer loop counter. However, this formula only works correctly for deeply nested triangular dependencies: `k` depends on `j`, and `j` itself depends on `i` For first-level triangular loops: `k` depends directly on `i`, the standard iteration count formula handles the calculation correctly.
This commit is contained in:
Zahira Ammarguellat
GitHub
parent
5124dd2536
commit
d8bfd7c63a
@ -8854,18 +8854,22 @@ calculateNumIters(Sema &SemaRef, Scope *S, SourceLocation DefaultLoc,
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ExprResult Diff;
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// For triangular loops, use already computed Upper and Lower bounds to
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// calculate the number of iterations: Upper - Lower + 1.
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// For nested triangular loops (depth >= 2), use already computed Upper and
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// Lower bounds to calculate the number of iterations: Upper - Lower + 1.
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// Don't apply to first-level triangular loops as the standard formula handles
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// those correctly.
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if (TestIsStrictOp && InitDependOnLC.has_value() &&
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!CondDependOnLC.has_value()) {
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InitDependOnLC.value() >= 2 && !CondDependOnLC.has_value()) {
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Diff = SemaRef.BuildBinOp(S, DefaultLoc, BO_Sub, Upper, Lower);
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if (!Diff.isUsable())
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return nullptr;
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Diff =
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SemaRef.BuildBinOp(S, DefaultLoc, BO_Add, Diff.get(),
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SemaRef.ActOnIntegerConstant(DefaultLoc, 1).get());
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if (!Diff.isUsable())
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return nullptr;
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return Diff.get();
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}
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@ -40,14 +40,14 @@ void collapsed(int mp) {
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// CHECK-NEXT: [[J:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I0:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
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// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
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// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
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// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[J17:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I18:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I019:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[J19:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I20:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I021:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]])
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// CHECK-NEXT: store i32 [[MP]], ptr [[MP_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[MP_ADDR]], align 4
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@ -90,20 +90,22 @@ void collapsed(int mp) {
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// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB7:%.*]] = sub i32 [[TMP12]], [[TMP13]]
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// CHECK-NEXT: [[ADD8:%.*]] = add i32 [[SUB7]], 1
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// CHECK-NEXT: [[CONV9:%.*]] = zext i32 [[ADD8]] to i64
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// CHECK-NEXT: [[MUL10:%.*]] = mul nsw i64 [[CONV6]], [[CONV9]]
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// CHECK-NEXT: [[MUL11:%.*]] = mul nsw i64 [[MUL10]], 10
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// CHECK-NEXT: [[SUB12:%.*]] = sub nsw i64 [[MUL11]], 1
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// CHECK-NEXT: store i64 [[SUB12]], ptr [[DOTCAPTURE_EXPR_3]], align 8
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// CHECK-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], 1
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// CHECK-NEXT: [[ADD9:%.*]] = add i32 [[SUB8]], 1
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// CHECK-NEXT: [[DIV10:%.*]] = udiv i32 [[ADD9]], 1
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// CHECK-NEXT: [[CONV11:%.*]] = zext i32 [[DIV10]] to i64
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// CHECK-NEXT: [[MUL12:%.*]] = mul nsw i64 [[CONV6]], [[CONV11]]
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// CHECK-NEXT: [[MUL13:%.*]] = mul nsw i64 [[MUL12]], 10
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// CHECK-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL13]], 1
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// CHECK-NEXT: store i64 [[SUB14]], ptr [[DOTCAPTURE_EXPR_3]], align 8
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// CHECK-NEXT: store i32 0, ptr [[J]], align 4
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// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4
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// CHECK-NEXT: store i32 [[TMP14]], ptr [[I]], align 4
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// CHECK-NEXT: store i32 0, ptr [[I0]], align 4
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// CHECK-NEXT: store i32 0, ptr [[_TMP13]], align 4
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// CHECK-NEXT: store i32 0, ptr [[_TMP15]], align 4
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// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
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// CHECK-NEXT: [[CMP14:%.*]] = icmp slt i32 0, [[TMP15]]
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// CHECK-NEXT: br i1 [[CMP14]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
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// CHECK-NEXT: [[CMP16:%.*]] = icmp slt i32 0, [[TMP15]]
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// CHECK-NEXT: br i1 [[CMP16]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
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// CHECK: omp.precond.then:
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// CHECK-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8
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// CHECK-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
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@ -113,122 +115,136 @@ void collapsed(int mp) {
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// CHECK-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
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// CHECK-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
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// CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
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// CHECK-NEXT: [[CMP20:%.*]] = icmp sgt i64 [[TMP17]], [[TMP18]]
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// CHECK-NEXT: br i1 [[CMP20]], label [[COND_TRUE22:%.*]], label [[COND_FALSE23:%.*]]
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// CHECK: cond.true22:
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// CHECK-NEXT: [[CMP22:%.*]] = icmp sgt i64 [[TMP17]], [[TMP18]]
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// CHECK-NEXT: br i1 [[CMP22]], label [[COND_TRUE24:%.*]], label [[COND_FALSE25:%.*]]
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// CHECK: cond.true24:
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// CHECK-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
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// CHECK-NEXT: br label [[COND_END24:%.*]]
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// CHECK: cond.false23:
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// CHECK-NEXT: br label [[COND_END26:%.*]]
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// CHECK: cond.false25:
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// CHECK-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
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// CHECK-NEXT: br label [[COND_END24]]
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// CHECK: cond.end24:
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// CHECK-NEXT: [[COND25:%.*]] = phi i64 [ [[TMP19]], [[COND_TRUE22]] ], [ [[TMP20]], [[COND_FALSE23]] ]
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// CHECK-NEXT: store i64 [[COND25]], ptr [[DOTOMP_UB]], align 8
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// CHECK-NEXT: br label [[COND_END26]]
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// CHECK: cond.end26:
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// CHECK-NEXT: [[COND27:%.*]] = phi i64 [ [[TMP19]], [[COND_TRUE24]] ], [ [[TMP20]], [[COND_FALSE25]] ]
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// CHECK-NEXT: store i64 [[COND27]], ptr [[DOTOMP_UB]], align 8
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// CHECK-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
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// CHECK-NEXT: store i64 [[TMP21]], ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
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// CHECK: omp.inner.for.cond:
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// CHECK-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
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// CHECK-NEXT: [[CMP26:%.*]] = icmp sle i64 [[TMP22]], [[TMP23]]
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// CHECK-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
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// CHECK-NEXT: [[CMP28:%.*]] = icmp sle i64 [[TMP22]], [[TMP23]]
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// CHECK-NEXT: br i1 [[CMP28]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
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// CHECK: omp.inner.for.body:
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// CHECK-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB28:%.*]] = sub i32 [[TMP25]], [[TMP26]]
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// CHECK-NEXT: [[ADD29:%.*]] = add i32 [[SUB28]], 1
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// CHECK-NEXT: [[MUL30:%.*]] = mul i32 1, [[ADD29]]
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// CHECK-NEXT: [[MUL31:%.*]] = mul i32 [[MUL30]], 10
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// CHECK-NEXT: [[CONV32:%.*]] = zext i32 [[MUL31]] to i64
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// CHECK-NEXT: [[DIV33:%.*]] = sdiv i64 [[TMP24]], [[CONV32]]
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// CHECK-NEXT: [[MUL34:%.*]] = mul nsw i64 [[DIV33]], 1
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// CHECK-NEXT: [[ADD35:%.*]] = add nsw i64 0, [[MUL34]]
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// CHECK-NEXT: [[CONV36:%.*]] = trunc i64 [[ADD35]] to i32
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// CHECK-NEXT: store i32 [[CONV36]], ptr [[J17]], align 4
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// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[J17]], align 4
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// CHECK-NEXT: [[CONV37:%.*]] = sext i32 [[TMP27]] to i64
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// CHECK-NEXT: [[SUB30:%.*]] = sub i32 [[TMP25]], [[TMP26]]
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// CHECK-NEXT: [[SUB31:%.*]] = sub i32 [[SUB30]], 1
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// CHECK-NEXT: [[ADD32:%.*]] = add i32 [[SUB31]], 1
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// CHECK-NEXT: [[DIV33:%.*]] = udiv i32 [[ADD32]], 1
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// CHECK-NEXT: [[MUL34:%.*]] = mul i32 1, [[DIV33]]
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// CHECK-NEXT: [[MUL35:%.*]] = mul i32 [[MUL34]], 10
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// CHECK-NEXT: [[CONV36:%.*]] = zext i32 [[MUL35]] to i64
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// CHECK-NEXT: [[DIV37:%.*]] = sdiv i64 [[TMP24]], [[CONV36]]
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// CHECK-NEXT: [[MUL38:%.*]] = mul nsw i64 [[DIV37]], 1
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// CHECK-NEXT: [[ADD39:%.*]] = add nsw i64 0, [[MUL38]]
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// CHECK-NEXT: [[CONV40:%.*]] = trunc i64 [[ADD39]] to i32
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// CHECK-NEXT: store i32 [[CONV40]], ptr [[J19]], align 4
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// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[J19]], align 4
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// CHECK-NEXT: [[CONV41:%.*]] = sext i32 [[TMP27]] to i64
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// CHECK-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB38:%.*]] = sub i32 [[TMP30]], [[TMP31]]
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// CHECK-NEXT: [[ADD39:%.*]] = add i32 [[SUB38]], 1
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// CHECK-NEXT: [[MUL40:%.*]] = mul i32 1, [[ADD39]]
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// CHECK-NEXT: [[MUL41:%.*]] = mul i32 [[MUL40]], 10
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// CHECK-NEXT: [[CONV42:%.*]] = zext i32 [[MUL41]] to i64
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// CHECK-NEXT: [[DIV43:%.*]] = sdiv i64 [[TMP29]], [[CONV42]]
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// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB44:%.*]] = sub i32 [[TMP32]], [[TMP33]]
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// CHECK-NEXT: [[ADD45:%.*]] = add i32 [[SUB44]], 1
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// CHECK-NEXT: [[MUL46:%.*]] = mul i32 1, [[ADD45]]
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// CHECK-NEXT: [[SUB42:%.*]] = sub i32 [[TMP30]], [[TMP31]]
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// CHECK-NEXT: [[SUB43:%.*]] = sub i32 [[SUB42]], 1
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// CHECK-NEXT: [[ADD44:%.*]] = add i32 [[SUB43]], 1
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// CHECK-NEXT: [[DIV45:%.*]] = udiv i32 [[ADD44]], 1
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// CHECK-NEXT: [[MUL46:%.*]] = mul i32 1, [[DIV45]]
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// CHECK-NEXT: [[MUL47:%.*]] = mul i32 [[MUL46]], 10
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// CHECK-NEXT: [[CONV48:%.*]] = zext i32 [[MUL47]] to i64
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// CHECK-NEXT: [[MUL49:%.*]] = mul nsw i64 [[DIV43]], [[CONV48]]
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// CHECK-NEXT: [[SUB50:%.*]] = sub nsw i64 [[TMP28]], [[MUL49]]
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// CHECK-NEXT: [[DIV51:%.*]] = sdiv i64 [[SUB50]], 10
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// CHECK-NEXT: [[MUL52:%.*]] = mul nsw i64 [[DIV51]], 1
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// CHECK-NEXT: [[ADD53:%.*]] = add nsw i64 [[CONV37]], [[MUL52]]
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// CHECK-NEXT: [[CONV54:%.*]] = trunc i64 [[ADD53]] to i32
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// CHECK-NEXT: store i32 [[CONV54]], ptr [[I18]], align 4
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// CHECK-NEXT: [[DIV49:%.*]] = sdiv i64 [[TMP29]], [[CONV48]]
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// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB50:%.*]] = sub i32 [[TMP32]], [[TMP33]]
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// CHECK-NEXT: [[SUB51:%.*]] = sub i32 [[SUB50]], 1
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// CHECK-NEXT: [[ADD52:%.*]] = add i32 [[SUB51]], 1
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// CHECK-NEXT: [[DIV53:%.*]] = udiv i32 [[ADD52]], 1
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// CHECK-NEXT: [[MUL54:%.*]] = mul i32 1, [[DIV53]]
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// CHECK-NEXT: [[MUL55:%.*]] = mul i32 [[MUL54]], 10
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// CHECK-NEXT: [[CONV56:%.*]] = zext i32 [[MUL55]] to i64
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// CHECK-NEXT: [[MUL57:%.*]] = mul nsw i64 [[DIV49]], [[CONV56]]
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// CHECK-NEXT: [[SUB58:%.*]] = sub nsw i64 [[TMP28]], [[MUL57]]
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// CHECK-NEXT: [[DIV59:%.*]] = sdiv i64 [[SUB58]], 10
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// CHECK-NEXT: [[MUL60:%.*]] = mul nsw i64 [[DIV59]], 1
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// CHECK-NEXT: [[ADD61:%.*]] = add nsw i64 [[CONV41]], [[MUL60]]
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// CHECK-NEXT: [[CONV62:%.*]] = trunc i64 [[ADD61]] to i32
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// CHECK-NEXT: store i32 [[CONV62]], ptr [[I20]], align 4
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// CHECK-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB55:%.*]] = sub i32 [[TMP36]], [[TMP37]]
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// CHECK-NEXT: [[ADD56:%.*]] = add i32 [[SUB55]], 1
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// CHECK-NEXT: [[MUL57:%.*]] = mul i32 1, [[ADD56]]
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// CHECK-NEXT: [[MUL58:%.*]] = mul i32 [[MUL57]], 10
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// CHECK-NEXT: [[CONV59:%.*]] = zext i32 [[MUL58]] to i64
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// CHECK-NEXT: [[DIV60:%.*]] = sdiv i64 [[TMP35]], [[CONV59]]
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// CHECK-NEXT: [[SUB63:%.*]] = sub i32 [[TMP36]], [[TMP37]]
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// CHECK-NEXT: [[SUB64:%.*]] = sub i32 [[SUB63]], 1
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// CHECK-NEXT: [[ADD65:%.*]] = add i32 [[SUB64]], 1
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// CHECK-NEXT: [[DIV66:%.*]] = udiv i32 [[ADD65]], 1
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// CHECK-NEXT: [[MUL67:%.*]] = mul i32 1, [[DIV66]]
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// CHECK-NEXT: [[MUL68:%.*]] = mul i32 [[MUL67]], 10
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// CHECK-NEXT: [[CONV69:%.*]] = zext i32 [[MUL68]] to i64
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// CHECK-NEXT: [[DIV70:%.*]] = sdiv i64 [[TMP35]], [[CONV69]]
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// CHECK-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB61:%.*]] = sub i32 [[TMP38]], [[TMP39]]
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// CHECK-NEXT: [[ADD62:%.*]] = add i32 [[SUB61]], 1
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// CHECK-NEXT: [[MUL63:%.*]] = mul i32 1, [[ADD62]]
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// CHECK-NEXT: [[MUL64:%.*]] = mul i32 [[MUL63]], 10
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// CHECK-NEXT: [[CONV65:%.*]] = zext i32 [[MUL64]] to i64
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// CHECK-NEXT: [[MUL66:%.*]] = mul nsw i64 [[DIV60]], [[CONV65]]
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// CHECK-NEXT: [[SUB67:%.*]] = sub nsw i64 [[TMP34]], [[MUL66]]
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// CHECK-NEXT: [[SUB71:%.*]] = sub i32 [[TMP38]], [[TMP39]]
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// CHECK-NEXT: [[SUB72:%.*]] = sub i32 [[SUB71]], 1
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// CHECK-NEXT: [[ADD73:%.*]] = add i32 [[SUB72]], 1
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// CHECK-NEXT: [[DIV74:%.*]] = udiv i32 [[ADD73]], 1
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// CHECK-NEXT: [[MUL75:%.*]] = mul i32 1, [[DIV74]]
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// CHECK-NEXT: [[MUL76:%.*]] = mul i32 [[MUL75]], 10
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// CHECK-NEXT: [[CONV77:%.*]] = zext i32 [[MUL76]] to i64
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// CHECK-NEXT: [[MUL78:%.*]] = mul nsw i64 [[DIV70]], [[CONV77]]
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// CHECK-NEXT: [[SUB79:%.*]] = sub nsw i64 [[TMP34]], [[MUL78]]
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// CHECK-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP41:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
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// CHECK-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB68:%.*]] = sub i32 [[TMP42]], [[TMP43]]
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// CHECK-NEXT: [[ADD69:%.*]] = add i32 [[SUB68]], 1
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// CHECK-NEXT: [[MUL70:%.*]] = mul i32 1, [[ADD69]]
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// CHECK-NEXT: [[MUL71:%.*]] = mul i32 [[MUL70]], 10
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// CHECK-NEXT: [[CONV72:%.*]] = zext i32 [[MUL71]] to i64
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// CHECK-NEXT: [[DIV73:%.*]] = sdiv i64 [[TMP41]], [[CONV72]]
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// CHECK-NEXT: [[SUB80:%.*]] = sub i32 [[TMP42]], [[TMP43]]
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// CHECK-NEXT: [[SUB81:%.*]] = sub i32 [[SUB80]], 1
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// CHECK-NEXT: [[ADD82:%.*]] = add i32 [[SUB81]], 1
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// CHECK-NEXT: [[DIV83:%.*]] = udiv i32 [[ADD82]], 1
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// CHECK-NEXT: [[MUL84:%.*]] = mul i32 1, [[DIV83]]
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// CHECK-NEXT: [[MUL85:%.*]] = mul i32 [[MUL84]], 10
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// CHECK-NEXT: [[CONV86:%.*]] = zext i32 [[MUL85]] to i64
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// CHECK-NEXT: [[DIV87:%.*]] = sdiv i64 [[TMP41]], [[CONV86]]
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// CHECK-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTUPPER]], align 4
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// CHECK-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTLOWER]], align 4
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// CHECK-NEXT: [[SUB74:%.*]] = sub i32 [[TMP44]], [[TMP45]]
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// CHECK-NEXT: [[ADD75:%.*]] = add i32 [[SUB74]], 1
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// CHECK-NEXT: [[MUL76:%.*]] = mul i32 1, [[ADD75]]
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// CHECK-NEXT: [[MUL77:%.*]] = mul i32 [[MUL76]], 10
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// CHECK-NEXT: [[CONV78:%.*]] = zext i32 [[MUL77]] to i64
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// CHECK-NEXT: [[MUL79:%.*]] = mul nsw i64 [[DIV73]], [[CONV78]]
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// CHECK-NEXT: [[SUB80:%.*]] = sub nsw i64 [[TMP40]], [[MUL79]]
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// CHECK-NEXT: [[DIV81:%.*]] = sdiv i64 [[SUB80]], 10
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// CHECK-NEXT: [[MUL82:%.*]] = mul nsw i64 [[DIV81]], 10
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// CHECK-NEXT: [[SUB83:%.*]] = sub nsw i64 [[SUB67]], [[MUL82]]
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// CHECK-NEXT: [[MUL84:%.*]] = mul nsw i64 [[SUB83]], 1
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||||
// CHECK-NEXT: [[ADD85:%.*]] = add nsw i64 0, [[MUL84]]
|
||||
// CHECK-NEXT: [[CONV86:%.*]] = trunc i64 [[ADD85]] to i32
|
||||
// CHECK-NEXT: store i32 [[CONV86]], ptr [[I019]], align 4
|
||||
// CHECK-NEXT: [[TMP46:%.*]] = load i32, ptr [[I18]], align 4
|
||||
// CHECK-NEXT: [[SUB88:%.*]] = sub i32 [[TMP44]], [[TMP45]]
|
||||
// CHECK-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1
|
||||
// CHECK-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1
|
||||
// CHECK-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1
|
||||
// CHECK-NEXT: [[MUL92:%.*]] = mul i32 1, [[DIV91]]
|
||||
// CHECK-NEXT: [[MUL93:%.*]] = mul i32 [[MUL92]], 10
|
||||
// CHECK-NEXT: [[CONV94:%.*]] = zext i32 [[MUL93]] to i64
|
||||
// CHECK-NEXT: [[MUL95:%.*]] = mul nsw i64 [[DIV87]], [[CONV94]]
|
||||
// CHECK-NEXT: [[SUB96:%.*]] = sub nsw i64 [[TMP40]], [[MUL95]]
|
||||
// CHECK-NEXT: [[DIV97:%.*]] = sdiv i64 [[SUB96]], 10
|
||||
// CHECK-NEXT: [[MUL98:%.*]] = mul nsw i64 [[DIV97]], 10
|
||||
// CHECK-NEXT: [[SUB99:%.*]] = sub nsw i64 [[SUB79]], [[MUL98]]
|
||||
// CHECK-NEXT: [[MUL100:%.*]] = mul nsw i64 [[SUB99]], 1
|
||||
// CHECK-NEXT: [[ADD101:%.*]] = add nsw i64 0, [[MUL100]]
|
||||
// CHECK-NEXT: [[CONV102:%.*]] = trunc i64 [[ADD101]] to i32
|
||||
// CHECK-NEXT: store i32 [[CONV102]], ptr [[I021]], align 4
|
||||
// CHECK-NEXT: [[TMP46:%.*]] = load i32, ptr [[I20]], align 4
|
||||
// CHECK-NEXT: [[TMP47:%.*]] = load i32, ptr [[MP_ADDR]], align 4
|
||||
// CHECK-NEXT: [[CMP87:%.*]] = icmp slt i32 [[TMP46]], [[TMP47]]
|
||||
// CHECK-NEXT: br i1 [[CMP87]], label [[OMP_BODY_NEXT:%.*]], label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK-NEXT: [[CMP103:%.*]] = icmp slt i32 [[TMP46]], [[TMP47]]
|
||||
// CHECK-NEXT: br i1 [[CMP103]], label [[OMP_BODY_NEXT:%.*]], label [[OMP_BODY_CONTINUE:%.*]]
|
||||
// CHECK: omp.body.next:
|
||||
// CHECK-NEXT: br label [[OMP_BODY_CONTINUE]]
|
||||
// CHECK: omp.body.continue:
|
||||
// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
||||
// CHECK: omp.inner.for.inc:
|
||||
// CHECK-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
|
||||
// CHECK-NEXT: [[ADD89:%.*]] = add nsw i64 [[TMP48]], 1
|
||||
// CHECK-NEXT: store i64 [[ADD89]], ptr [[DOTOMP_IV]], align 8
|
||||
// CHECK-NEXT: [[ADD105:%.*]] = add nsw i64 [[TMP48]], 1
|
||||
// CHECK-NEXT: store i64 [[ADD105]], ptr [[DOTOMP_IV]], align 8
|
||||
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
|
||||
// CHECK: omp.inner.for.end:
|
||||
// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
|
||||
@ -277,21 +293,21 @@ void collapsed(int mp) {
|
||||
// SIMD-ONLY0-NEXT: [[TMP6:%.*]] = load i32, ptr [[I0]], align 4
|
||||
// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
||||
// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I0]], align 4
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP2:![0-9]+]]
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP1:![0-9]+]]
|
||||
// SIMD-ONLY0: for.end:
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_INC7:%.*]]
|
||||
// SIMD-ONLY0: for.inc7:
|
||||
// SIMD-ONLY0-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4
|
||||
// SIMD-ONLY0-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP7]], 1
|
||||
// SIMD-ONLY0-NEXT: store i32 [[INC8]], ptr [[I]], align 4
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP3:![0-9]+]]
|
||||
// SIMD-ONLY0: for.end9:
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_INC10:%.*]]
|
||||
// SIMD-ONLY0: for.inc10:
|
||||
// SIMD-ONLY0-NEXT: [[TMP8:%.*]] = load i32, ptr [[J]], align 4
|
||||
// SIMD-ONLY0-NEXT: [[INC11:%.*]] = add nsw i32 [[TMP8]], 1
|
||||
// SIMD-ONLY0-NEXT: store i32 [[INC11]], ptr [[J]], align 4
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
|
||||
// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||
// SIMD-ONLY0: for.end12:
|
||||
// SIMD-ONLY0-NEXT: ret void
|
||||
//
|
||||
|
||||
@ -112,7 +112,7 @@ int main(void) {
|
||||
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4
|
||||
// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
|
||||
// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
|
||||
// CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
|
||||
// CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
|
||||
// CHECK: for.end:
|
||||
// CHECK-NEXT: call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP0]], i32 4)
|
||||
// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_Z8func_redv.omp_outlined, ptr [[ARRAY]])
|
||||
@ -152,7 +152,7 @@ int main(void) {
|
||||
// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
|
||||
// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
|
||||
// CHECK-NEXT: store ptr [[ARRAY]], ptr [[ARRAY_ADDR]], align 8
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAY_ADDR]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAY_ADDR]], align 8, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
|
||||
// CHECK-NEXT: call void @_ZN3SumC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[RESULT]], i32 noundef 0)
|
||||
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
|
||||
// CHECK-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
|
||||
@ -259,7 +259,7 @@ int main(void) {
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
// CHECK-NEXT: store ptr [[RHS]], ptr [[RHS_ADDR]], align 8
|
||||
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RHS_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RHS_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: [[VAL:%.*]] = getelementptr inbounds nuw [[CLASS_SUM:%.*]], ptr [[TMP0]], i32 0, i32 0
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[VAL]], align 4
|
||||
// CHECK-NEXT: [[VAL2:%.*]] = getelementptr inbounds nuw [[CLASS_SUM]], ptr [[THIS1]], i32 0, i32 0
|
||||
@ -293,7 +293,7 @@ int main(void) {
|
||||
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
||||
// CHECK-NEXT: [[VAL:%.*]] = getelementptr inbounds nuw [[CLASS_SUM]], ptr [[THIS1]], i32 0, i32 0
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[VAL]], align 4
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RHS_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RHS_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: [[VAL2:%.*]] = getelementptr inbounds nuw [[CLASS_SUM]], ptr [[TMP1]], i32 0, i32 0
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[VAL2]], align 4
|
||||
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
|
||||
@ -353,9 +353,9 @@ int main(void) {
|
||||
// CHECK-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
|
||||
// CHECK-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
|
||||
// CHECK-NEXT: store ptr [[SUM_V]], ptr [[SUM_V_ADDR]], align 8
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
|
||||
// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
||||
// CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
||||
@ -374,7 +374,7 @@ int main(void) {
|
||||
// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
|
||||
// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
|
||||
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
|
||||
// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store i32 0, ptr [[SUM_V4]], align 4
|
||||
// CHECK-NEXT: store ptr [[SUM_V4]], ptr [[_TMP5]], align 8
|
||||
// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
|
||||
@ -409,7 +409,7 @@ int main(void) {
|
||||
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
||||
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i64 [[IDXPROM]]
|
||||
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
|
||||
// CHECK-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP18]]
|
||||
// CHECK-NEXT: store i32 [[ADD9]], ptr [[TMP19]], align 4
|
||||
@ -507,13 +507,13 @@ int main(void) {
|
||||
// CHECK-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
|
||||
// CHECK-NEXT: store ptr [[SUM_V]], ptr [[SUM_V_ADDR]], align 8
|
||||
// CHECK-NEXT: store ptr [[PROD_V]], ptr [[PROD_V_ADDR]], align 8
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PROD_V_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PROD_V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store i32 1, ptr [[TMP2]], align 4
|
||||
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SUM_V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8
|
||||
// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[PROD_V_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[PROD_V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8
|
||||
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4
|
||||
// CHECK-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4
|
||||
@ -532,10 +532,10 @@ int main(void) {
|
||||
// CHECK-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
|
||||
// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
|
||||
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
|
||||
// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store i32 0, ptr [[SUM_V5]], align 4
|
||||
// CHECK-NEXT: store ptr [[SUM_V5]], ptr [[_TMP6]], align 8
|
||||
// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: store i32 1, ptr [[PROD_V7]], align 4
|
||||
// CHECK-NEXT: store ptr [[PROD_V7]], ptr [[_TMP8]], align 8
|
||||
// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
|
||||
@ -570,7 +570,7 @@ int main(void) {
|
||||
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
|
||||
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i64 [[IDXPROM]]
|
||||
// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
|
||||
// CHECK-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP23]], [[TMP21]]
|
||||
// CHECK-NEXT: store i32 [[ADD12]], ptr [[TMP22]], align 4
|
||||
@ -579,7 +579,7 @@ int main(void) {
|
||||
// CHECK-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP25]] to i64
|
||||
// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, ptr [[TMP24]], i64 [[IDXPROM13]]
|
||||
// CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[ARRAYIDX14]], align 4
|
||||
// CHECK-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META5]], !align [[META6]]
|
||||
// CHECK-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META4]], !align [[META5]]
|
||||
// CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
|
||||
// CHECK-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP28]], [[TMP26]]
|
||||
// CHECK-NEXT: store i32 [[MUL15]], ptr [[TMP27]], align 4
|
||||
@ -698,7 +698,7 @@ int main(void) {
|
||||
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4
|
||||
// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
|
||||
// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
|
||||
// CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
|
||||
// CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
|
||||
// CHECK: for.end:
|
||||
// CHECK-NEXT: call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP0]], i32 4)
|
||||
// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @main.omp_outlined, ptr [[V]])
|
||||
|
||||
File diff suppressed because it is too large
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Reference in New Issue
Block a user