[X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy about GNUX32
Summary: In GNUX23, is64BitMode returns true, but pointers are 32-bits. So we shouldn't copy pointer values into RSI/RDI since the widths don't match. Fixes PR38865 despite what the title says. I think the llvm_unreachable in the copyPhysReg code tricked the optimizer and made the fatal error trigger. Reviewers: rnk, efriedma, MatzeB, echristo Reviewed By: efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D51893 llvm-svn: 342015
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@ -394,30 +394,41 @@ def : Pat<(sub GR64:$op, (i64 (X86setcc_c X86_COND_B, EFLAGS))),
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//
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let SchedRW = [WriteMicrocoded] in {
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let Defs = [ECX,EDI,ESI], Uses = [ECX,EDI,ESI], isCodeGenOnly = 1 in {
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def REP_MOVSB_32 : I<0xA4, RawFrm, (outs), (ins), "{rep;movsb|rep movsb}",
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[(X86rep_movs i8)]>, REP,
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Requires<[Not64BitMode]>;
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def REP_MOVSW_32 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsw|rep movsw}",
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[(X86rep_movs i16)]>, REP, OpSize16,
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Requires<[Not64BitMode]>;
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def REP_MOVSD_32 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsl|rep movsd}",
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[(X86rep_movs i32)]>, REP, OpSize32,
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Requires<[Not64BitMode]>;
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def REP_MOVSB_32 : I<0xA4, RawFrm, (outs), (ins),
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"{rep;movsb (%esi), %es:(%edi)|rep movsb es:[edi], [esi]}",
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[(X86rep_movs i8)]>, REP, AdSize32,
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Requires<[NotLP64]>;
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def REP_MOVSW_32 : I<0xA5, RawFrm, (outs), (ins),
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"{rep;movsw (%esi), %es:(%edi)|rep movsw es:[edi], [esi]}",
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[(X86rep_movs i16)]>, REP, AdSize32, OpSize16,
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Requires<[NotLP64]>;
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def REP_MOVSD_32 : I<0xA5, RawFrm, (outs), (ins),
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"{rep;movsl (%esi), %es:(%edi)|rep movsd es:[edi], [esi]}",
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[(X86rep_movs i32)]>, REP, AdSize32, OpSize32,
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Requires<[NotLP64]>;
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def REP_MOVSQ_32 : RI<0xA5, RawFrm, (outs), (ins),
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"{rep;movsq (%esi), %es:(%edi)|rep movsq es:[edi], [esi]}",
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[(X86rep_movs i64)]>, REP, AdSize32,
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Requires<[NotLP64, In64BitMode]>;
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}
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let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in {
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def REP_MOVSB_64 : I<0xA4, RawFrm, (outs), (ins), "{rep;movsb|rep movsb}",
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[(X86rep_movs i8)]>, REP,
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Requires<[In64BitMode]>;
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def REP_MOVSW_64 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsw|rep movsw}",
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[(X86rep_movs i16)]>, REP, OpSize16,
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Requires<[In64BitMode]>;
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def REP_MOVSD_64 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsl|rep movsd}",
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[(X86rep_movs i32)]>, REP, OpSize32,
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Requires<[In64BitMode]>;
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def REP_MOVSQ_64 : RI<0xA5, RawFrm, (outs), (ins), "{rep;movsq|rep movsq}",
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[(X86rep_movs i64)]>, REP,
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Requires<[In64BitMode]>;
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def REP_MOVSB_64 : I<0xA4, RawFrm, (outs), (ins),
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"{rep;movsb (%rsi), %es:(%rdi)|rep movsb es:[rdi], [rsi]}",
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[(X86rep_movs i8)]>, REP, AdSize64,
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Requires<[IsLP64]>;
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def REP_MOVSW_64 : I<0xA5, RawFrm, (outs), (ins),
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"{rep;movsw (%rsi), %es:(%rdi)|rep movsw es:[rdi], [rsi]}",
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[(X86rep_movs i16)]>, REP, AdSize64, OpSize16,
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Requires<[IsLP64]>;
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def REP_MOVSD_64 : I<0xA5, RawFrm, (outs), (ins),
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"{rep;movsl (%rsi), %es:(%rdi)|rep movsdi es:[rdi], [rsi]}",
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[(X86rep_movs i32)]>, REP, AdSize64, OpSize32,
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Requires<[IsLP64]>;
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def REP_MOVSQ_64 : RI<0xA5, RawFrm, (outs), (ins),
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"{rep;movsq (%rsi), %es:(%rdi)|rep movsq es:[rdi], [rsi]}",
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[(X86rep_movs i64)]>, REP, AdSize64,
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Requires<[IsLP64]>;
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}
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// FIXME: Should use "(X86rep_stos AL)" as the pattern.
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@ -255,14 +255,15 @@ SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy(
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}
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}
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bool Use64BitRegs = Subtarget.isTarget64BitLP64();
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SDValue InFlag;
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
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Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX,
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DAG.getIntPtrConstant(Repeats.Count(), dl), InFlag);
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InFlag = Chain.getValue(1);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
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Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RDI : X86::EDI,
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Dst, InFlag);
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InFlag = Chain.getValue(1);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI : X86::ESI,
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Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RSI : X86::ESI,
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Src, InFlag);
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InFlag = Chain.getValue(1);
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47
llvm/test/CodeGen/X86/pr38865.ll
Normal file
47
llvm/test/CodeGen/X86/pr38865.ll
Normal file
@ -0,0 +1,47 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -show-mc-encoding < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnux32"
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%struct.a = type { [65 x i32] }
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@c = global %struct.a zeroinitializer, align 4
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define void @e() nounwind {
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; CHECK-LABEL: e:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx # encoding: [0x53]
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; CHECK-NEXT: subl $528, %esp # encoding: [0x81,0xec,0x10,0x02,0x00,0x00]
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; CHECK-NEXT: # imm = 0x210
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; CHECK-NEXT: leal {{[0-9]+}}(%rsp), %ebx # encoding: [0x8d,0x9c,0x24,0x08,0x01,0x00,0x00]
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; CHECK-NEXT: movl $c, %esi # encoding: [0xbe,A,A,A,A]
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; CHECK-NEXT: # fixup A - offset: 1, value: c, kind: FK_Data_4
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; CHECK-NEXT: movl $260, %edx # encoding: [0xba,0x04,0x01,0x00,0x00]
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; CHECK-NEXT: # imm = 0x104
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; CHECK-NEXT: movl %ebx, %edi # encoding: [0x89,0xdf]
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; CHECK-NEXT: callq memcpy # encoding: [0xe8,A,A,A,A]
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; CHECK-NEXT: # fixup A - offset: 1, value: memcpy-4, kind: FK_PCRel_4
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; CHECK-NEXT: movl $32, %ecx # encoding: [0xb9,0x20,0x00,0x00,0x00]
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; CHECK-NEXT: movl %esp, %edi # encoding: [0x89,0xe7]
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; CHECK-NEXT: movl %ebx, %esi # encoding: [0x89,0xde]
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; CHECK-NEXT: rep;movsq (%esi), %es:(%edi) # encoding: [0xf3,0x67,0x48,0xa5]
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x67,0x8b,0x84,0x24,0x08,0x02,0x00,0x00]
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # encoding: [0x67,0x89,0x84,0x24,0x00,0x01,0x00,0x00]
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; CHECK-NEXT: callq d # encoding: [0xe8,A,A,A,A]
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; CHECK-NEXT: # fixup A - offset: 1, value: d-4, kind: FK_PCRel_4
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; CHECK-NEXT: addl $528, %esp # encoding: [0x81,0xc4,0x10,0x02,0x00,0x00]
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; CHECK-NEXT: # imm = 0x210
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; CHECK-NEXT: popq %rbx # encoding: [0x5b]
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; CHECK-NEXT: retq # encoding: [0xc3]
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entry:
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%byval-temp = alloca %struct.a, align 8
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%0 = bitcast %struct.a* %byval-temp to i8*
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 8 %0, i8* align 4 bitcast (%struct.a* @c to i8*), i32 260, i1 false)
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call void @d(%struct.a* byval nonnull align 8 %byval-temp)
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ret void
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}
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declare void @d(%struct.a* byval align 8) local_unnamed_addr #1
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
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