[SCEV] Try to re-use pointer LCSSA phis when expanding SCEVs. (#147824)
Generalize the code added in https://github.com/llvm/llvm-project/pull/147214 to also support re-using pointer LCSSA phis when expanding SCEVs with AddRecs. A common source of integer AddRecs with pointer bases are runtime checks emitted by LV based on the distance between 2 pointer AddRecs. This improves codegen in some cases when vectorizing and prevents regressions with https://github.com/llvm/llvm-project/pull/142309, which turns some phis into single-entry ones, which SCEV will look through now (and expand the whole AddRec), whereas before it would have to treat the LCSSA phi as SCEVUnknown. Compile-time impact neutral: https://llvm-compile-time-tracker.com/compare.php?from=fd5fc76c91538871771be2c3be2ca3a5f2dcac31&to=ca5fc2b3d8e6efc09f1624a17fdbfbe909f14eb4&stat=instructions:u PR: https://github.com/llvm/llvm-project/pull/147824
This commit is contained in:
Florian Hahn
GitHub
parent
e4963834e4
commit
e21ee41be4
@ -160,6 +160,12 @@ m_scev_ZExt(const Op0_t &Op0) {
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return m_scev_Unary<SCEVZeroExtendExpr>(Op0);
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}
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template <typename Op0_t>
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inline SCEVUnaryExpr_match<SCEVPtrToIntExpr, Op0_t>
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m_scev_PtrToInt(const Op0_t &Op0) {
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return SCEVUnaryExpr_match<SCEVPtrToIntExpr, Op0_t>(Op0);
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}
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/// Match a binary SCEV.
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template <typename SCEVTy, typename Op0_t, typename Op1_t>
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struct SCEVBinaryExpr_match {
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@ -18,6 +18,7 @@
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/Analysis/InstructionSimplify.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/ScalarEvolutionPatternMatch.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/DataLayout.h"
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@ -42,6 +43,7 @@ cl::opt<unsigned> llvm::SCEVCheapExpansionBudget(
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"controls the budget that is considered cheap (default = 4)"));
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using namespace PatternMatch;
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using namespace SCEVPatternMatch;
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PoisonFlags::PoisonFlags(const Instruction *I) {
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NUW = false;
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@ -1224,6 +1226,7 @@ Value *SCEVExpander::expandAddRecExprLiterally(const SCEVAddRecExpr *S) {
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}
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Value *SCEVExpander::tryToReuseLCSSAPhi(const SCEVAddRecExpr *S) {
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Type *STy = S->getType();
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const Loop *L = S->getLoop();
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BasicBlock *EB = L->getExitBlock();
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if (!EB || !EB->getSinglePredecessor() ||
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@ -1231,11 +1234,36 @@ Value *SCEVExpander::tryToReuseLCSSAPhi(const SCEVAddRecExpr *S) {
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return nullptr;
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for (auto &PN : EB->phis()) {
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if (!SE.isSCEVable(PN.getType()) || PN.getType() != S->getType())
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if (!SE.isSCEVable(PN.getType()))
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continue;
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auto *ExitV = SE.getSCEV(&PN);
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if (S == ExitV)
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return &PN;
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auto *ExitSCEV = SE.getSCEV(&PN);
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if (!isa<SCEVAddRecExpr>(ExitSCEV))
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continue;
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Type *PhiTy = PN.getType();
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if (STy->isIntegerTy() && PhiTy->isPointerTy())
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ExitSCEV = SE.getPtrToIntExpr(ExitSCEV, STy);
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else if (S->getType() != PN.getType())
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continue;
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// Check if we can re-use the existing PN, by adjusting it with an expanded
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// offset, if the offset is simpler.
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const SCEV *Diff = SE.getMinusSCEV(S, ExitSCEV);
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const SCEV *Op = Diff;
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match(Diff, m_scev_Mul(m_scev_AllOnes(), m_SCEV(Op)));
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match(Op, m_scev_PtrToInt(m_SCEV(Op)));
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if (!isa<SCEVConstant, SCEVUnknown>(Op))
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continue;
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assert(Diff->getType()->isIntegerTy() &&
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"difference must be of integer type");
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Value *DiffV = expand(Diff);
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Value *BaseV = &PN;
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if (PhiTy->isPointerTy()) {
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if (STy->isPointerTy())
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return Builder.CreatePtrAdd(BaseV, DiffV);
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BaseV = Builder.CreatePtrToInt(BaseV, DiffV->getType());
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}
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return Builder.CreateAdd(BaseV, DiffV);
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}
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return nullptr;
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@ -0,0 +1,98 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -p loop-idiom -S %s | FileCheck %s
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declare void @foo()
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declare void @bar()
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define void @scev_expand_ptrtoint(i8 %x, ptr %start) {
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; CHECK-LABEL: define void @scev_expand_ptrtoint(
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; CHECK-SAME: i8 [[X:%.*]], ptr [[START:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[START1:%.*]] = ptrtoint ptr [[START]] to i64
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; CHECK-NEXT: br label %[[LOOP_1_HEADER:.*]]
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; CHECK: [[LOOP_1_HEADER]]:
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; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1_LATCH:.*]] ]
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; CHECK-NEXT: [[C:%.*]] = icmp ule i8 [[X]], 1
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; CHECK-NEXT: br i1 [[C]], label %[[LOOP_1_LATCH]], label %[[MIDDLE:.*]]
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; CHECK: [[LOOP_1_LATCH]]:
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; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 1
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; CHECK-NEXT: br label %[[LOOP_1_HEADER]]
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; CHECK: [[MIDDLE]]:
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; CHECK-NEXT: [[PTR_IV_1_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1]], %[[LOOP_1_HEADER]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 0
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; CHECK-NEXT: [[CMP_EXT:%.*]] = zext i1 [[CMP]] to i64
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; CHECK-NEXT: [[GEP_START:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA]], i64 [[CMP_EXT]]
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; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]]
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; CHECK: [[LOOP_2_HEADER]]:
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; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_2_LATCH:.*]] ], [ 0, %[[MIDDLE]] ]
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; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[GEP_START]], %[[MIDDLE]] ], [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ]
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; CHECK-NEXT: switch i8 [[X]], label %[[LOOP_2_LATCH]] [
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; CHECK-NEXT: i8 1, label %[[LOOP_3_PREHEADER:.*]]
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; CHECK-NEXT: i8 4, label %[[LOOP_3_PREHEADER]]
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; CHECK-NEXT: ]
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; CHECK: [[LOOP_3_PREHEADER]]:
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; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_2_HEADER]] ], [ [[INDVAR]], %[[LOOP_2_HEADER]] ]
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; CHECK-NEXT: [[PTR_IV_2_LCSSA:%.*]] = phi ptr [ [[PTR_IV_2]], %[[LOOP_2_HEADER]] ], [ [[PTR_IV_2]], %[[LOOP_2_HEADER]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[START1]]
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; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR_IV_1_LCSSA]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP0]]
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; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[TMP2]], 1
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; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[CMP_EXT]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDVAR_LCSSA]], [[TMP4]]
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[START]], i64 [[TMP5]]
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; CHECK-NEXT: [[STRLEN:%.*]] = call i64 @strlen(ptr [[SCEVGEP]])
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; CHECK-NEXT: br label %[[LOOP_3:.*]]
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; CHECK: [[LOOP_2_LATCH]]:
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; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr i8, ptr [[PTR_IV_2]], i64 1
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; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
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; CHECK-NEXT: br label %[[LOOP_2_HEADER]]
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; CHECK: [[LOOP_3]]:
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; CHECK-NEXT: [[IV_3:%.*]] = phi i64 [ [[IV_3_NEXT:%.*]], %[[LOOP_3]] ], [ 1, %[[LOOP_3_PREHEADER]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_2_LCSSA]], i64 [[IV_3]]
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; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[GEP]], align 1
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i8 [[TMP6]], 0
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; CHECK-NEXT: [[IV_3_NEXT]] = add i64 [[IV_3]], 1
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_3]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.1.header
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loop.1.header:
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%ptr.iv.1 = phi ptr [ %start, %entry ], [ %ptr.iv.1.next, %loop.1.latch ]
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%c = icmp ule i8 %x, 1
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br i1 %c, label %loop.1.latch, label %middle
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loop.1.latch:
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%ptr.iv.1.next = getelementptr i8, ptr %ptr.iv.1, i64 1
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br label %loop.1.header
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middle:
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%cmp = icmp eq i8 %x, 0
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%cmp.ext = zext i1 %cmp to i64
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%gep.start = getelementptr i8, ptr %ptr.iv.1, i64 %cmp.ext
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br label %loop.2.header
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loop.2.header:
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%ptr.iv.2 = phi ptr [ %gep.start, %middle ], [ %ptr.iv.2.next, %loop.2.latch ]
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switch i8 %x, label %loop.2.latch [
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i8 1, label %loop.3
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i8 4, label %loop.3
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]
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loop.2.latch:
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%ptr.iv.2.next = getelementptr i8, ptr %ptr.iv.2, i64 1
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br label %loop.2.header
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loop.3:
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%iv.3 = phi i64 [ 1, %loop.2.header ], [ 1, %loop.2.header ], [ %iv.3.next, %loop.3 ]
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%gep = getelementptr i8, ptr %ptr.iv.2, i64 %iv.3
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%1 = load i8, ptr %gep, align 1
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%ec = icmp eq i8 %1, 0
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%iv.3.next = add i64 %iv.3, 1
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br i1 %ec, label %exit, label %loop.3
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exit:
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ret void
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}
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@ -59,19 +59,14 @@ define void @test(ptr %arg, i64 %arg1) {
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; CHECK-NEXT: [[GEP_5:%.*]] = getelementptr inbounds double, ptr [[LCSSA_PTR_IV_1]], i64 1
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; CHECK-NEXT: br label [[INNER_2:%.*]]
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; CHECK: inner.2:
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; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[INNER_2]] ], [ 0, [[INNER_1_EXIT]] ]
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; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[GEP_5]], [[INNER_1_EXIT]] ], [ [[PTR_IV_2_NEXT:%.*]], [[INNER_2]] ]
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; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr inbounds double, ptr [[PTR_IV_2]], i64 1
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; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
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; CHECK-NEXT: br i1 false, label [[INNER_3_LVER_CHECK:%.*]], label [[INNER_2]]
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; CHECK: inner.3.lver.check:
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; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], [[INNER_2]] ]
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; CHECK-NEXT: [[LCSSA_PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2]], [[INNER_2]] ]
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; CHECK-NEXT: [[GEP_6:%.*]] = getelementptr inbounds double, ptr [[PTR_PHI]], i64 1
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; CHECK-NEXT: [[GEP_7:%.*]] = getelementptr inbounds double, ptr [[LCSSA_PTR_IV_2]], i64 1
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; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[INDVAR_LCSSA]], 3
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; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], 24
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; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[LCSSA_PTR_IV_1]], i64 [[TMP1]]
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; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[LCSSA_PTR_IV_2]], i64 16
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[GEP_7]], [[GEP_1]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[PTR_PHI]], [[SCEVGEP3]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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@ -104,7 +99,7 @@ define void @test(ptr %arg, i64 %arg1) {
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; CHECK-NEXT: br i1 [[C_2]], label [[OUTER_LATCH_LOOPEXIT4:%.*]], label [[INNER_3]]
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; CHECK: outer.latch.loopexit:
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; CHECK-NEXT: br label [[OUTER_LATCH]]
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; CHECK: outer.latch.loopexit4:
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; CHECK: outer.latch.loopexit3:
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; CHECK-NEXT: br label [[OUTER_LATCH]]
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; CHECK: outer.latch:
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; CHECK-NEXT: br label [[INNER_1_LVER_CHECK]]
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@ -104,27 +104,23 @@ define void @runtime_checks_ptr_inductions(ptr %dst.1, ptr %dst.2, i1 %c) {
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; CHECK-LABEL: define void @runtime_checks_ptr_inductions(
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; CHECK-SAME: ptr [[DST_1:%.*]], ptr [[DST_2:%.*]], i1 [[C:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[DST_11:%.*]] = ptrtoint ptr [[DST_1]] to i64
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; CHECK-NEXT: br label %[[LOOP_1:.*]]
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; CHECK: [[LOOP_1]]:
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; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_1]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[DST_1]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[CALL:%.*]] = call i32 @val()
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; CHECK-NEXT: [[SEL_DST:%.*]] = select i1 [[C]], ptr [[DST_1]], ptr [[DST_2]]
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; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 1
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; CHECK-NEXT: [[EC_1:%.*]] = icmp eq i32 [[CALL]], 0
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; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
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; CHECK-NEXT: br i1 [[EC_1]], label %[[LOOP_2_HEADER_PREHEADER:.*]], label %[[LOOP_1]]
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; CHECK: [[LOOP_2_HEADER_PREHEADER]]:
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; CHECK-NEXT: [[SEL_DST_LCSSA2:%.*]] = phi ptr [ [[SEL_DST]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[SEL_DST_LCSSA1:%.*]] = phi ptr [ [[SEL_DST]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[PTR_IV_1_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[SEL_DST_LCSSA:%.*]] = phi ptr [ [[SEL_DST]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[SEL_DST_LCSSA23:%.*]] = ptrtoint ptr [[SEL_DST_LCSSA2]] to i64
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; CHECK-NEXT: [[SEL_DST_LCSSA12:%.*]] = ptrtoint ptr [[SEL_DST_LCSSA1]] to i64
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
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; CHECK: [[VECTOR_MEMCHECK]]:
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDVAR_LCSSA]], [[DST_11]]
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; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[SEL_DST_LCSSA23]]
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; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[PTR_IV_1_LCSSA]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[SEL_DST_LCSSA12]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP1]], 2
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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@ -146,13 +142,13 @@ define void @runtime_checks_ptr_inductions(ptr %dst.1, ptr %dst.2, i1 %c) {
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; CHECK-NEXT: br label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1023, %[[MIDDLE_BLOCK]] ], [ 1, %[[LOOP_2_HEADER_PREHEADER]] ], [ 1, %[[VECTOR_MEMCHECK]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL5:%.*]] = phi ptr [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[PTR_IV_1_LCSSA]], %[[VECTOR_MEMCHECK]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[SEL_DST_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[SEL_DST_LCSSA]], %[[VECTOR_MEMCHECK]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[PTR_IV_1_LCSSA]], %[[VECTOR_MEMCHECK]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL5:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[SEL_DST_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[SEL_DST_LCSSA]], %[[VECTOR_MEMCHECK]] ]
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; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]]
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; CHECK: [[LOOP_2_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[DEC7:%.*]], %[[LOOP_2_LATCH:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[PTR_IV_3:%.*]] = phi ptr [ [[PTR_IV_3_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL6]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[PTR_IV_3:%.*]] = phi ptr [ [[PTR_IV_3_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i32 [[IV]], 1024
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; CHECK-NEXT: br i1 [[EC_2]], label %[[EXIT:.*]], label %[[LOOP_2_LATCH]]
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; CHECK: [[LOOP_2_LATCH]]:
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@ -213,10 +209,8 @@ define void @expand_diff_scev_unknown(ptr %dst, i1 %invar.c, i32 %step) mustprog
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; CHECK-NEXT: br i1 [[INVAR_C]], label %[[LOOP_2_PREHEADER:.*]], label %[[LOOP_1]]
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; CHECK: [[LOOP_2_PREHEADER]]:
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; CHECK-NEXT: [[INDVAR_LCSSA1:%.*]] = phi i32 [ [[INDVAR]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i32 [ [[INDVAR]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[IV_1_LCSSA:%.*]] = phi i32 [ [[IV_1]], %[[LOOP_1]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = shl i32 [[STEP]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDVAR_LCSSA]], [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[IV_1_LCSSA]], [[STEP]]
|
||||
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STEP]], -2
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[INDVAR_LCSSA1]], -1
|
||||
@ -289,53 +283,43 @@ define void @expand_diff_neg_ptrtoint_expr(ptr %src, ptr %start) {
|
||||
; CHECK-SAME: ptr [[SRC:%.*]], ptr [[START:%.*]]) {
|
||||
; CHECK-NEXT: [[ENTRY:.*]]:
|
||||
; CHECK-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC]] to i64
|
||||
; CHECK-NEXT: [[START1:%.*]] = ptrtoint ptr [[START]] to i64
|
||||
; CHECK-NEXT: br label %[[LOOP_1:.*]]
|
||||
; CHECK: [[LOOP_1]]:
|
||||
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_1]] ], [ 0, %[[ENTRY]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_1]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 8
|
||||
; CHECK-NEXT: call void @foo()
|
||||
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
|
||||
; CHECK-NEXT: [[EC_1:%.*]] = icmp eq i64 [[IV_NEXT]], 32
|
||||
; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
|
||||
; CHECK-NEXT: br i1 [[EC_1]], label %[[LOOP_2_PREHEADER:.*]], label %[[LOOP_1]]
|
||||
; CHECK: [[LOOP_2_PREHEADER]]:
|
||||
; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_1]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_1_NEXT_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1_NEXT]], %[[LOOP_1]] ]
|
||||
; CHECK-NEXT: br label %[[LOOP_2:.*]]
|
||||
; CHECK: [[LOOP_2]]:
|
||||
; CHECK-NEXT: [[INDVAR3:%.*]] = phi i64 [ 0, %[[LOOP_2_PREHEADER]] ], [ [[INDVAR_NEXT4:%.*]], %[[LOOP_2]] ]
|
||||
; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ [[IV_NEXT_1:%.*]], %[[LOOP_2]] ], [ 1, %[[LOOP_2_PREHEADER]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[LOOP_2_PREHEADER]] ]
|
||||
; CHECK-NEXT: call void @bar()
|
||||
; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr i8, ptr [[PTR_IV_2]], i64 8
|
||||
; CHECK-NEXT: [[IV_NEXT_1]] = add i64 [[IV_1]], 1
|
||||
; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i64 [[IV_NEXT_1]], 32
|
||||
; CHECK-NEXT: [[INDVAR_NEXT4]] = add i64 [[INDVAR3]], 1
|
||||
; CHECK-NEXT: br i1 [[EC_2]], label %[[LOOP_3_PREHEADER:.*]], label %[[LOOP_2]]
|
||||
; CHECK: [[LOOP_3_PREHEADER]]:
|
||||
; CHECK-NEXT: [[INDVAR3_LCSSA:%.*]] = phi i64 [ [[INDVAR3]], %[[LOOP_2]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_2_NEXT_LCSSA:%.*]] = phi ptr [ [[PTR_IV_2_NEXT]], %[[LOOP_2]] ]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = phi ptr [ [[PTR_IV_2_NEXT]], %[[LOOP_2]] ]
|
||||
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
|
||||
; CHECK: [[VECTOR_MEMCHECK]]:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[START1]], 16
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[SRC2]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[INDVAR_LCSSA]], 3
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[INDVAR3_LCSSA]], 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], [[TMP3]]
|
||||
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP5]], 16
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[SRC2]]
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP1]] to i64
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP5]], [[TMP0]]
|
||||
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], 16
|
||||
; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
|
||||
; CHECK: [[VECTOR_PH]]:
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[PTR_IV_2_NEXT_LCSSA]], i64 -16
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP1]], i64 -16
|
||||
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
|
||||
; CHECK: [[VECTOR_BODY]]:
|
||||
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
|
||||
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
|
||||
; CHECK-NEXT: [[OFFSET_IDX5:%.*]] = mul i64 [[INDEX]], 8
|
||||
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_2_NEXT_LCSSA]], i64 [[OFFSET_IDX5]]
|
||||
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[TMP1]], i64 [[OFFSET_IDX5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], -1
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[TMP8]], i32 0
|
||||
@ -349,11 +333,11 @@ define void @expand_diff_neg_ptrtoint_expr(ptr %src, ptr %start) {
|
||||
; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
|
||||
; CHECK: [[SCALAR_PH]]:
|
||||
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ -1, %[[MIDDLE_BLOCK]] ], [ 1, %[[LOOP_3_PREHEADER]] ], [ 1, %[[VECTOR_MEMCHECK]] ]
|
||||
; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_2_NEXT_LCSSA]], %[[LOOP_3_PREHEADER]] ], [ [[PTR_IV_2_NEXT_LCSSA]], %[[VECTOR_MEMCHECK]] ]
|
||||
; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[TMP1]], %[[LOOP_3_PREHEADER]] ], [ [[TMP1]], %[[VECTOR_MEMCHECK]] ]
|
||||
; CHECK-NEXT: br label %[[LOOP_3:.*]]
|
||||
; CHECK: [[LOOP_3]]:
|
||||
; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ [[IV_NEXT_2:%.*]], %[[LOOP_3]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_3:%.*]] = phi ptr [ [[PTR_IV_3_NEXT:%.*]], %[[LOOP_3]] ], [ [[BC_RESUME_VAL6]], %[[SCALAR_PH]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_3:%.*]] = phi ptr [ [[PTR_IV_3_NEXT:%.*]], %[[LOOP_3]] ], [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ]
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[IV_2]], -1
|
||||
; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP12]]
|
||||
; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP_SRC]], align 8
|
||||
|
||||
@ -56,19 +56,14 @@ define void @test(ptr %arg, i64 %arg1) {
|
||||
; CHECK-NEXT: [[GEP_5:%.*]] = getelementptr inbounds double, ptr [[LCSSA_PTR_IV_1]], i64 1
|
||||
; CHECK-NEXT: br label [[INNER_2:%.*]]
|
||||
; CHECK: inner.2:
|
||||
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[INNER_2]] ], [ 0, [[INNER_1_EXIT]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[GEP_5]], [[INNER_1_EXIT]] ], [ [[PTR_IV_2_NEXT:%.*]], [[INNER_2]] ]
|
||||
; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr inbounds double, ptr [[PTR_IV_2]], i64 1
|
||||
; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
|
||||
; CHECK-NEXT: br i1 false, label [[INNER_3_LVER_CHECK:%.*]], label [[INNER_2]]
|
||||
; CHECK: inner.3.lver.check:
|
||||
; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], [[INNER_2]] ]
|
||||
; CHECK-NEXT: [[LCSSA_PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2]], [[INNER_2]] ]
|
||||
; CHECK-NEXT: [[GEP_6:%.*]] = getelementptr inbounds double, ptr [[PTR_PHI]], i64 1
|
||||
; CHECK-NEXT: [[GEP_7:%.*]] = getelementptr inbounds double, ptr [[LCSSA_PTR_IV_2]], i64 1
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[INDVAR_LCSSA]], 3
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], 24
|
||||
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[LCSSA_PTR_IV_1]], i64 [[TMP1]]
|
||||
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[LCSSA_PTR_IV_2]], i64 16
|
||||
; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[GEP_7]], [[GEP_1]]
|
||||
; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[PTR_PHI]], [[SCEVGEP]]
|
||||
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
|
||||
@ -90,10 +85,10 @@ define void @test(ptr %arg, i64 %arg1) {
|
||||
; CHECK: inner.3:
|
||||
; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ 0, [[INNER_3_PH]] ], [ [[IV_2_NEXT:%.*]], [[INNER_3]] ]
|
||||
; CHECK-NEXT: [[GEP_8:%.*]] = getelementptr inbounds double, ptr [[GEP_6]], i64 [[IV_2]]
|
||||
; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP_7]], align 8, !alias.scope !0, !noalias !3
|
||||
; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP_8]], align 8, !alias.scope !3
|
||||
; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP_7]], align 8, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]]
|
||||
; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP_8]], align 8, !alias.scope [[META3]]
|
||||
; CHECK-NEXT: [[GEP_9:%.*]] = getelementptr double, ptr [[PTR_PHI]], i64 [[IV_2]]
|
||||
; CHECK-NEXT: [[TMP18:%.*]] = load double, ptr [[GEP_9]], align 8, !alias.scope !3
|
||||
; CHECK-NEXT: [[TMP18:%.*]] = load double, ptr [[GEP_9]], align 8, !alias.scope [[META3]]
|
||||
; CHECK-NEXT: [[IV_2_NEXT]] = add nuw nsw i64 [[IV_2]], 1
|
||||
; CHECK-NEXT: [[C_2:%.*]] = icmp eq i64 [[IV_2]], 1
|
||||
; CHECK-NEXT: br i1 [[C_2]], label [[OUTER_LATCH_LOOPEXIT3:%.*]], label [[INNER_3]]
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user