[BOLT][AArch64] Fix symbolization of unoptimized TLS access (#134332)
TLS relocations may not have a valid BOLT symbol associated with them. While symbolizing the operand, we were checking for the symbol value, and since there was no symbol the check resulted in a crash. Handle TLS case while performing operand symbolization on AArch64.
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@ -2827,9 +2827,10 @@ void RewriteInstance::handleRelocation(const SectionRef &RelocatedSection,
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if (SymbolAddress == 0)
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ReferencedSymbol = BC->registerNameAtAddress(SymbolName, 0, 0, 0);
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LLVM_DEBUG(dbgs() << "BOLT-DEBUG: forcing relocation against symbol "
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<< ReferencedSymbol->getName() << " with addend "
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<< Addend << '\n');
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LLVM_DEBUG(
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dbgs() << "BOLT-DEBUG: forcing relocation against symbol "
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<< (ReferencedSymbol ? ReferencedSymbol->getName() : "<none>")
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<< " with addend " << Addend << '\n');
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} else if (ReferencedBF) {
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ReferencedSymbol = ReferencedBF->getSymbol();
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uint64_t RefFunctionOffset = 0;
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@ -119,26 +119,39 @@ AArch64MCSymbolizer::adjustRelocation(const Relocation &Rel,
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// The ADRP+LDR sequence was converted into ADRP+ADD. We are looking at the
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// second instruction and have to use the relocation type for ADD.
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AdjustedRel.Type = ELF::R_AARCH64_ADD_ABS_LO12_NC;
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} else {
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// For instructions that reference GOT, ignore the referenced symbol and
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// use value at the relocation site. FixRelaxationPass will look at
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// instruction pairs and will perform necessary adjustments.
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return AdjustedRel;
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}
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// ADRP is a special case since the linker can leave the instruction opcode
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// intact and modify only the operand. We are doing our best to detect when
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// such conversion has happened without looking at the next instruction.
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//
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// If we detect that a page referenced by the ADRP cannot belong to GOT, and
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// that it matches the symbol from the relocation, then we can be certain
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// that the linker converted the GOT reference into the local one. Otherwise,
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// we leave the disambiguation resolution to FixRelaxationPass.
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//
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// Note that ADRP relaxation described above cannot happen for TLS relocation.
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// Since TLS relocations may not even have a valid symbol (not supported by
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// BOLT), we explicitly exclude them from the check.
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if (BC.MIB->isADRP(Inst) && Rel.Addend == 0 && !Relocation::isTLS(Rel.Type)) {
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ErrorOr<uint64_t> SymbolValue = BC.getSymbolValue(*Rel.Symbol);
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assert(SymbolValue && "Symbol value should be set");
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const uint64_t SymbolPageAddr = *SymbolValue & ~0xfffULL;
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// Check if defined symbol and GOT are on the same page. If they are not,
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// disambiguate the operand.
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if (BC.MIB->isADRP(Inst) && Rel.Addend == 0 &&
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SymbolPageAddr == Rel.Value &&
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if (SymbolPageAddr == Rel.Value &&
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!isPageAddressValidForGOT(SymbolPageAddr)) {
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AdjustedRel.Type = ELF::R_AARCH64_ADR_PREL_PG_HI21;
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} else {
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AdjustedRel.Symbol = BC.registerNameAtAddress("__BOLT_got_zero", 0, 0, 0);
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AdjustedRel.Addend = Rel.Value;
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return AdjustedRel;
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}
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}
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// For instructions that reference GOT, ignore the referenced symbol and
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// use value at the relocation site. FixRelaxationPass will look at
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// instruction pairs and will perform necessary adjustments.
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AdjustedRel.Symbol = BC.registerNameAtAddress("__BOLT_got_zero", 0, 0, 0);
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AdjustedRel.Addend = Rel.Value;
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return AdjustedRel;
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}
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@ -34,3 +34,11 @@ int main() {
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// RUN: -target aarch64-linux -fuse-ld=lld \
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// RUN: -nostdlib
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// RUN: llvm-bolt %t_pie.exe -o %t.bolt
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// RUN: %clang %cflags -fPIC -shared %s -o %t.so -Wl,-q -fuse-ld=lld
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// RUN: llvm-objdump -d -r --disassemble-symbols=main %t.so | FileCheck %s
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// RUN: llvm-bolt %t.so -o %t.bolt.so
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// Verify that unoptimized TLS access was generated for shared object.
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// CHECK: adrp x0
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// CHECK-NEXT: R_AARCH64_TLSDESC_ADR_PAGE21 tbssstruct
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