[CIR] Upstream FPToFPBuiltin ASinOp (#157350)

Upstream support for FPToFPBuiltin ASinOp

clang/include/clang/CIR/Dialect/IR/CIROps.td

@@ -3827,6 +3827,16 @@ def CIR_ACosOp : CIR_UnaryFPToFPBuiltinOp<"acos", "ACosOp"> {
   }];
 }
 
+def CIR_ASinOp : CIR_UnaryFPToFPBuiltinOp<"asin", "ASinOp"> {
+  let summary = "Computes the arcus sine of the specified value";
+  let description = [{
+    `cir.asin`computes the arcus sine of a given value and
+    returns a result of the same type.
+
+    Floating-point exceptions are ignored, and it does not set `errno`.
+  }];
+}
+
 def CIR_FAbsOp : CIR_UnaryFPToFPBuiltinOp<"fabs", "FAbsOp"> {
   let summary = "Computes the floating-point absolute value";
   let description = [{

clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp

@@ -411,6 +411,8 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
 
   case Builtin::BI__builtin_elementwise_acos:
     return emitUnaryFPBuiltin<cir::ACosOp>(*this, *e);
+  case Builtin::BI__builtin_elementwise_asin:
+    return emitUnaryFPBuiltin<cir::ASinOp>(*this, *e);
   }
 
   // If this is an alias for a lib function (e.g. __builtin_sin), emit

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

@@ -598,6 +598,14 @@ mlir::LogicalResult CIRToLLVMACosOpLowering::matchAndRewrite(
   return mlir::success();
 }
 
+mlir::LogicalResult CIRToLLVMASinOpLowering::matchAndRewrite(
+    cir::ASinOp op, OpAdaptor adaptor,
+    mlir::ConversionPatternRewriter &rewriter) const {
+  mlir::Type resTy = typeConverter->convertType(op.getType());
+  rewriter.replaceOpWithNewOp<mlir::LLVM::ASinOp>(op, resTy, adaptor.getSrc());
+  return mlir::success();
+}
+
 mlir::LogicalResult CIRToLLVMAssumeOpLowering::matchAndRewrite(
     cir::AssumeOp op, OpAdaptor adaptor,
     mlir::ConversionPatternRewriter &rewriter) const {
@@ -2454,6 +2462,7 @@ void ConvertCIRToLLVMPass::runOnOperation() {
   patterns.add<
       // clang-format off
                CIRToLLVMACosOpLowering,
+               CIRToLLVMASinOpLowering,
                CIRToLLVMAssumeOpLowering,
                CIRToLLVMAssumeAlignedOpLowering,
                CIRToLLVMAssumeSepStorageOpLowering,

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h

@@ -746,6 +746,15 @@ public:
                   mlir::ConversionPatternRewriter &) const override;
 };
 
+class CIRToLLVMASinOpLowering : public mlir::OpConversionPattern<cir::ASinOp> {
+public:
+  using mlir::OpConversionPattern<cir::ASinOp>::OpConversionPattern;
+
+  mlir::LogicalResult
+  matchAndRewrite(cir::ASinOp op, OpAdaptor,
+                  mlir::ConversionPatternRewriter &) const override;
+};
+
 class CIRToLLVMInlineAsmOpLowering
     : public mlir::OpConversionPattern<cir::InlineAsmOp> {
   mlir::DataLayout const &dataLayout;

clang/test/CIR/CodeGen/builtins-elementwise.c

@@ -36,3 +36,29 @@ void test_builtin_elementwise_acos(float f, double d, vfloat4 vf4,
   vd4 = __builtin_elementwise_acos(vd4);
 }
 
+void test_builtin_elementwise_asin(float f, double d, vfloat4 vf4,
+  vdouble4  vd4) {
+  // CIR-LABEL: test_builtin_elementwise_asin
+  // LLVM-LABEL: test_builtin_elementwise_asin
+  // OGCG-LABEL: test_builtin_elementwise_asin
+
+  // CIR: %{{.*}} = cir.asin %{{.*}} : !cir.float
+  // LLVM: %{{.*}} = call float @llvm.asin.f32(float %{{.*}})
+  // OGCG: %{{.*}} = call float @llvm.asin.f32(float %{{.*}})
+  f = __builtin_elementwise_asin(f);
+
+  // CIR: %{{.*}} = cir.asin %{{.*}} : !cir.double
+  // LLVM: %{{.*}} = call double @llvm.asin.f64(double %{{.*}})
+  // OGCG: %{{.*}} = call double @llvm.asin.f64(double %{{.*}})
+  d = __builtin_elementwise_asin(d);
+
+  // CIR: %{{.*}} = cir.asin %{{.*}} : !cir.vector<4 x !cir.float>
+  // LLVM: %{{.*}} = call <4 x float> @llvm.asin.v4f32(<4 x float> %{{.*}})
+  // OGCG: %{{.*}} = call <4 x float> @llvm.asin.v4f32(<4 x float> %{{.*}})
+  vf4 = __builtin_elementwise_asin(vf4);
+
+  // CIR: %{{.*}} = cir.asin %{{.*}} : !cir.vector<4 x !cir.double>
+  // LLVM: %{{.*}} = call <4 x double> @llvm.asin.v4f64(<4 x double> %{{.*}})
+  // OGCG: %{{.*}} = call <4 x double> @llvm.asin.v4f64(<4 x double> %{{.*}})
+  vd4 = __builtin_elementwise_asin(vd4);
+}