diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll index 586b7d116f5c..00016a6a7fff 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll @@ -78,7 +78,7 @@ declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 ; Test materialization of integers. Target-independent selector handles this. define i32 @t2() { entry: -; CHECK-LABEL: t2 +; CHECK-LABEL: t2: ; CHECK: mov x0, xzr ; CHECK: mov w1, #-8 ; CHECK: mov [[REG2:w[0-9]+]], #1023 @@ -99,6 +99,7 @@ declare i32 @func2(i64 zeroext, i32 signext, i16 zeroext, i8 signext, i1 zeroext declare void @callee_b0f(i8 %bp10, i8 %bp11, i8 %bp12, i8 %bp13, i8 %bp14, i8 %bp15, i8 %bp17, i8 %bp18, i8 %bp19) define void @caller_b1f() { entry: +; CHECK-LABEL: caller_b1f ; CHECK-BE-LABEL: caller_b1f ; CHECK-BE: strb w{{.*}}, [sp, #7] call void @callee_b0f(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 42) diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll index 7dc849b7d2c4..6d402c95ee3f 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll @@ -2,7 +2,7 @@ define void @t0(i32 %a) nounwind { entry: -; CHECK: t0 +; CHECK-LABEL: t0: ; CHECK: str {{w[0-9]+}}, [sp, #12] ; CHECK-NEXT: ldr [[REGISTER:w[0-9]+]], [sp, #12] ; CHECK-NEXT: str [[REGISTER]], [sp, #12] @@ -15,7 +15,7 @@ entry: } define void @t1(i64 %a) nounwind { -; CHECK: t1 +; CHECK-LABEL: t1: ; CHECK: str {{x[0-9]+}}, [sp, #8] ; CHECK-NEXT: ldr [[REGISTER:x[0-9]+]], [sp, #8] ; CHECK-NEXT: str [[REGISTER]], [sp, #8] @@ -29,7 +29,7 @@ define void @t1(i64 %a) nounwind { define zeroext i1 @i1(i1 %a) nounwind { entry: -; CHECK: @i1 +; CHECK-LABEL: i1: ; CHECK: and [[REG:w[0-9]+]], w0, #0x1 ; CHECK: strb [[REG]], [sp, #15] ; CHECK: ldrb [[REG1:w[0-9]+]], [sp, #15] @@ -84,7 +84,7 @@ entry: } define void @t6() nounwind { -; CHECK: t6 +; CHECK-LABEL: t6: ; CHECK: brk #0x1 tail call void @llvm.trap() ret void diff --git a/llvm/test/CodeGen/AArch64/elf-globals-static.ll b/llvm/test/CodeGen/AArch64/elf-globals-static.ll index 928ec70af0b1..393f42049011 100644 --- a/llvm/test/CodeGen/AArch64/elf-globals-static.ll +++ b/llvm/test/CodeGen/AArch64/elf-globals-static.ll @@ -15,6 +15,7 @@ define i8 @test_i8(i8 %new) { ; CHECK: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8] ; CHECK: strb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8] +; CHECK-FAST-LABEL: test_i8: ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var8 ; CHECK-FAST: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8] } @@ -28,6 +29,7 @@ define i16 @test_i16(i16 %new) { ; CHECK: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16] ; CHECK: strh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16] +; CHECK-FAST-LABEL: test_i16: ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var16 ; CHECK-FAST: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16] } @@ -41,6 +43,7 @@ define i32 @test_i32(i32 %new) { ; CHECK: ldr {{w[0-9]+}}, [x[[HIREG]], :lo12:var32] ; CHECK: str {{w[0-9]+}}, [x[[HIREG]], :lo12:var32] +; CHECK-FAST-LABEL: test_i32: ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var32 ; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var32 } @@ -54,6 +57,7 @@ define i64 @test_i64(i64 %new) { ; CHECK: ldr {{x[0-9]+}}, [x[[HIREG]], :lo12:var64] ; CHECK: str {{x[0-9]+}}, [x[[HIREG]], :lo12:var64] +; CHECK-FAST-LABEL: test_i64: ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var64 ; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var64 } @@ -64,6 +68,7 @@ define i64* @test_addr() { ; CHECK: adrp [[HIREG:x[0-9]+]], var64 ; CHECK: add x0, [[HIREG]], :lo12:var64 +; CHECK-FAST-LABEL: test_addr: ; CHECK-FAST: adrp [[HIREG:x[0-9]+]], var64 ; CHECK-FAST: add x0, [[HIREG]], :lo12:var64 } diff --git a/llvm/test/CodeGen/ARM/fast-isel-call.ll b/llvm/test/CodeGen/ARM/fast-isel-call.ll index 991db29efe78..c126343d8123 100644 --- a/llvm/test/CodeGen/ARM/fast-isel-call.ll +++ b/llvm/test/CodeGen/ARM/fast-isel-call.ll @@ -38,8 +38,8 @@ define i32 @t4(i16 zeroext %a) nounwind { } define void @foo(i8 %a, i16 %b) nounwind { -; ARM: foo -; THUMB: foo +; ARM-LABEL: foo: +; THUMB-LABEL: foo: ;; Materialize i1 1 ; ARM: movw [[REG0:r[0-9]+]], #1 ; THUMB: movs [[REG0:r[0-9]+]], #1 @@ -87,7 +87,7 @@ declare zeroext i1 @t9(); define i32 @t10() { entry: -; ARM: @t10 +; ARM-LABEL: @t10 ; ARM-DAG: movw [[R0:l?r[0-9]*]], #0 ; ARM-DAG: movw [[R1:l?r[0-9]*]], #248 ; ARM-DAG: movw [[R2:l?r[0-9]*]], #187 @@ -114,7 +114,7 @@ entry: ; ARM-LONG-ELF: ldr [[R:r[0-9]+]], {{\[}}[[R1]]] ; ARM-LONG: blx [[R]] -; THUMB: @t10 +; THUMB-LABEL: @t10 ; THUMB-DAG: movs [[R0:l?r[0-9]*]], #0 ; THUMB-DAG: movs [[R1:l?r[0-9]*]], #248 ; THUMB-DAG: movs [[R2:l?r[0-9]*]], #187 @@ -146,7 +146,7 @@ define i32 @bar0(i32 %i) nounwind { } define void @foo3() uwtable { -; ARM: @foo3 +; ARM-LABEL: @foo3 ; ARM: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr r[0-9]+, .LCPI)}} ; ARM: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} ; ARM: movw {{r[0-9]+}}, #0 @@ -164,9 +164,9 @@ define void @foo3() uwtable { define i32 @LibCall(i32 %a, i32 %b) { entry: -; ARM: LibCall +; ARM-LABEL: LibCall: ; ARM: bl {{___udivsi3|__aeabi_uidiv}} -; ARM-LONG-LABEL: LibCall +; ARM-LONG-LABEL: LibCall: ; ARM-LONG-MACHO: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}} ; ARM-LONG-MACHO: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} @@ -176,7 +176,7 @@ entry: ; ARM-LONG-ELF: movt r2, :upper16:__aeabi_uidiv ; ARM-LONG: blx r2 -; THUMB: LibCall +; THUMB-LABEL: LibCall: ; THUMB: bl {{___udivsi3|__aeabi_uidiv}} ; THUMB-LONG-LABEL: LibCall ; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}} @@ -191,9 +191,9 @@ entry: define fastcc void @fast_callee(float %i) ssp { entry: -; ARM: fast_callee +; ARM-LABEL: fast_callee: ; ARM: vmov r0, s0 -; THUMB: fast_callee +; THUMB-LABEL: fast_callee: ; THUMB: vmov r0, s0 ; ARM-NOVFP: fast_callee ; ARM-NOVFP-NOT: s0 @@ -205,14 +205,14 @@ entry: define void @fast_caller() ssp { entry: -; ARM: fast_caller +; ARM-LABEL: fast_caller: ; ARM: vldr s0, -; THUMB: fast_caller +; THUMB-LABEL: fast_caller: ; THUMB: vldr s0, -; ARM-NOVFP: fast_caller +; ARM-NOVFP-LABEL: fast_caller: ; ARM-NOVFP: movw r0, #13107 ; ARM-NOVFP: movt r0, #16611 -; THUMB-NOVFP: fast_caller +; THUMB-NOVFP-LABEL: fast_caller: ; THUMB-NOVFP: movw r0, #13107 ; THUMB-NOVFP: movt r0, #16611 call fastcc void @fast_callee(float 0x401C666660000000) @@ -221,13 +221,13 @@ entry: define void @no_fast_callee(float %i) ssp { entry: -; ARM: no_fast_callee +; ARM-LABEL: no_fast_callee: ; ARM: vmov s0, r0 -; THUMB: no_fast_callee +; THUMB-LABEL: no_fast_callee: ; THUMB: vmov s0, r0 -; ARM-NOVFP: no_fast_callee +; ARM-NOVFP-LABEL: no_fast_callee: ; ARM-NOVFP-NOT: s0 -; THUMB-NOVFP: no_fast_callee +; THUMB-NOVFP-LABEL: no_fast_callee: ; THUMB-NOVFP-NOT: s0 call void @print(float %i) ret void @@ -235,14 +235,14 @@ entry: define void @no_fast_caller() ssp { entry: -; ARM: no_fast_caller +; ARM-LABEL: no_fast_caller: ; ARM: vmov r0, s0 -; THUMB: no_fast_caller +; THUMB-LABEL: no_fast_caller: ; THUMB: vmov r0, s0 -; ARM-NOVFP: no_fast_caller +; ARM-NOVFP-LABEL: no_fast_caller: ; ARM-NOVFP: movw r0, #13107 ; ARM-NOVFP: movt r0, #16611 -; THUMB-NOVFP: no_fast_caller +; THUMB-NOVFP-LABEL: no_fast_caller: ; THUMB-NOVFP: movw r0, #13107 ; THUMB-NOVFP: movt r0, #16611 call void @no_fast_callee(float 0x401C666660000000) @@ -252,7 +252,7 @@ entry: declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) define void @call_undef_args() { -; ARM-LABEL: call_undef_args +; ARM-LABEL: call_undef_args: ; ARM: movw r0, #1 ; ARM-NEXT: movw r1, #2 ; ARM-NEXT: movw r2, #3 diff --git a/llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll b/llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll index f49c907c4145..1e0f144583bf 100644 --- a/llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll +++ b/llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll @@ -4,7 +4,7 @@ define zeroext i16 @t1(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t1 +; ARM-LABEL: t1: %add.ptr = getelementptr inbounds i16, i16* %a, i64 -8 %0 = load i16, i16* %add.ptr, align 2 ; ARM: ldrh r0, [r0, #-16] @@ -13,7 +13,7 @@ entry: define zeroext i16 @t2(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t2 +; ARM-LABEL: t2: %add.ptr = getelementptr inbounds i16, i16* %a, i64 -16 %0 = load i16, i16* %add.ptr, align 2 ; ARM: ldrh r0, [r0, #-32] @@ -22,7 +22,7 @@ entry: define zeroext i16 @t3(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t3 +; ARM-LABEL: t3: %add.ptr = getelementptr inbounds i16, i16* %a, i64 -127 %0 = load i16, i16* %add.ptr, align 2 ; ARM: ldrh r0, [r0, #-254] @@ -31,7 +31,7 @@ entry: define zeroext i16 @t4(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t4 +; ARM-LABEL: t4: %add.ptr = getelementptr inbounds i16, i16* %a, i64 -128 %0 = load i16, i16* %add.ptr, align 2 ; ARM: mvn r{{[1-9]}}, #255 @@ -42,7 +42,7 @@ entry: define zeroext i16 @t5(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t5 +; ARM-LABEL: t5: %add.ptr = getelementptr inbounds i16, i16* %a, i64 8 %0 = load i16, i16* %add.ptr, align 2 ; ARM: ldrh r0, [r0, #16] @@ -51,7 +51,7 @@ entry: define zeroext i16 @t6(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t6 +; ARM-LABEL: t6: %add.ptr = getelementptr inbounds i16, i16* %a, i64 16 %0 = load i16, i16* %add.ptr, align 2 ; ARM: ldrh r0, [r0, #32] @@ -60,7 +60,7 @@ entry: define zeroext i16 @t7(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t7 +; ARM-LABEL: t7: %add.ptr = getelementptr inbounds i16, i16* %a, i64 127 %0 = load i16, i16* %add.ptr, align 2 ; ARM: ldrh r0, [r0, #254] @@ -69,7 +69,7 @@ entry: define zeroext i16 @t8(i16* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t8 +; ARM-LABEL: t8: %add.ptr = getelementptr inbounds i16, i16* %a, i64 128 %0 = load i16, i16* %add.ptr, align 2 ; ARM: add r0, r0, #256 @@ -79,7 +79,7 @@ entry: define void @t9(i16* nocapture %a) nounwind uwtable ssp { entry: -; ARM: t9 +; ARM-LABEL: t9: %add.ptr = getelementptr inbounds i16, i16* %a, i64 -8 store i16 0, i16* %add.ptr, align 2 ; ARM: movw [[REG0:r[0-9]+]], #0 @@ -91,7 +91,7 @@ entry: ; strh r2, [r0, r1] define void @t10(i16* nocapture %a) nounwind uwtable ssp { entry: -; ARM: t10 +; ARM-LABEL: t10: %add.ptr = getelementptr inbounds i16, i16* %a, i64 -128 store i16 0, i16* %add.ptr, align 2 ; ARM: mvn r1, #255 @@ -103,7 +103,7 @@ entry: define void @t11(i16* nocapture %a) nounwind uwtable ssp { entry: -; ARM: t11 +; ARM-LABEL: t11: %add.ptr = getelementptr inbounds i16, i16* %a, i64 8 store i16 0, i16* %add.ptr, align 2 ; ARM: movw [[REG1:r[0-9]+]], #0 @@ -115,7 +115,7 @@ entry: ; strh r2, [r0, r1] define void @t12(i16* nocapture %a) nounwind uwtable ssp { entry: -; ARM: t12 +; ARM-LABEL: t12: %add.ptr = getelementptr inbounds i16, i16* %a, i64 128 store i16 0, i16* %add.ptr, align 2 ; ARM: add [[REG0:r[0-9]+]], r0, #256 @@ -126,7 +126,7 @@ entry: define signext i8 @t13(i8* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t13 +; ARM-LABEL: t13: %add.ptr = getelementptr inbounds i8, i8* %a, i64 -8 %0 = load i8, i8* %add.ptr, align 2 ; ARM: ldrsb r0, [r0, #-8] @@ -135,7 +135,7 @@ entry: define signext i8 @t14(i8* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t14 +; ARM-LABEL: t14: %add.ptr = getelementptr inbounds i8, i8* %a, i64 -255 %0 = load i8, i8* %add.ptr, align 2 ; ARM: ldrsb r0, [r0, #-255] @@ -144,7 +144,7 @@ entry: define signext i8 @t15(i8* nocapture %a) nounwind uwtable readonly ssp { entry: -; ARM: t15 +; ARM-LABEL: t15: %add.ptr = getelementptr inbounds i8, i8* %a, i64 -256 %0 = load i8, i8* %add.ptr, align 2 ; ARM: mvn r{{[1-9]}}, #255 diff --git a/llvm/test/CodeGen/ARM/fast-isel-select.ll b/llvm/test/CodeGen/ARM/fast-isel-select.ll index 70987422dfde..aec45c6b4e53 100644 --- a/llvm/test/CodeGen/ARM/fast-isel-select.ll +++ b/llvm/test/CodeGen/ARM/fast-isel-select.ll @@ -5,11 +5,11 @@ define i32 @t1(i1 %c) nounwind readnone { entry: -; ARM: t1 +; ARM-LABEL: t1: ; ARM: tst r0, #1 ; ARM: movw r0, #10 ; ARM: moveq r0, #20 -; THUMB: t1 +; THUMB-LABEL: t1: ; THUMB: tst.w r0, #1 ; THUMB: movw r0, #10 ; THUMB: it eq @@ -20,10 +20,10 @@ entry: define i32 @t2(i1 %c, i32 %a) nounwind readnone { entry: -; ARM: t2 +; ARM-LABEL: t2: ; ARM: tst {{r[0-9]+}}, #1 ; ARM: moveq {{r[0-9]+}}, #20 -; THUMB-LABEL: t2 +; THUMB-LABEL: t2: ; THUMB: tst.w {{r[0-9]+}}, #1 ; THUMB: it eq ; THUMB: moveq {{r[0-9]+}}, #20 @@ -33,11 +33,11 @@ entry: define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone { entry: -; ARM: t3 +; ARM-LABEL: t3: ; ARM: tst r0, #1 ; ARM: movne r2, r1 ; ARM: add r0, r2, r1 -; THUMB: t3 +; THUMB-LABEL: t3: ; THUMB: tst.w r0, #1 ; THUMB: it ne ; THUMB: movne r2, r1 @@ -49,11 +49,11 @@ entry: define i32 @t4(i1 %c) nounwind readnone { entry: -; ARM: t4 +; ARM-LABEL: t4: ; ARM: tst r0, #1 ; ARM: mvn r0, #9 ; ARM: mvneq r0, #0 -; THUMB-LABEL: t4 +; THUMB-LABEL: t4: ; THUMB: tst.w r0, #1 ; THUMB: mvn r0, #9 ; THUMB: it eq @@ -64,10 +64,10 @@ entry: define i32 @t5(i1 %c, i32 %a) nounwind readnone { entry: -; ARM: t5 +; ARM-LABEL: t5: ; ARM: tst {{r[0-9]+}}, #1 ; ARM: mvneq {{r[0-9]+}}, #1 -; THUMB: t5 +; THUMB-LABEL: t5: ; THUMB: tst.w {{r[0-9]+}}, #1 ; THUMB: it eq ; THUMB: mvneq {{r[0-9]+}}, #1 @@ -78,10 +78,10 @@ entry: ; Check one large negative immediates. define i32 @t6(i1 %c, i32 %a) nounwind readnone { entry: -; ARM: t6 +; ARM-LABEL: t6: ; ARM: tst {{r[0-9]+}}, #1 ; ARM: mvneq {{r[0-9]+}}, #978944 -; THUMB: t6 +; THUMB-LABEL: t6: ; THUMB: tst.w {{r[0-9]+}}, #1 ; THUMB: it eq ; THUMB: mvneq {{r[0-9]+}}, #978944 diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll index 652f145f8376..5bd736b30842 100644 --- a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll +++ b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll @@ -23,7 +23,7 @@ ; load define i8 @t1() nounwind { -; ELF64: t1 +; ELF64-LABEL: t1: %1 = load i8, i8* @a, align 1 ; ELF64: lbz %2 = add nsw i8 %1, 1 @@ -32,7 +32,7 @@ define i8 @t1() nounwind { } define i16 @t2() nounwind { -; ELF64: t2 +; ELF64-LABEL: t2: %1 = load i16, i16* @b, align 2 ; ELF64: lhz %2 = add nsw i16 %1, 1 @@ -41,7 +41,7 @@ define i16 @t2() nounwind { } define dso_local i32 @t3() nounwind { -; ELF64: t3 +; ELF64-LABEL: t3: %1 = load i32, i32* @c, align 4 ; ELF64: lwz %2 = add nsw i32 %1, 1 @@ -50,7 +50,7 @@ define dso_local i32 @t3() nounwind { } define i64 @t4() nounwind { -; ELF64: t4 +; ELF64-LABEL: t4: %1 = load i64, i64* @d, align 4 ; ELF64: ld %2 = add nsw i64 %1, 1 @@ -59,8 +59,8 @@ define i64 @t4() nounwind { } define dso_local float @t5() nounwind { -; ELF64: t5 -; SPE: t5 +; ELF64-LABEL: t5: +; SPE-LABEL: t5: %1 = load float, float* @e, align 4 ; ELF64: lfs ; SPE: lwz @@ -71,8 +71,8 @@ define dso_local float @t5() nounwind { } define dso_local double @t6() nounwind { -; ELF64: t6 -; SPE: t6 +; ELF64-LABEL: t6: +; SPE-LABEL: t6: %1 = load double, double* @f, align 8 ; ELF64: lfd ; VSX: lxsdx @@ -87,7 +87,7 @@ define dso_local double @t6() nounwind { ; store define dso_local void @t7(i8 %v) nounwind { -; ELF64: t7 +; ELF64-LABEL: t7: %1 = add nsw i8 %v, 1 store i8 %1, i8* @a, align 1 ; ELF64: addis @@ -98,7 +98,7 @@ define dso_local void @t7(i8 %v) nounwind { } define dso_local void @t8(i16 %v) nounwind { -; ELF64: t8 +; ELF64-LABEL: t8: %1 = add nsw i16 %v, 1 store i16 %1, i16* @b, align 2 ; ELF64: addis @@ -109,7 +109,7 @@ define dso_local void @t8(i16 %v) nounwind { } define dso_local void @t9(i32 %v) nounwind { -; ELF64: t9 +; ELF64-LABEL: t9: %1 = add nsw i32 %v, 1 store i32 %1, i32* @c, align 4 ; ELF64: addis @@ -120,7 +120,7 @@ define dso_local void @t9(i32 %v) nounwind { } define dso_local void @t10(i64 %v) nounwind { -; ELF64: t10 +; ELF64-LABEL: t10: %1 = add nsw i64 %v, 1 store i64 %1, i64* @d, align 4 ; ELF64: addis @@ -131,8 +131,8 @@ define dso_local void @t10(i64 %v) nounwind { } define dso_local void @t11(float %v) nounwind { -; ELF64: t11 -; SPE: t11 +; ELF64-LABEL: t11: +; SPE-LABEL: t11: %1 = fadd float %v, 1.0 store float %1, float* @e, align 4 ; ELF64: fadds @@ -143,8 +143,8 @@ define dso_local void @t11(float %v) nounwind { } define dso_local void @t12(double %v) nounwind { -; ELF64: t12 -; SPE: t12 +; ELF64-LABEL: t12: +; SPE-LABEL: t12: %1 = fadd double %v, 1.0 store double %1, double* @f, align 8 ; ELF64: fadd @@ -158,7 +158,7 @@ define dso_local void @t12(double %v) nounwind { ;; lwa requires an offset divisible by 4, so we need lwax here. define i64 @t13() nounwind { -; ELF64: t13 +; ELF64-LABEL: t13: %1 = load i32, i32* getelementptr inbounds (%struct.s, %struct.s* @g, i32 0, i32 1), align 1 %2 = sext i32 %1 to i64 ; ELF64: li @@ -170,7 +170,7 @@ define i64 @t13() nounwind { ;; ld requires an offset divisible by 4, so we need ldx here. define i64 @t14() nounwind { -; ELF64: t14 +; ELF64-LABEL: t14: %1 = load i64, i64* getelementptr inbounds (%struct.t, %struct.t* @h, i32 0, i32 1), align 1 ; ELF64: li ; ELF64: ldx @@ -181,7 +181,7 @@ define i64 @t14() nounwind { ;; std requires an offset divisible by 4, so we need stdx here. define dso_local void @t15(i64 %v) nounwind { -; ELF64: t15 +; ELF64-LABEL: t15: %1 = add nsw i64 %v, 1 store i64 %1, i64* getelementptr inbounds (%struct.t, %struct.t* @h, i32 0, i32 1), align 1 ; ELF64: addis @@ -194,7 +194,7 @@ define dso_local void @t15(i64 %v) nounwind { ;; ld requires an offset that fits in 16 bits, so we need ldx here. define i64 @t16() nounwind { -; ELF64: t16 +; ELF64-LABEL: t16: %1 = load i64, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8 ; ELF64: lis ; ELF64: ori @@ -206,7 +206,7 @@ define i64 @t16() nounwind { ;; std requires an offset that fits in 16 bits, so we need stdx here. define dso_local void @t17(i64 %v) nounwind { -; ELF64: t17 +; ELF64-LABEL: t17: %1 = add nsw i64 %v, 1 store i64 %1, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8 ; ELF64: addis