[GlobalISel] Don't translate br to layout successor.
MI can represent fallthrough to layout successor blocks, and our post-isel representation uses that extensively. We might as well use it too, to avoid translating and carrying along unnecessary branches. llvm-svn: 298459
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@ -223,10 +223,13 @@ bool IRTranslator::translateBr(const User &U, MachineIRBuilder &MIRBuilder) {
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const BasicBlock &BrTgt = *cast<BasicBlock>(BrInst.getSuccessor(Succ));
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MachineBasicBlock &TgtBB = getMBB(BrTgt);
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MIRBuilder.buildBr(TgtBB);
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MachineBasicBlock &CurBB = MIRBuilder.getMBB();
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// If the unconditional target is the layout successor, fallthrough.
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if (!CurBB.isLayoutSuccessor(&TgtBB))
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MIRBuilder.buildBr(TgtBB);
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// Link successors.
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MachineBasicBlock &CurBB = MIRBuilder.getMBB();
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for (const BasicBlock *Succ : BrInst.successors())
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CurBB.addSuccessor(&getMBB(*Succ));
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return true;
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@ -52,18 +52,40 @@ define void @allocai64() {
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; CHECK: body:
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;
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; ABI/constant lowering and IR-level entry basic block.
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; CHECK: {{bb.[0-9]+}} (%ir-block.{{[0-9]+}}):
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; CHECK: {{bb.[0-9]+}}.entry:
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;
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; Make sure we have one successor and only one.
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; CHECK-NEXT: successors: %[[END:bb.[0-9]+.end]](0x80000000)
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; CHECK-NEXT: successors: %[[BB2:bb.[0-9]+.bb2]](0x80000000)
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;
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; Check that we emit the correct branch.
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; CHECK: G_BR %[[END]]
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; CHECK: G_BR %[[BB2]]
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;
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; Check that end contains the return instruction.
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; CHECK: [[END:bb.[0-9]+.end]]:
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; CHECK-NEXT: RET_ReallyLR
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;
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; CHECK: {{bb.[0-9]+}}.bb2:
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; CHECK-NEXT: successors: %[[END]](0x80000000)
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; CHECK: G_BR %[[END]]
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define void @uncondbr() {
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entry:
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br label %bb2
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end:
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ret void
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bb2:
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br label %end
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}
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; CHECK-LABEL: name: uncondbr_fallthrough
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; CHECK: body:
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; CHECK: {{bb.[0-9]+}}.entry:
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; CHECK-NEXT: successors: %[[END:bb.[0-9]+.end]](0x80000000)
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; We don't emit a branch here, as we can fallthrough to the successor.
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; CHECK-NOT: G_BR
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; CHECK: [[END]]:
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; CHECK-NEXT: RET_ReallyLR
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define void @uncondbr() {
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define void @uncondbr_fallthrough() {
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entry:
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br label %end
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end:
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ret void
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@ -140,7 +162,6 @@ false:
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; CHECK: [[BB_CASE200]]:
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; CHECK-NEXT: successors: %[[BB_RET]](0x80000000)
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; CHECK: %[[regretc200:[0-9]+]](s32) = G_ADD %0, %[[reg2]]
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; CHECK: G_BR %[[BB_RET]]
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;
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; CHECK: [[BB_RET]]:
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; CHECK-NEXT: %[[regret:[0-9]+]](s32) = PHI %[[regretdefault]](s32), %[[BB_DEFAULT]], %[[regretc100]](s32), %[[BB_CASE100]]
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@ -232,7 +253,7 @@ phi.block:
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; CHECK: {{bb.[0-9]+.entry}}:
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; Make sure we have one successor
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; CHECK-NEXT: successors: %[[BB_L1:bb.[0-9]+.L1]](0x80000000)
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; CHECK: G_BR %[[BB_L1]]
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; CHECK-NOT: G_BR
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;
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; Check basic block L1 has 2 successors: BBL1 and BBL2
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; CHECK: [[BB_L1]] (address-taken):
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@ -525,8 +546,8 @@ define void @unreachable(i32 %a) {
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; CHECK-LABEL: name: constant_int
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; CHECK: [[IN:%[0-9]+]](s32) = COPY %w0
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; CHECK: [[ONE:%[0-9]+]](s32) = G_CONSTANT i32 1
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; CHECK: G_BR
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; CHECK: {{bb.[0-9]+}}.next:
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; CHECK: [[SUM1:%[0-9]+]](s32) = G_ADD [[IN]], [[ONE]]
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; CHECK: [[SUM2:%[0-9]+]](s32) = G_ADD [[IN]], [[ONE]]
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; CHECK: [[RES:%[0-9]+]](s32) = G_ADD [[SUM1]], [[SUM2]]
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@ -1181,7 +1202,7 @@ define i8* @test_const_placement() {
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; CHECK: bb.{{[0-9]+}} (%ir-block.{{[0-9]+}}):
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; CHECK: [[VAL_INT:%[0-9]+]](s32) = G_CONSTANT i32 42
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; CHECK: [[VAL:%[0-9]+]](p0) = G_INTTOPTR [[VAL_INT]](s32)
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; CHECK: G_BR
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; CHECK: {{bb.[0-9]+}}.next:
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br label %next
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next:
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