Revert "[X86][NFC] Remove dead code for "_REV" instructions"
This reverts commit 85f3d81fabb9381ce5bc0112d029a7c684b01006. Affects BOLT macro-fusion and not NFC.
This commit is contained in:
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46944210eb
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ea3c7b3397
@ -148,21 +148,25 @@ classifyFirstOpcodeInMacroFusion(unsigned Opcode) {
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case X86::AND16ri8:
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case X86::AND16ri8:
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case X86::AND16rm:
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case X86::AND16rm:
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case X86::AND16rr:
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case X86::AND16rr:
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case X86::AND16rr_REV:
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case X86::AND32i32:
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case X86::AND32i32:
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case X86::AND32ri:
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case X86::AND32ri:
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case X86::AND32ri8:
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case X86::AND32ri8:
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case X86::AND32rm:
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case X86::AND32rm:
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case X86::AND32rr:
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case X86::AND32rr:
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case X86::AND32rr_REV:
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case X86::AND64i32:
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case X86::AND64i32:
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case X86::AND64ri32:
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case X86::AND64ri32:
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case X86::AND64ri8:
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case X86::AND64ri8:
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case X86::AND64rm:
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case X86::AND64rm:
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case X86::AND64rr:
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case X86::AND64rr:
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case X86::AND64rr_REV:
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case X86::AND8i8:
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case X86::AND8i8:
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case X86::AND8ri:
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case X86::AND8ri:
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case X86::AND8ri8:
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case X86::AND8ri8:
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case X86::AND8rm:
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case X86::AND8rm:
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case X86::AND8rr:
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case X86::AND8rr:
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case X86::AND8rr_REV:
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return FirstMacroFusionInstKind::And;
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return FirstMacroFusionInstKind::And;
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// CMP
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// CMP
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case X86::CMP16i16:
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case X86::CMP16i16:
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@ -171,24 +175,28 @@ classifyFirstOpcodeInMacroFusion(unsigned Opcode) {
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case X86::CMP16ri8:
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case X86::CMP16ri8:
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case X86::CMP16rm:
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case X86::CMP16rm:
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case X86::CMP16rr:
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case X86::CMP16rr:
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case X86::CMP16rr_REV:
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case X86::CMP32i32:
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case X86::CMP32i32:
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case X86::CMP32mr:
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case X86::CMP32mr:
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case X86::CMP32ri:
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case X86::CMP32ri:
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case X86::CMP32ri8:
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case X86::CMP32ri8:
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case X86::CMP32rm:
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case X86::CMP32rm:
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case X86::CMP32rr:
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case X86::CMP32rr:
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case X86::CMP32rr_REV:
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case X86::CMP64i32:
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case X86::CMP64i32:
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case X86::CMP64mr:
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case X86::CMP64mr:
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case X86::CMP64ri32:
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case X86::CMP64ri32:
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case X86::CMP64ri8:
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case X86::CMP64ri8:
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case X86::CMP64rm:
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case X86::CMP64rm:
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case X86::CMP64rr:
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case X86::CMP64rr:
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case X86::CMP64rr_REV:
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case X86::CMP8i8:
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case X86::CMP8i8:
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case X86::CMP8mr:
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case X86::CMP8mr:
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case X86::CMP8ri:
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case X86::CMP8ri:
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case X86::CMP8ri8:
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case X86::CMP8ri8:
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case X86::CMP8rm:
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case X86::CMP8rm:
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case X86::CMP8rr:
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case X86::CMP8rr:
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case X86::CMP8rr_REV:
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return FirstMacroFusionInstKind::Cmp;
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return FirstMacroFusionInstKind::Cmp;
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// ADD
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// ADD
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case X86::ADD16i16:
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case X86::ADD16i16:
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@ -196,42 +204,50 @@ classifyFirstOpcodeInMacroFusion(unsigned Opcode) {
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case X86::ADD16ri8:
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case X86::ADD16ri8:
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case X86::ADD16rm:
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case X86::ADD16rm:
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case X86::ADD16rr:
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case X86::ADD16rr:
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case X86::ADD16rr_REV:
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case X86::ADD32i32:
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case X86::ADD32i32:
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case X86::ADD32ri:
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case X86::ADD32ri:
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case X86::ADD32ri8:
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case X86::ADD32ri8:
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case X86::ADD32rm:
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case X86::ADD32rm:
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case X86::ADD32rr:
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case X86::ADD32rr:
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case X86::ADD32rr_REV:
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case X86::ADD64i32:
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case X86::ADD64i32:
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case X86::ADD64ri32:
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case X86::ADD64ri32:
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case X86::ADD64ri8:
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case X86::ADD64ri8:
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case X86::ADD64rm:
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case X86::ADD64rm:
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case X86::ADD64rr:
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case X86::ADD64rr:
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case X86::ADD64rr_REV:
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case X86::ADD8i8:
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case X86::ADD8i8:
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case X86::ADD8ri:
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case X86::ADD8ri:
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case X86::ADD8ri8:
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case X86::ADD8ri8:
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case X86::ADD8rm:
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case X86::ADD8rm:
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case X86::ADD8rr:
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case X86::ADD8rr:
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case X86::ADD8rr_REV:
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// SUB
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// SUB
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case X86::SUB16i16:
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case X86::SUB16i16:
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case X86::SUB16ri:
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case X86::SUB16ri:
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case X86::SUB16ri8:
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case X86::SUB16ri8:
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case X86::SUB16rm:
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case X86::SUB16rm:
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case X86::SUB16rr:
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case X86::SUB16rr:
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case X86::SUB16rr_REV:
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case X86::SUB32i32:
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case X86::SUB32i32:
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case X86::SUB32ri:
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case X86::SUB32ri:
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case X86::SUB32ri8:
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case X86::SUB32ri8:
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case X86::SUB32rm:
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case X86::SUB32rm:
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case X86::SUB32rr:
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case X86::SUB32rr:
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case X86::SUB32rr_REV:
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case X86::SUB64i32:
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case X86::SUB64i32:
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case X86::SUB64ri32:
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case X86::SUB64ri32:
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case X86::SUB64ri8:
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case X86::SUB64ri8:
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case X86::SUB64rm:
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case X86::SUB64rm:
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case X86::SUB64rr:
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case X86::SUB64rr:
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case X86::SUB64rr_REV:
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case X86::SUB8i8:
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case X86::SUB8i8:
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case X86::SUB8ri:
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case X86::SUB8ri:
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case X86::SUB8ri8:
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case X86::SUB8ri8:
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case X86::SUB8rm:
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case X86::SUB8rm:
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case X86::SUB8rr:
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case X86::SUB8rr:
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case X86::SUB8rr_REV:
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return FirstMacroFusionInstKind::AddSub;
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return FirstMacroFusionInstKind::AddSub;
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// INC
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// INC
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case X86::INC16r:
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case X86::INC16r:
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@ -173,6 +173,7 @@ static FlagArithMnemonic getMnemonicFromOpcode(unsigned Opcode) {
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#define LLVM_EXPAND_ADC_SBB_INSTR(MNEMONIC) \
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#define LLVM_EXPAND_ADC_SBB_INSTR(MNEMONIC) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rr) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rr) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rr_REV) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rm) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rm) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, mr) \
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LLVM_EXPAND_INSTR_SIZES(MNEMONIC, mr) \
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case X86::MNEMONIC##8ri: \
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case X86::MNEMONIC##8ri: \
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