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[CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC.

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The first member of the pair should be unsigned instead of Register
because it is the hint type, 0 for simple (target independent) hints and
other values for target dependent hints.

Differential Revision: https://reviews.llvm.org/D146646
This commit is contained in:
Jay Foad 2023-03-22 16:56:05 +00:00
parent 38d69df5c2
commit eac8e25ea5
6 changed files with 17 additions and 18 deletions
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17
llvm/include/llvm/CodeGen/MachineRegisterInfo.h
View File

@ -101,8 +101,9 @@ private:
/// first member of the pair being non-zero. If the hinted register is
/// virtual, it means the allocator should prefer the physical register
/// allocated to it if any.
IndexedMap<std::pair<Register, SmallVector<Register, 4>>,
VirtReg2IndexFunctor> RegAllocHints;
IndexedMap<std::pair<unsigned, SmallVector<Register, 4>>,
VirtReg2IndexFunctor>
RegAllocHints;
/// PhysRegUseDefLists - This is an array of the head of the use/def list for
/// physical registers.
@ -818,27 +819,25 @@ public:
/// getRegAllocationHint - Return the register allocation hint for the
/// specified virtual register. If there are many hints, this returns the
/// one with the greatest weight.
std::pair<Register, Register>
getRegAllocationHint(Register VReg) const {
std::pair<unsigned, Register> getRegAllocationHint(Register VReg) const {
assert(VReg.isVirtual());
Register BestHint = (RegAllocHints[VReg.id()].second.size() ?
RegAllocHints[VReg.id()].second[0] : Register());
return std::pair<Register, Register>(RegAllocHints[VReg.id()].first,
BestHint);
return {RegAllocHints[VReg.id()].first, BestHint};
}
/// getSimpleHint - same as getRegAllocationHint except it will only return
/// a target independent hint.
Register getSimpleHint(Register VReg) const {
assert(VReg.isVirtual());
std::pair<Register, Register> Hint = getRegAllocationHint(VReg);
std::pair<unsigned, Register> Hint = getRegAllocationHint(VReg);
return Hint.first ? Register() : Hint.second;
}
/// getRegAllocationHints - Return a reference to the vector of all
/// register allocation hints for VReg.
const std::pair<Register, SmallVector<Register, 4>>
&getRegAllocationHints(Register VReg) const {
const std::pair<unsigned, SmallVector<Register, 4>> &
getRegAllocationHints(Register VReg) const {
assert(VReg.isVirtual());
return RegAllocHints[VReg];
}

2
llvm/lib/CodeGen/CalcSpillWeights.cpp
View File

@ -157,7 +157,7 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &LI, SlotIndex *Start,
unsigned NumInstr = 0; // Number of instructions using LI
SmallPtrSet<MachineInstr *, 8> Visited;
std::pair<Register, Register> TargetHint = MRI.getRegAllocationHint(LI.reg());
std::pair<unsigned, Register> TargetHint = MRI.getRegAllocationHint(LI.reg());
if (LI.isSpillable()) {
Register Reg = LI.reg();

4
llvm/lib/CodeGen/TargetRegisterInfo.cpp
View File

@ -424,8 +424,8 @@ bool TargetRegisterInfo::getRegAllocationHints(
SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF,
const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const {
const MachineRegisterInfo &MRI = MF.getRegInfo();
const std::pair<Register, SmallVector<Register, 4>> &Hints_MRI =
MRI.getRegAllocationHints(VirtReg);
const std::pair<unsigned, SmallVector<Register, 4>> &Hints_MRI =
MRI.getRegAllocationHints(VirtReg);
SmallSet<Register, 32> HintedRegs;
// First hint may be a target hint.

6
llvm/lib/CodeGen/VirtRegMap.cpp
View File

@ -116,10 +116,10 @@ bool VirtRegMap::hasPreferredPhys(Register VirtReg) const {
}
bool VirtRegMap::hasKnownPreference(Register VirtReg) const {
std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(VirtReg);
if (Register::isPhysicalRegister(Hint.second))
std::pair<unsigned, Register> Hint = MRI->getRegAllocationHint(VirtReg);
if (Hint.second.isPhysical())
return true;
if (Register::isVirtualRegister(Hint.second))
if (Hint.second.isVirtual())
return hasPhys(Hint.second);
return false;
}

4
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
View File

@ -338,7 +338,7 @@ bool ARMBaseRegisterInfo::getRegAllocationHints(
SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF,
const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const {
const MachineRegisterInfo &MRI = MF.getRegInfo();
std::pair<Register, Register> Hint = MRI.getRegAllocationHint(VirtReg);
std::pair<unsigned, Register> Hint = MRI.getRegAllocationHint(VirtReg);
unsigned Odd;
switch (Hint.first) {
@ -391,7 +391,7 @@ bool ARMBaseRegisterInfo::getRegAllocationHints(
void ARMBaseRegisterInfo::updateRegAllocHint(Register Reg, Register NewReg,
MachineFunction &MF) const {
MachineRegisterInfo *MRI = &MF.getRegInfo();
std::pair<Register, Register> Hint = MRI->getRegAllocationHint(Reg);
std::pair<unsigned, Register> Hint = MRI->getRegAllocationHint(Reg);
if ((Hint.first == ARMRI::RegPairOdd || Hint.first == ARMRI::RegPairEven) &&
Hint.second.isVirtual()) {
// If 'Reg' is one of the even / odd register pair and it's now changed

2
llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
View File

@ -23,7 +23,7 @@ static void dropRegisterHintsFromFunction(Oracle &O, MachineFunction &MF) {
for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
Register Reg = Register::index2VirtReg(I);
const std::pair<Register, SmallVector<Register, 4>> &Hints =
const std::pair<unsigned, SmallVector<Register, 4>> &Hints =
MRI.getRegAllocationHints(Reg);
if (Hints.second.empty())
continue;