diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index 5cd6effc37c5..51dc41cc2b4d 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -517,11 +517,7 @@ def S_MAX_U32 : SOP2_32 <"s_max_u32",
 } // End isCommutable = 1
 } // End Defs = [SCC]
 
-// This pattern is restricted to certain subtargets (practically GFX8Plus)
-// because isel sometimes produces an sreg_64 copy to SCC as a by-product
-// of this pattern, and only for subtargets with hasScalarCompareEq64
-// is it possible to map such copy to a single instruction (S_CMP_LG_U64).
-class SelectPat<SDPatternOperator select> : PatFrag <
+def SelectPat : PatFrag <
   (ops node:$src1, node:$src2),
   (select SCC, $src1, $src2),
   [{ return !N->isDivergent(); }]
@@ -530,7 +526,7 @@ class SelectPat<SDPatternOperator select> : PatFrag <
 let Uses = [SCC] in {
   let AddedComplexity = 20 in {
     def S_CSELECT_B32 : SOP2_32 <"s_cselect_b32",
-      [(set i32:$sdst, (SelectPat<select> i32:$src0, i32:$src1))]
+      [(set i32:$sdst, (SelectPat i32:$src0, i32:$src1))]
     >;
   }