[Support] Move TargetParsers to new component
This is a fairly large changeset, but it can be broken into a few pieces: - `llvm/Support/*TargetParser*` are all moved from the LLVM Support component into a new LLVM Component called "TargetParser". This potentially enables using tablegen to maintain this information, as is shown in https://reviews.llvm.org/D137517. This cannot currently be done, as llvm-tblgen relies on LLVM's Support component. - This also moves two files from Support which use and depend on information in the TargetParser: - `llvm/Support/Host.{h,cpp}` which contains functions for inspecting the current Host machine for info about it, primarily to support getting the host triple, but also for `-mcpu=native` support in e.g. Clang. This is fairly tightly intertwined with the information in `X86TargetParser.h`, so keeping them in the same component makes sense. - `llvm/ADT/Triple.h` and `llvm/Support/Triple.cpp`, which contains the target triple parser and representation. This is very intertwined with the Arm target parser, because the arm architecture version appears in canonical triples on arm platforms. - I moved the relevant unittests to their own directory. And so, we end up with a single component that has all the information about the following, which to me seems like a unified component: - Triples that LLVM Knows about - Architecture names and CPUs that LLVM knows about - CPU detection logic for LLVM Given this, I have also moved `RISCVISAInfo.h` into this component, as it seems to me to be part of that same set of functionality. If you get link errors in your components after this patch, you likely need to add TargetParser into LLVM_LINK_COMPONENTS in CMake. Differential Revision: https://reviews.llvm.org/D137838
This commit is contained in:
Archibald Elliott
parent
57aac3d312
commit
f09cf34d00
@ -5,6 +5,7 @@ set(LLVM_LINK_COMPONENTS
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MCDisassembler
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MCDisassembler
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Object
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Object
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Support
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Support
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TargetParser
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)
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)
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add_llvm_library(LLVMBOLTCore
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add_llvm_library(LLVMBOLTCore
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@ -56,6 +56,7 @@ add_llvm_library(LLVMBOLTPasses
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AsmPrinter
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AsmPrinter
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MC
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MC
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Support
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Support
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TargetParser
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TransformUtils
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TransformUtils
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)
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)
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@ -5,6 +5,7 @@ set(LLVM_LINK_COMPONENTS
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MC
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MC
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Object
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Object
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Support
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Support
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TargetParser
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)
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)
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set(TARGET_LINK_LIBRARIES
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set(TARGET_LINK_LIBRARIES
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@ -1,6 +1,7 @@
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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TargetParser
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)
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)
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add_clang_library(clangTidyPortabilityModule
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add_clang_library(clangTidyPortabilityModule
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AllTargetsInfos
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AllTargetsInfos
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FrontendOpenMP
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FrontendOpenMP
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Option
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Option
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TargetParser
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)
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)
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set(COMPLETIONMODEL_SOURCES)
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set(COMPLETIONMODEL_SOURCES)
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@ -1,6 +1,7 @@
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Option
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Option
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Support
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Support
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TargetParser
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)
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)
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add_clang_tool(modularize
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add_clang_tool(modularize
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@ -5484,7 +5484,7 @@ llvm/include/llvm/Support/CodeGenCoverage.h
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llvm/include/llvm/Support/CRC.h
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llvm/include/llvm/Support/CRC.h
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llvm/include/llvm/Support/CSKYAttributeParser.h
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llvm/include/llvm/Support/CSKYAttributeParser.h
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llvm/include/llvm/Support/CSKYAttributes.h
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llvm/include/llvm/Support/CSKYAttributes.h
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llvm/include/llvm/Support/CSKYTargetParser.h
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llvm/include/llvm/TargetParser/CSKYTargetParser.h
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llvm/include/llvm/Support/DataTypes.h
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llvm/include/llvm/Support/DataTypes.h
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llvm/include/llvm/Support/DebugCounter.h
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llvm/include/llvm/Support/DebugCounter.h
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llvm/include/llvm/Support/Discriminator.h
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llvm/include/llvm/Support/Discriminator.h
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@ -5511,7 +5511,7 @@ llvm/include/llvm/Support/PGOOptions.h
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llvm/include/llvm/Support/PointerLikeTypeTraits.h
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llvm/include/llvm/Support/PointerLikeTypeTraits.h
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llvm/include/llvm/Support/RISCVAttributeParser.h
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llvm/include/llvm/Support/RISCVAttributeParser.h
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llvm/include/llvm/Support/RISCVAttributes.h
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llvm/include/llvm/Support/RISCVAttributes.h
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llvm/include/llvm/Support/RISCVISAInfo.h
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llvm/include/llvm/TargetParser/RISCVISAInfo.h
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llvm/include/llvm/Support/RWMutex.h
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llvm/include/llvm/Support/RWMutex.h
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llvm/include/llvm/Support/ScopedPrinter.h
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llvm/include/llvm/Support/ScopedPrinter.h
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llvm/include/llvm/Support/SHA256.h
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llvm/include/llvm/Support/SHA256.h
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@ -5523,7 +5523,7 @@ llvm/include/llvm/Support/SourceMgr.h
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llvm/include/llvm/Support/SuffixTree.h
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llvm/include/llvm/Support/SuffixTree.h
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llvm/include/llvm/Support/SymbolRemappingReader.h
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llvm/include/llvm/Support/SymbolRemappingReader.h
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llvm/include/llvm/Support/SystemUtils.h
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llvm/include/llvm/Support/SystemUtils.h
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llvm/include/llvm/Support/TargetParser.h
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llvm/include/llvm/TargetParser/TargetParser.h
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llvm/include/llvm/Support/TrailingObjects.h
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llvm/include/llvm/Support/TrailingObjects.h
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llvm/include/llvm/Support/Unicode.h
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llvm/include/llvm/Support/Unicode.h
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llvm/include/llvm/Support/UnicodeCharRanges.h
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llvm/include/llvm/Support/UnicodeCharRanges.h
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@ -1,5 +1,6 @@
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Support
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Support
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TargetParser
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)
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)
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# By default MSVC has a 2^16 limit on the number of sections in an object
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# By default MSVC has a 2^16 limit on the number of sections in an object
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Core
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Core
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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TargetParser
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)
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)
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# FIXME: the entry points to the interpreter should be moved out of clangAST
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# FIXME: the entry points to the interpreter should be moved out of clangAST
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Support
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Support
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TargetParser
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)
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)
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find_first_existing_vc_file("${LLVM_MAIN_SRC_DIR}" llvm_vc)
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find_first_existing_vc_file("${LLVM_MAIN_SRC_DIR}" llvm_vc)
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@ -26,6 +26,7 @@ set(LLVM_LINK_COMPONENTS
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ScalarOpts
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ScalarOpts
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Support
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Support
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Target
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Target
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TargetParser
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TransformUtils
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TransformUtils
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)
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)
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Support
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Support
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TargetParser
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)
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)
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add_clang_library(clangCrossTU
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add_clang_library(clangCrossTU
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Option
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Option
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ProfileData
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ProfileData
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Support
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Support
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TargetParser
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WindowsDriver
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WindowsDriver
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)
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)
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Support
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Support
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TargetParser
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)
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)
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add_clang_library(clangExtractAPI
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add_clang_library(clangExtractAPI
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Option
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Option
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ProfileData
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ProfileData
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Support
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Support
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TargetParser
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)
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)
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add_clang_library(clangFrontend
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add_clang_library(clangFrontend
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OrcJit
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OrcJit
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Support
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Support
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Target
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Target
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TargetParser
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)
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)
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add_clang_library(clangInterpreter
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add_clang_library(clangInterpreter
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# TODO: Add -maltivec when ARCH is PowerPC.
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# TODO: Add -maltivec when ARCH is PowerPC.
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set(LLVM_LINK_COMPONENTS support)
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set(LLVM_LINK_COMPONENTS
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Support
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TargetParser
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)
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add_clang_library(clangLex
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add_clang_library(clangLex
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DependencyDirectivesScanner.cpp
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DependencyDirectivesScanner.cpp
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@ -3,6 +3,7 @@ set(LLVM_LINK_COMPONENTS
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MC
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MC
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MCParser
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MCParser
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Support
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Support
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TargetParser
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)
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)
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add_clang_library(clangParse
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add_clang_library(clangParse
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FrontendOpenMP
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FrontendOpenMP
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MC
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MC
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Support
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Support
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TargetParser
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)
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)
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clang_tablegen(OpenCLBuiltins.inc -gen-clang-opencl-builtins
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clang_tablegen(OpenCLBuiltins.inc -gen-clang-opencl-builtins
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@ -2,6 +2,7 @@ set(LLVM_LINK_COMPONENTS
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BitReader
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BitReader
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BitstreamReader
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BitstreamReader
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Support
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Support
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TargetParser
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)
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)
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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TargetParser
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)
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)
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add_clang_library(clangStaticAnalyzerCheckers
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add_clang_library(clangStaticAnalyzerCheckers
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Option
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Option
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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TargetParser
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add_subdirectory(Core)
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add_subdirectory(Core)
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Core
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Core
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Option
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Option
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Support
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Support
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add_clang_library(clangDependencyScanning
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add_clang_library(clangDependencyScanning
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SelectionDAG
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SelectionDAG
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Support
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Support
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Target
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Target
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TargetParser
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TransformUtils
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TransformUtils
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native
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native
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)
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Core
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Core
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Support
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Support
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TargetParser
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add_clang_executable(clang-import-test
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add_clang_executable(clang-import-test
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include(GNUInstallDirs)
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include(GNUInstallDirs)
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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${LLVM_TARGETS_TO_BUILD}
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${LLVM_TARGETS_TO_BUILD}
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BitWriter
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BitWriter
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Core
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Core
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Object
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Object
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Option
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Option
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Support
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Support
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TargetParser
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CodeGen
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CodeGen
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LTO)
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LTO
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set(LLVM_TARGET_DEFINITIONS LinkerWrapperOpts.td)
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set(LLVM_TARGET_DEFINITIONS LinkerWrapperOpts.td)
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tablegen(LLVM LinkerWrapperOpts.inc -gen-opt-parser-defs)
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tablegen(LLVM LinkerWrapperOpts.inc -gen-opt-parser-defs)
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set(LLVM_LINK_COMPONENTS Object Support)
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set(LLVM_LINK_COMPONENTS
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Object
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add_clang_tool(clang-offload-bundler
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add_clang_tool(clang-offload-bundler
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ClangOffloadBundler.cpp
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ClangOffloadBundler.cpp
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Option
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Option
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ScalarOpts
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ScalarOpts
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Support
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Support
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TransformUtils
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TransformUtils
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Vectorize
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Vectorize
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)
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${LLVM_TARGETS_TO_BUILD}
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${LLVM_TARGETS_TO_BUILD}
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Core
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Core
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Support
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Support
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TargetParser
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if(ENABLE_STATIC)
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if(ENABLE_STATIC)
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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add_clang_unittest(ASTMatchersTests
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add_clang_unittest(ASTMatchersTests
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Core
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Core
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Support
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Support
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)
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add_clang_unittest(ClangCodeGenTests
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add_clang_unittest(ClangCodeGenTests
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MC
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MC
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Option
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Option
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Support
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Support
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TargetParser
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)
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add_clang_unittest(ClangDriverTests
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add_clang_unittest(ClangDriverTests
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set(LLVM_LINK_COMPONENTS
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set(LLVM_LINK_COMPONENTS
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Support
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Support
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TargetParser
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)
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add_clang_unittest(FrontendTests
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add_clang_unittest(FrontendTests
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Core
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Core
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OrcJIT
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OrcJIT
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Support
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Support
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TargetParser
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)
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)
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add_clang_unittest(ClangReplInterpreterTests
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add_clang_unittest(ClangReplInterpreterTests
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Option
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Option
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FrontendOpenMP
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FrontendOpenMP
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Support
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Support
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TargetParser
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Option
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Option
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Support
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Support
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Target
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Target
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TargetParser
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FrontendOpenACC
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FrontendOpenACC
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FrontendOpenMP
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FrontendOpenMP
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AsmParser
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AsmParser
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AsmPrinter
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AsmPrinter
|
||||||
Remarks
|
Remarks
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -17,4 +17,7 @@ add_flang_library(FIRSupport
|
|||||||
MLIROpenMPToLLVMIRTranslation
|
MLIROpenMPToLLVMIRTranslation
|
||||||
MLIRLLVMToLLVMIRTranslation
|
MLIRLLVMToLLVMIRTranslation
|
||||||
MLIRTargetLLVMIRExport
|
MLIRTargetLLVMIRExport
|
||||||
|
|
||||||
|
LINK_COMPONENTS
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -1,5 +1,6 @@
|
|||||||
set(LLVM_LINK_COMPONENTS
|
set(LLVM_LINK_COMPONENTS
|
||||||
Passes
|
Passes
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_flang_tool(bbc bbc.cpp
|
add_flang_tool(bbc bbc.cpp
|
||||||
|
|||||||
@ -8,6 +8,7 @@ set( LLVM_LINK_COMPONENTS
|
|||||||
${LLVM_TARGETS_TO_BUILD}
|
${LLVM_TARGETS_TO_BUILD}
|
||||||
Option
|
Option
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_flang_tool(flang-new
|
add_flang_tool(flang-new
|
||||||
|
|||||||
@ -1,5 +1,6 @@
|
|||||||
set(LLVM_LINK_COMPONENTS
|
set(LLVM_LINK_COMPONENTS
|
||||||
${LLVM_TARGETS_TO_BUILD}
|
${LLVM_TARGETS_TO_BUILD}
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_flang_unittest(FlangFrontendTests
|
add_flang_unittest(FlangFrontendTests
|
||||||
|
|||||||
@ -7,6 +7,7 @@ set(LIBS
|
|||||||
FIRSupport
|
FIRSupport
|
||||||
HLFIRDialect
|
HLFIRDialect
|
||||||
${dialect_libs}
|
${dialect_libs}
|
||||||
|
LLVMTargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_flang_unittest(FlangOptimizerTests
|
add_flang_unittest(FlangOptimizerTests
|
||||||
|
|||||||
@ -1,6 +1,9 @@
|
|||||||
find_package(Threads)
|
find_package(Threads)
|
||||||
|
|
||||||
set(LLVM_LINK_COMPONENTS Support)
|
set(LLVM_LINK_COMPONENTS
|
||||||
|
Support
|
||||||
|
TargetParser
|
||||||
|
)
|
||||||
|
|
||||||
#==============================================================================
|
#==============================================================================
|
||||||
# Add Unit Testing Support
|
# Add Unit Testing Support
|
||||||
|
|||||||
@ -38,6 +38,7 @@ add_lld_library(lldCOFF
|
|||||||
Option
|
Option
|
||||||
Passes
|
Passes
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
WindowsDriver
|
WindowsDriver
|
||||||
WindowsManifest
|
WindowsManifest
|
||||||
|
|
||||||
|
|||||||
@ -46,6 +46,7 @@ add_lld_library(lldCommon
|
|||||||
Option
|
Option
|
||||||
Support
|
Support
|
||||||
Target
|
Target
|
||||||
|
TargetParser
|
||||||
|
|
||||||
LINK_LIBS
|
LINK_LIBS
|
||||||
${LLVM_PTHREAD_LIB}
|
${LLVM_PTHREAD_LIB}
|
||||||
|
|||||||
@ -71,6 +71,7 @@ add_lld_library(lldELF
|
|||||||
Option
|
Option
|
||||||
Passes
|
Passes
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
|
|
||||||
LINK_LIBS
|
LINK_LIBS
|
||||||
lldCommon
|
lldCommon
|
||||||
|
|||||||
@ -48,6 +48,7 @@ add_lld_library(lldMachO
|
|||||||
Option
|
Option
|
||||||
Passes
|
Passes
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
TextAPI
|
TextAPI
|
||||||
|
|
||||||
LINK_LIBS
|
LINK_LIBS
|
||||||
|
|||||||
@ -8,6 +8,7 @@ add_lld_library(lldMinGW
|
|||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Option
|
Option
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
|
|
||||||
LINK_LIBS
|
LINK_LIBS
|
||||||
lldCOFF
|
lldCOFF
|
||||||
|
|||||||
@ -1,5 +1,6 @@
|
|||||||
set(LLVM_LINK_COMPONENTS
|
set(LLVM_LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_lld_tool(lld
|
add_lld_tool(lld
|
||||||
|
|||||||
@ -29,6 +29,7 @@ add_lld_library(lldWasm
|
|||||||
Option
|
Option
|
||||||
Passes
|
Passes
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
|
|
||||||
LINK_LIBS
|
LINK_LIBS
|
||||||
lldCommon
|
lldCommon
|
||||||
|
|||||||
@ -94,6 +94,7 @@ add_lldb_library(lldbCore
|
|||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
Demangle
|
Demangle
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_dependencies(lldbCore
|
add_dependencies(lldbCore
|
||||||
|
|||||||
@ -13,6 +13,7 @@ add_lldb_library(lldbHostMacOSXObjCXX
|
|||||||
|
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
target_compile_options(lldbHostMacOSXObjCXX PRIVATE -fno-objc-exceptions)
|
target_compile_options(lldbHostMacOSXObjCXX PRIVATE -fno-objc-exceptions)
|
||||||
|
|||||||
@ -9,4 +9,5 @@ add_lldb_library(lldbPluginABIAArch64 PLUGIN
|
|||||||
lldbTarget
|
lldbTarget
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -8,4 +8,5 @@ add_lldb_library(lldbPluginABIARC PLUGIN
|
|||||||
lldbPluginProcessUtility
|
lldbPluginProcessUtility
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -10,4 +10,5 @@ add_lldb_library(lldbPluginABIARM PLUGIN
|
|||||||
lldbPluginProcessUtility
|
lldbPluginProcessUtility
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -7,4 +7,5 @@ add_lldb_library(lldbPluginABIHexagon PLUGIN
|
|||||||
lldbTarget
|
lldbTarget
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -9,4 +9,5 @@ add_lldb_library(lldbPluginABIMips PLUGIN
|
|||||||
lldbTarget
|
lldbTarget
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -10,4 +10,5 @@ add_lldb_library(lldbPluginABIPowerPC PLUGIN
|
|||||||
lldbPluginTypeSystemClang
|
lldbPluginTypeSystemClang
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -7,4 +7,5 @@ add_lldb_library(lldbPluginABISystemZ PLUGIN
|
|||||||
lldbTarget
|
lldbTarget
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -12,4 +12,5 @@ add_lldb_library(lldbPluginABIX86 PLUGIN
|
|||||||
lldbTarget
|
lldbTarget
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -11,4 +11,5 @@ add_lldb_library(lldbPluginDisassemblerLLVMC PLUGIN
|
|||||||
MCDisassembler
|
MCDisassembler
|
||||||
RuntimeDyld
|
RuntimeDyld
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -14,4 +14,5 @@ add_lldb_library(lldbPluginDynamicLoaderMacOSXDYLD PLUGIN
|
|||||||
lldbPluginTypeSystemClang
|
lldbPluginTypeSystemClang
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -6,4 +6,5 @@ add_lldb_library(lldbPluginDynamicLoaderWindowsDYLD PLUGIN
|
|||||||
lldbTarget
|
lldbTarget
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -59,4 +59,5 @@ add_lldb_library(lldbPluginExpressionParserClang
|
|||||||
ipo
|
ipo
|
||||||
MCJIT
|
MCJIT
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -9,4 +9,5 @@ add_lldb_library(lldbPluginObjectFileBreakpad PLUGIN
|
|||||||
lldbUtility
|
lldbUtility
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -27,6 +27,7 @@ add_lldb_library(lldbPluginObjectFilePECOFF PLUGIN
|
|||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
BinaryFormat
|
BinaryFormat
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_dependencies(lldbPluginObjectFilePECOFF
|
add_dependencies(lldbPluginObjectFilePECOFF
|
||||||
|
|||||||
@ -6,4 +6,7 @@ add_lldb_library(lldbPluginPlatformFreeBSD PLUGIN
|
|||||||
lldbCore
|
lldbCore
|
||||||
lldbHost
|
lldbHost
|
||||||
lldbTarget
|
lldbTarget
|
||||||
|
|
||||||
|
LINK_COMPONENTS
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -52,6 +52,7 @@ add_lldb_library(lldbPluginPlatformMacOSX PLUGIN
|
|||||||
clangBasic
|
clangBasic
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_dependencies(lldbPluginPlatformMacOSX
|
add_dependencies(lldbPluginPlatformMacOSX
|
||||||
|
|||||||
@ -28,4 +28,5 @@ add_lldb_library(lldbPluginProcessLinux
|
|||||||
lldbPluginProcessUtility
|
lldbPluginProcessUtility
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -67,4 +67,5 @@ add_lldb_library(lldbPluginProcessUtility
|
|||||||
lldbUtility
|
lldbUtility
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -47,6 +47,7 @@ add_lldb_library(lldbPluginProcessGDBRemote PLUGIN
|
|||||||
${LIBCOMPRESSION}
|
${LIBCOMPRESSION}
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
add_dependencies(lldbPluginProcessGDBRemote
|
add_dependencies(lldbPluginProcessGDBRemote
|
||||||
|
|||||||
@ -23,4 +23,5 @@ add_lldb_library(lldbPluginSymbolFileNativePDB
|
|||||||
DebugInfoCodeView
|
DebugInfoCodeView
|
||||||
DebugInfoPDB
|
DebugInfoPDB
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -81,4 +81,5 @@ add_lldb_library(lldbUtility
|
|||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
BinaryFormat
|
BinaryFormat
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -9,7 +9,7 @@
|
|||||||
.globl fn
|
.globl fn
|
||||||
.type fn, @function
|
.type fn, @function
|
||||||
fn:
|
fn:
|
||||||
// These are in the same order as llvm/include/llvm/Support/AArch64TargetParser.def
|
// These are in the same order as llvm/include/llvm/TargetParser/AArch64TargetParser.def
|
||||||
crc32b w0, w0, w0 // CRC
|
crc32b w0, w0, w0 // CRC
|
||||||
ldaddab w0, w0, [sp] // LSE
|
ldaddab w0, w0, [sp] // LSE
|
||||||
sqrdmlah v0.4h, v1.4h, v2.4h // RDM
|
sqrdmlah v0.4h, v1.4h, v2.4h // RDM
|
||||||
|
|||||||
@ -6,4 +6,5 @@ add_lldb_library(lldbIntelMPX
|
|||||||
|
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -36,4 +36,5 @@ add_lldb_unittest(HostTests
|
|||||||
lldbUtilityHelpers
|
lldbUtilityHelpers
|
||||||
lldbHostHelpers
|
lldbHostHelpers
|
||||||
LLVMTestingSupport
|
LLVMTestingSupport
|
||||||
|
LLVMTargetParser
|
||||||
)
|
)
|
||||||
|
|||||||
@ -52,6 +52,7 @@ add_lldb_unittest(UtilityTests
|
|||||||
LLVMTestingSupport
|
LLVMTestingSupport
|
||||||
LINK_COMPONENTS
|
LINK_COMPONENTS
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
)
|
)
|
||||||
|
|
||||||
set(test_inputs
|
set(test_inputs
|
||||||
|
|||||||
@ -2,5 +2,5 @@ add_lldb_executable(lit-cpuid
|
|||||||
lit-cpuid.cpp
|
lit-cpuid.cpp
|
||||||
)
|
)
|
||||||
|
|
||||||
target_link_libraries(lit-cpuid PRIVATE LLVMSupport)
|
target_link_libraries(lit-cpuid PRIVATE LLVMSupport LLVMTargetParser)
|
||||||
set_target_properties(lit-cpuid PROPERTIES FOLDER "lldb utils")
|
set_target_properties(lit-cpuid PROPERTIES FOLDER "lldb utils")
|
||||||
|
|||||||
@ -4,6 +4,7 @@ set(LLVM_LINK_COMPONENTS
|
|||||||
Object
|
Object
|
||||||
OrcJIT
|
OrcJIT
|
||||||
Support
|
Support
|
||||||
|
TargetParser
|
||||||
native
|
native
|
||||||
)
|
)
|
||||||
|
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@ -1,193 +1,15 @@
|
|||||||
//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
|
//===-- llvm/Support/AArch64TargetParser.h ----------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file implements a target parser to recognise AArch64 hardware features
|
/// \file
|
||||||
// such as FPU/CPU/ARCH and extension names.
|
/// This header is deprecated in favour of
|
||||||
//
|
/// `llvm/TargetParser/AArch64TargetParser.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_AARCH64TARGETPARSER_H
|
#include "llvm/TargetParser/AArch64TargetParser.h"
|
||||||
#define LLVM_SUPPORT_AARCH64TARGETPARSER_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/StringRef.h"
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
// FIXME:This should be made into class design,to avoid dupplication.
|
|
||||||
namespace llvm {
|
|
||||||
|
|
||||||
class Triple;
|
|
||||||
|
|
||||||
namespace AArch64 {
|
|
||||||
|
|
||||||
// Arch extension modifiers for CPUs. These are labelled with their Arm ARM
|
|
||||||
// feature name (though the canonical reference for those is AArch64.td)
|
|
||||||
// clang-format off
|
|
||||||
enum ArchExtKind : uint64_t {
|
|
||||||
AEK_INVALID = 0,
|
|
||||||
AEK_NONE = 1,
|
|
||||||
AEK_CRC = 1 << 1, // FEAT_CRC32
|
|
||||||
AEK_CRYPTO = 1 << 2,
|
|
||||||
AEK_FP = 1 << 3, // FEAT_FP
|
|
||||||
AEK_SIMD = 1 << 4, // FEAT_AdvSIMD
|
|
||||||
AEK_FP16 = 1 << 5, // FEAT_FP16
|
|
||||||
AEK_PROFILE = 1 << 6, // FEAT_SPE
|
|
||||||
AEK_RAS = 1 << 7, // FEAT_RAS, FEAT_RASv1p1
|
|
||||||
AEK_LSE = 1 << 8, // FEAT_LSE
|
|
||||||
AEK_SVE = 1 << 9, // FEAT_SVE
|
|
||||||
AEK_DOTPROD = 1 << 10, // FEAT_DotProd
|
|
||||||
AEK_RCPC = 1 << 11, // FEAT_LRCPC
|
|
||||||
AEK_RDM = 1 << 12, // FEAT_RDM
|
|
||||||
AEK_SM4 = 1 << 13, // FEAT_SM4, FEAT_SM3
|
|
||||||
AEK_SHA3 = 1 << 14, // FEAT_SHA3, FEAT_SHA512
|
|
||||||
AEK_SHA2 = 1 << 15, // FEAT_SHA1, FEAT_SHA256
|
|
||||||
AEK_AES = 1 << 16, // FEAT_AES, FEAT_PMULL
|
|
||||||
AEK_FP16FML = 1 << 17, // FEAT_FHM
|
|
||||||
AEK_RAND = 1 << 18, // FEAT_RNG
|
|
||||||
AEK_MTE = 1 << 19, // FEAT_MTE, FEAT_MTE2
|
|
||||||
AEK_SSBS = 1 << 20, // FEAT_SSBS, FEAT_SSBS2
|
|
||||||
AEK_SB = 1 << 21, // FEAT_SB
|
|
||||||
AEK_PREDRES = 1 << 22, // FEAT_SPECRES
|
|
||||||
AEK_SVE2 = 1 << 23, // FEAT_SVE2
|
|
||||||
AEK_SVE2AES = 1 << 24, // FEAT_SVE_AES, FEAT_SVE_PMULL128
|
|
||||||
AEK_SVE2SM4 = 1 << 25, // FEAT_SVE_SM4
|
|
||||||
AEK_SVE2SHA3 = 1 << 26, // FEAT_SVE_SHA3
|
|
||||||
AEK_SVE2BITPERM = 1 << 27, // FEAT_SVE_BitPerm
|
|
||||||
AEK_TME = 1 << 28, // FEAT_TME
|
|
||||||
AEK_BF16 = 1 << 29, // FEAT_BF16
|
|
||||||
AEK_I8MM = 1 << 30, // FEAT_I8MM
|
|
||||||
AEK_F32MM = 1ULL << 31, // FEAT_F32MM
|
|
||||||
AEK_F64MM = 1ULL << 32, // FEAT_F64MM
|
|
||||||
AEK_LS64 = 1ULL << 33, // FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA
|
|
||||||
AEK_BRBE = 1ULL << 34, // FEAT_BRBE
|
|
||||||
AEK_PAUTH = 1ULL << 35, // FEAT_PAuth
|
|
||||||
AEK_FLAGM = 1ULL << 36, // FEAT_FlagM
|
|
||||||
AEK_SME = 1ULL << 37, // FEAT_SME
|
|
||||||
AEK_SMEF64F64 = 1ULL << 38, // FEAT_SME_F64F64
|
|
||||||
AEK_SMEI16I64 = 1ULL << 39, // FEAT_SME_I16I64
|
|
||||||
AEK_HBC = 1ULL << 40, // FEAT_HBC
|
|
||||||
AEK_MOPS = 1ULL << 41, // FEAT_MOPS
|
|
||||||
AEK_PERFMON = 1ULL << 42, // FEAT_PMUv3
|
|
||||||
AEK_SME2 = 1ULL << 43, // FEAT_SME2
|
|
||||||
AEK_SVE2p1 = 1ULL << 44, // FEAT_SVE2p1
|
|
||||||
AEK_SME2p1 = 1ULL << 45, // FEAT_SME2p1
|
|
||||||
AEK_B16B16 = 1ULL << 46, // FEAT_B16B16
|
|
||||||
AEK_SMEF16F16 = 1ULL << 47, // FEAT_SMEF16F16
|
|
||||||
AEK_CSSC = 1ULL << 48, // FEAT_CSSC
|
|
||||||
AEK_RCPC3 = 1ULL << 49, // FEAT_LRCPC3
|
|
||||||
AEK_THE = 1ULL << 50, // FEAT_THE
|
|
||||||
AEK_D128 = 1ULL << 51, // FEAT_D128
|
|
||||||
AEK_LSE128 = 1ULL << 52, // FEAT_LSE128
|
|
||||||
AEK_SPECRES2 = 1ULL << 53, // FEAT_SPECRES2
|
|
||||||
AEK_RASv2 = 1ULL << 54, // FEAT_RASv2
|
|
||||||
};
|
|
||||||
// clang-format on
|
|
||||||
|
|
||||||
enum class ArchKind {
|
|
||||||
#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) ID,
|
|
||||||
#include "AArch64TargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
struct ArchNames {
|
|
||||||
StringRef Name;
|
|
||||||
StringRef ArchFeature;
|
|
||||||
uint64_t ArchBaseExtensions;
|
|
||||||
ArchKind ID;
|
|
||||||
|
|
||||||
// Return ArchFeature without the leading "+".
|
|
||||||
StringRef getSubArch() const { return ArchFeature.substr(1); }
|
|
||||||
};
|
|
||||||
|
|
||||||
const ArchNames AArch64ARCHNames[] = {
|
|
||||||
#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) \
|
|
||||||
{NAME, ARCH_FEATURE, ARCH_BASE_EXT, AArch64::ArchKind::ID},
|
|
||||||
#include "AArch64TargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of Arch Extension names.
|
|
||||||
struct ExtName {
|
|
||||||
StringRef Name;
|
|
||||||
uint64_t ID;
|
|
||||||
StringRef Feature;
|
|
||||||
StringRef NegFeature;
|
|
||||||
};
|
|
||||||
|
|
||||||
const ExtName AArch64ARCHExtNames[] = {
|
|
||||||
#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
|
|
||||||
{NAME, ID, FEATURE, NEGFEATURE},
|
|
||||||
#include "AArch64TargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of CPU names and their arches.
|
|
||||||
// The same CPU can have multiple arches and can be default on multiple arches.
|
|
||||||
// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
|
|
||||||
// When this becomes table-generated, we'd probably need two tables.
|
|
||||||
struct CpuNames {
|
|
||||||
StringRef Name;
|
|
||||||
ArchKind ArchID;
|
|
||||||
uint64_t DefaultExtensions;
|
|
||||||
};
|
|
||||||
|
|
||||||
const CpuNames AArch64CPUNames[] = {
|
|
||||||
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) \
|
|
||||||
{NAME, AArch64::ArchKind::ID, DEFAULT_EXT},
|
|
||||||
#include "AArch64TargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
const struct {
|
|
||||||
StringRef Alias;
|
|
||||||
StringRef Name;
|
|
||||||
} AArch64CPUAliases[] = {
|
|
||||||
#define AARCH64_CPU_ALIAS(ALIAS, NAME) {ALIAS, NAME},
|
|
||||||
#include "AArch64TargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
const ArchKind ArchKinds[] = {
|
|
||||||
#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) ArchKind::ID,
|
|
||||||
#include "AArch64TargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
inline ArchKind &operator--(ArchKind &Kind) {
|
|
||||||
if ((Kind == ArchKind::INVALID) || (Kind == ArchKind::ARMV8A) ||
|
|
||||||
(Kind == ArchKind::ARMV9A) || (Kind == ArchKind::ARMV8R))
|
|
||||||
Kind = ArchKind::INVALID;
|
|
||||||
else {
|
|
||||||
unsigned KindAsInteger = static_cast<unsigned>(Kind);
|
|
||||||
Kind = static_cast<ArchKind>(--KindAsInteger);
|
|
||||||
}
|
|
||||||
return Kind;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool getExtensionFeatures(uint64_t Extensions,
|
|
||||||
std::vector<StringRef> &Features);
|
|
||||||
StringRef getArchFeature(ArchKind AK);
|
|
||||||
|
|
||||||
StringRef getArchName(ArchKind AK);
|
|
||||||
StringRef getSubArch(ArchKind AK);
|
|
||||||
StringRef getArchExtName(unsigned ArchExtKind);
|
|
||||||
StringRef getArchExtFeature(StringRef ArchExt);
|
|
||||||
ArchKind convertV9toV8(ArchKind AK);
|
|
||||||
StringRef resolveCPUAlias(StringRef CPU);
|
|
||||||
|
|
||||||
// Information by Name
|
|
||||||
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
|
|
||||||
ArchKind getCPUArchKind(StringRef CPU);
|
|
||||||
ArchKind getSubArchArchKind(StringRef SubArch);
|
|
||||||
|
|
||||||
// Parser
|
|
||||||
ArchKind parseArch(StringRef Arch);
|
|
||||||
ArchExtKind parseArchExt(StringRef ArchExt);
|
|
||||||
ArchKind parseCPUArch(StringRef CPU);
|
|
||||||
// Used by target parser tests
|
|
||||||
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
|
|
||||||
|
|
||||||
bool isX18ReservedByDefault(const Triple &TT);
|
|
||||||
|
|
||||||
} // namespace AArch64
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,265 +1,15 @@
|
|||||||
//===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
|
//===-- llvm/Support/ARMTargetParser.h --------------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file implements a target parser to recognise ARM hardware features
|
/// \file
|
||||||
// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
|
/// This header is deprecated in favour of
|
||||||
//
|
/// `llvm/TargetParser/ARMTargetParser.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
|
#include "llvm/TargetParser/ARMTargetParser.h"
|
||||||
#define LLVM_SUPPORT_ARMTARGETPARSER_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/StringRef.h"
|
|
||||||
#include "llvm/Support/ARMBuildAttributes.h"
|
|
||||||
#include "llvm/Support/ARMTargetParserCommon.h"
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
|
|
||||||
class Triple;
|
|
||||||
|
|
||||||
namespace ARM {
|
|
||||||
|
|
||||||
// Arch extension modifiers for CPUs.
|
|
||||||
// Note that this is not the same as the AArch64 list
|
|
||||||
enum ArchExtKind : uint64_t {
|
|
||||||
AEK_INVALID = 0,
|
|
||||||
AEK_NONE = 1,
|
|
||||||
AEK_CRC = 1 << 1,
|
|
||||||
AEK_CRYPTO = 1 << 2,
|
|
||||||
AEK_FP = 1 << 3,
|
|
||||||
AEK_HWDIVTHUMB = 1 << 4,
|
|
||||||
AEK_HWDIVARM = 1 << 5,
|
|
||||||
AEK_MP = 1 << 6,
|
|
||||||
AEK_SIMD = 1 << 7,
|
|
||||||
AEK_SEC = 1 << 8,
|
|
||||||
AEK_VIRT = 1 << 9,
|
|
||||||
AEK_DSP = 1 << 10,
|
|
||||||
AEK_FP16 = 1 << 11,
|
|
||||||
AEK_RAS = 1 << 12,
|
|
||||||
AEK_DOTPROD = 1 << 13,
|
|
||||||
AEK_SHA2 = 1 << 14,
|
|
||||||
AEK_AES = 1 << 15,
|
|
||||||
AEK_FP16FML = 1 << 16,
|
|
||||||
AEK_SB = 1 << 17,
|
|
||||||
AEK_FP_DP = 1 << 18,
|
|
||||||
AEK_LOB = 1 << 19,
|
|
||||||
AEK_BF16 = 1 << 20,
|
|
||||||
AEK_I8MM = 1 << 21,
|
|
||||||
AEK_CDECP0 = 1 << 22,
|
|
||||||
AEK_CDECP1 = 1 << 23,
|
|
||||||
AEK_CDECP2 = 1 << 24,
|
|
||||||
AEK_CDECP3 = 1 << 25,
|
|
||||||
AEK_CDECP4 = 1 << 26,
|
|
||||||
AEK_CDECP5 = 1 << 27,
|
|
||||||
AEK_CDECP6 = 1 << 28,
|
|
||||||
AEK_CDECP7 = 1 << 29,
|
|
||||||
AEK_PACBTI = 1 << 30,
|
|
||||||
// Unsupported extensions.
|
|
||||||
AEK_OS = 1ULL << 59,
|
|
||||||
AEK_IWMMXT = 1ULL << 60,
|
|
||||||
AEK_IWMMXT2 = 1ULL << 61,
|
|
||||||
AEK_MAVERICK = 1ULL << 62,
|
|
||||||
AEK_XSCALE = 1ULL << 63,
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of Arch Extension names.
|
|
||||||
struct ExtName {
|
|
||||||
StringRef Name;
|
|
||||||
uint64_t ID;
|
|
||||||
StringRef Feature;
|
|
||||||
StringRef NegFeature;
|
|
||||||
};
|
|
||||||
|
|
||||||
const ExtName ARCHExtNames[] = {
|
|
||||||
#define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
|
|
||||||
{NAME, ID, FEATURE, NEGFEATURE},
|
|
||||||
#include "ARMTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of HWDiv names (use getHWDivSynonym) and which architectural
|
|
||||||
// features they correspond to (use getHWDivFeatures).
|
|
||||||
const struct {
|
|
||||||
StringRef Name;
|
|
||||||
uint64_t ID;
|
|
||||||
} HWDivNames[] = {
|
|
||||||
#define ARM_HW_DIV_NAME(NAME, ID) {NAME, ID},
|
|
||||||
#include "ARMTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// Arch names.
|
|
||||||
enum class ArchKind {
|
|
||||||
#define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \
|
|
||||||
ARCH_BASE_EXT) \
|
|
||||||
ID,
|
|
||||||
#include "ARMTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of CPU names and their arches.
|
|
||||||
// The same CPU can have multiple arches and can be default on multiple arches.
|
|
||||||
// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
|
|
||||||
// When this becomes table-generated, we'd probably need two tables.
|
|
||||||
struct CpuNames {
|
|
||||||
StringRef Name;
|
|
||||||
ArchKind ArchID;
|
|
||||||
bool Default; // is $Name the default CPU for $ArchID ?
|
|
||||||
uint64_t DefaultExtensions;
|
|
||||||
};
|
|
||||||
|
|
||||||
const CpuNames CPUNames[] = {
|
|
||||||
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
|
|
||||||
{NAME, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
|
|
||||||
#include "ARMTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// FPU names.
|
|
||||||
enum FPUKind {
|
|
||||||
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
|
|
||||||
#include "ARMTargetParser.def"
|
|
||||||
FK_LAST
|
|
||||||
};
|
|
||||||
|
|
||||||
// FPU Version
|
|
||||||
enum class FPUVersion {
|
|
||||||
NONE,
|
|
||||||
VFPV2,
|
|
||||||
VFPV3,
|
|
||||||
VFPV3_FP16,
|
|
||||||
VFPV4,
|
|
||||||
VFPV5,
|
|
||||||
VFPV5_FULLFP16,
|
|
||||||
};
|
|
||||||
|
|
||||||
// An FPU name restricts the FPU in one of three ways:
|
|
||||||
enum class FPURestriction {
|
|
||||||
None = 0, ///< No restriction
|
|
||||||
D16, ///< Only 16 D registers
|
|
||||||
SP_D16 ///< Only single-precision instructions, with 16 D registers
|
|
||||||
};
|
|
||||||
|
|
||||||
// An FPU name implies one of three levels of Neon support:
|
|
||||||
enum class NeonSupportLevel {
|
|
||||||
None = 0, ///< No Neon
|
|
||||||
Neon, ///< Neon
|
|
||||||
Crypto ///< Neon with Crypto
|
|
||||||
};
|
|
||||||
|
|
||||||
// v6/v7/v8 Profile
|
|
||||||
enum class ProfileKind { INVALID = 0, A, R, M };
|
|
||||||
|
|
||||||
// List of canonical FPU names (use getFPUSynonym) and which architectural
|
|
||||||
// features they correspond to (use getFPUFeatures).
|
|
||||||
// The entries must appear in the order listed in ARM::FPUKind for correct
|
|
||||||
// indexing
|
|
||||||
struct FPUName {
|
|
||||||
StringRef Name;
|
|
||||||
FPUKind ID;
|
|
||||||
FPUVersion FPUVer;
|
|
||||||
NeonSupportLevel NeonSupport;
|
|
||||||
FPURestriction Restriction;
|
|
||||||
};
|
|
||||||
|
|
||||||
static const FPUName FPUNames[] = {
|
|
||||||
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
|
|
||||||
{NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
|
|
||||||
#include "llvm/Support/ARMTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of canonical arch names (use getArchSynonym).
|
|
||||||
// This table also provides the build attribute fields for CPU arch
|
|
||||||
// and Arch ID, according to the Addenda to the ARM ABI, chapters
|
|
||||||
// 2.4 and 2.3.5.2 respectively.
|
|
||||||
// FIXME: SubArch values were simplified to fit into the expectations
|
|
||||||
// of the triples and are not conforming with their official names.
|
|
||||||
// Check to see if the expectation should be changed.
|
|
||||||
struct ArchNames {
|
|
||||||
StringRef Name;
|
|
||||||
StringRef CPUAttr; // CPU class in build attributes.
|
|
||||||
StringRef ArchFeature;
|
|
||||||
unsigned DefaultFPU;
|
|
||||||
uint64_t ArchBaseExtensions;
|
|
||||||
ArchKind ID;
|
|
||||||
ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
|
|
||||||
|
|
||||||
// Return ArchFeature without the leading "+".
|
|
||||||
StringRef getSubArch() const { return ArchFeature.substr(1); }
|
|
||||||
};
|
|
||||||
|
|
||||||
static const ArchNames ARMArchNames[] = {
|
|
||||||
#define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \
|
|
||||||
ARCH_BASE_EXT) \
|
|
||||||
{NAME, CPU_ATTR, ARCH_FEATURE, ARCH_FPU, \
|
|
||||||
ARCH_BASE_EXT, ArchKind::ID, ARCH_ATTR},
|
|
||||||
#include "llvm/Support/ARMTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
inline ArchKind &operator--(ArchKind &Kind) {
|
|
||||||
assert((Kind >= ArchKind::ARMV8A && Kind <= ArchKind::ARMV9_3A) &&
|
|
||||||
"We only expect operator-- to be called with ARMV8/V9");
|
|
||||||
if (Kind == ArchKind::INVALID || Kind == ArchKind::ARMV8A ||
|
|
||||||
Kind == ArchKind::ARMV8_1A || Kind == ArchKind::ARMV9A ||
|
|
||||||
Kind == ArchKind::ARMV8R)
|
|
||||||
Kind = ArchKind::INVALID;
|
|
||||||
else {
|
|
||||||
unsigned KindAsInteger = static_cast<unsigned>(Kind);
|
|
||||||
Kind = static_cast<ArchKind>(--KindAsInteger);
|
|
||||||
}
|
|
||||||
return Kind;
|
|
||||||
}
|
|
||||||
|
|
||||||
// Information by ID
|
|
||||||
StringRef getFPUName(unsigned FPUKind);
|
|
||||||
FPUVersion getFPUVersion(unsigned FPUKind);
|
|
||||||
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
|
|
||||||
FPURestriction getFPURestriction(unsigned FPUKind);
|
|
||||||
|
|
||||||
bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
|
|
||||||
bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
|
|
||||||
bool getExtensionFeatures(uint64_t Extensions,
|
|
||||||
std::vector<StringRef> &Features);
|
|
||||||
|
|
||||||
StringRef getArchName(ArchKind AK);
|
|
||||||
unsigned getArchAttr(ArchKind AK);
|
|
||||||
StringRef getCPUAttr(ArchKind AK);
|
|
||||||
StringRef getSubArch(ArchKind AK);
|
|
||||||
StringRef getArchExtName(uint64_t ArchExtKind);
|
|
||||||
StringRef getArchExtFeature(StringRef ArchExt);
|
|
||||||
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
|
|
||||||
std::vector<StringRef> &Features,
|
|
||||||
unsigned &ArgFPUKind);
|
|
||||||
ArchKind convertV9toV8(ArchKind AK);
|
|
||||||
|
|
||||||
// Information by Name
|
|
||||||
unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
|
|
||||||
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
|
|
||||||
StringRef getDefaultCPU(StringRef Arch);
|
|
||||||
StringRef getCanonicalArchName(StringRef Arch);
|
|
||||||
StringRef getFPUSynonym(StringRef FPU);
|
|
||||||
|
|
||||||
// Parser
|
|
||||||
uint64_t parseHWDiv(StringRef HWDiv);
|
|
||||||
unsigned parseFPU(StringRef FPU);
|
|
||||||
ArchKind parseArch(StringRef Arch);
|
|
||||||
uint64_t parseArchExt(StringRef ArchExt);
|
|
||||||
ArchKind parseCPUArch(StringRef CPU);
|
|
||||||
ProfileKind parseArchProfile(StringRef Arch);
|
|
||||||
unsigned parseArchVersion(StringRef Arch);
|
|
||||||
|
|
||||||
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
|
|
||||||
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
|
|
||||||
|
|
||||||
/// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
|
|
||||||
///
|
|
||||||
/// \param Arch the architecture name (e.g., "armv7s"). If it is an empty
|
|
||||||
/// string then the triple's arch name is used.
|
|
||||||
StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch = {});
|
|
||||||
|
|
||||||
} // namespace ARM
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,51 +1,15 @@
|
|||||||
//===---------------- ARMTargetParserCommon ---------------------*- C++ -*-===//
|
//===-- llvm/Support/ARMTargetParserCommon.def ------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// Code that is common to ARMTargetParser and AArch64TargetParser.
|
/// \file
|
||||||
//
|
/// This header is deprecated in favour of
|
||||||
|
/// `llvm/TargetParser/ARMTargetParserCommon.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_ARMTARGETPARSERCOMMON_H
|
#include "llvm/TargetParser/ARMTargetParserCommon.h"
|
||||||
#define LLVM_SUPPORT_ARMTARGETPARSERCOMMON_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/StringRef.h"
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
namespace ARM {
|
|
||||||
|
|
||||||
enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
|
|
||||||
|
|
||||||
enum class EndianKind { INVALID = 0, LITTLE, BIG };
|
|
||||||
|
|
||||||
/// Converts e.g. "armv8" -> "armv8-a"
|
|
||||||
StringRef getArchSynonym(StringRef Arch);
|
|
||||||
|
|
||||||
/// MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
|
|
||||||
/// (iwmmxt|xscale)(eb)? is also permitted. If the former, return
|
|
||||||
/// "v.+", if the latter, return unmodified string, minus 'eb'.
|
|
||||||
/// If invalid, return empty string.
|
|
||||||
StringRef getCanonicalArchName(StringRef Arch);
|
|
||||||
|
|
||||||
// ARM, Thumb, AArch64
|
|
||||||
ISAKind parseArchISA(StringRef Arch);
|
|
||||||
|
|
||||||
// Little/Big endian
|
|
||||||
EndianKind parseArchEndian(StringRef Arch);
|
|
||||||
|
|
||||||
struct ParsedBranchProtection {
|
|
||||||
StringRef Scope;
|
|
||||||
StringRef Key;
|
|
||||||
bool BranchTargetEnforcement;
|
|
||||||
};
|
|
||||||
|
|
||||||
bool parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,
|
|
||||||
StringRef &Err);
|
|
||||||
|
|
||||||
} // namespace ARM
|
|
||||||
} // namespace llvm
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,203 +1,15 @@
|
|||||||
//===-- CSKYTargetParser - Parser for CSKY target features --------*- C++
|
//===-- llvm/Support/CSKYTargetParser.h -------------------------*- C++ -*-===//
|
||||||
//-*-===//
|
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file implements a target parser to recognise CSKY hardware features
|
/// \file
|
||||||
// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
|
/// This header is deprecated in favour of
|
||||||
//
|
/// `llvm/TargetParser/CSKYTargetParser.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_CSKYTARGETPARSER_H
|
#include "llvm/TargetParser/CSKYTargetParser.h"
|
||||||
#define LLVM_SUPPORT_CSKYTARGETPARSER_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/Triple.h"
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
class StringRef;
|
|
||||||
|
|
||||||
namespace CSKY {
|
|
||||||
|
|
||||||
// Arch extension modifiers for CPUs.
|
|
||||||
enum ArchExtKind : uint64_t {
|
|
||||||
AEK_INVALID = 0,
|
|
||||||
AEK_NONE = 1,
|
|
||||||
AEK_FPUV2SF = 1 << 1,
|
|
||||||
AEK_FPUV2DF = 1 << 2,
|
|
||||||
AEK_FDIVDU = 1 << 3,
|
|
||||||
AEK_FPUV3HI = 1 << 4,
|
|
||||||
AEK_FPUV3HF = 1 << 5,
|
|
||||||
AEK_FPUV3SF = 1 << 6,
|
|
||||||
AEK_FPUV3DF = 1 << 7,
|
|
||||||
AEK_FLOATE1 = 1 << 8,
|
|
||||||
AEK_FLOAT1E2 = 1 << 9,
|
|
||||||
AEK_FLOAT1E3 = 1 << 10,
|
|
||||||
AEK_FLOAT3E4 = 1 << 11,
|
|
||||||
AEK_FLOAT7E60 = 1 << 12,
|
|
||||||
AEK_HWDIV = 1 << 13,
|
|
||||||
AEK_STLD = 1 << 14,
|
|
||||||
AEK_PUSHPOP = 1 << 15,
|
|
||||||
AEK_EDSP = 1 << 16,
|
|
||||||
AEK_DSP1E2 = 1 << 17,
|
|
||||||
AEK_DSPE60 = 1 << 18,
|
|
||||||
AEK_DSPV2 = 1 << 19,
|
|
||||||
AEK_DSPSILAN = 1 << 20,
|
|
||||||
AEK_ELRW = 1 << 21,
|
|
||||||
AEK_TRUST = 1 << 22,
|
|
||||||
AEK_JAVA = 1 << 23,
|
|
||||||
AEK_CACHE = 1 << 24,
|
|
||||||
AEK_NVIC = 1 << 25,
|
|
||||||
AEK_DOLOOP = 1 << 26,
|
|
||||||
AEK_HIGHREG = 1 << 27,
|
|
||||||
AEK_SMART = 1 << 28,
|
|
||||||
AEK_VDSP2E3 = 1 << 29,
|
|
||||||
AEK_VDSP2E60F = 1 << 30,
|
|
||||||
AEK_VDSPV2 = 1ULL << 31,
|
|
||||||
AEK_HARDTP = 1ULL << 32,
|
|
||||||
AEK_SOFTTP = 1ULL << 33,
|
|
||||||
AEK_ISTACK = 1ULL << 34,
|
|
||||||
AEK_CONSTPOOL = 1ULL << 35,
|
|
||||||
AEK_STACKSIZE = 1ULL << 36,
|
|
||||||
AEK_CCRT = 1ULL << 37,
|
|
||||||
AEK_VDSPV1 = 1ULL << 38,
|
|
||||||
AEK_E1 = 1ULL << 39,
|
|
||||||
AEK_E2 = 1ULL << 40,
|
|
||||||
AEK_2E3 = 1ULL << 41,
|
|
||||||
AEK_MP = 1ULL << 42,
|
|
||||||
AEK_3E3R1 = 1ULL << 43,
|
|
||||||
AEK_3E3R2 = 1ULL << 44,
|
|
||||||
AEK_3E3R3 = 1ULL << 45,
|
|
||||||
AEK_3E7 = 1ULL << 46,
|
|
||||||
AEK_MP1E2 = 1ULL << 47,
|
|
||||||
AEK_7E10 = 1ULL << 48,
|
|
||||||
AEK_10E60 = 1ULL << 49
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
// Arch extension modifiers for CPUs.
|
|
||||||
enum MultiArchExtKind : uint64_t {
|
|
||||||
MAEK_E1 = CSKY::AEK_E1 | CSKY::AEK_ELRW,
|
|
||||||
MAEK_E2 = CSKY::AEK_E2 | CSKY::MAEK_E1,
|
|
||||||
MAEK_2E3 = CSKY::AEK_2E3 | CSKY::MAEK_E2,
|
|
||||||
MAEK_MP = CSKY::AEK_MP | CSKY::MAEK_2E3,
|
|
||||||
MAEK_3E3R1 = CSKY::AEK_3E3R1,
|
|
||||||
MAEK_3E3R2 = CSKY::AEK_3E3R1 | CSKY::AEK_3E3R2 | CSKY::AEK_DOLOOP,
|
|
||||||
MAEK_3E7 = CSKY::AEK_3E7 | CSKY::MAEK_2E3,
|
|
||||||
MAEK_MP1E2 = CSKY::AEK_MP1E2 | CSKY::MAEK_3E7,
|
|
||||||
MAEK_7E10 = CSKY::AEK_7E10 | CSKY::MAEK_3E7,
|
|
||||||
MAEK_10E60 = CSKY::AEK_10E60 | CSKY::MAEK_7E10,
|
|
||||||
};
|
|
||||||
// FPU names.
|
|
||||||
enum CSKYFPUKind {
|
|
||||||
#define CSKY_FPU(NAME, KIND, VERSION) KIND,
|
|
||||||
#include "CSKYTargetParser.def"
|
|
||||||
FK_LAST
|
|
||||||
};
|
|
||||||
|
|
||||||
// FPU Version
|
|
||||||
enum class FPUVersion {
|
|
||||||
NONE,
|
|
||||||
FPV2,
|
|
||||||
FPV3,
|
|
||||||
};
|
|
||||||
|
|
||||||
// Arch names.
|
|
||||||
enum class ArchKind {
|
|
||||||
#define CSKY_ARCH(NAME, ID, ARCH_BASE_EXT) ID,
|
|
||||||
#include "CSKYTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of Arch Extension names.
|
|
||||||
// FIXME: TableGen this.
|
|
||||||
struct ExtName {
|
|
||||||
const char *NameCStr;
|
|
||||||
size_t NameLength;
|
|
||||||
uint64_t ID;
|
|
||||||
const char *Feature;
|
|
||||||
const char *NegFeature;
|
|
||||||
|
|
||||||
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
|
||||||
};
|
|
||||||
|
|
||||||
const CSKY::ExtName CSKYARCHExtNames[] = {
|
|
||||||
#define CSKY_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
|
|
||||||
{NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
|
|
||||||
#include "CSKYTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of CPU names and their arches.
|
|
||||||
template <typename T> struct CpuNames {
|
|
||||||
const char *NameCStr;
|
|
||||||
size_t NameLength;
|
|
||||||
T ArchID;
|
|
||||||
uint64_t defaultExt;
|
|
||||||
|
|
||||||
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
|
||||||
};
|
|
||||||
const CpuNames<CSKY::ArchKind> CPUNames[] = {
|
|
||||||
#define CSKY_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT) \
|
|
||||||
{NAME, sizeof(NAME) - 1, CSKY::ArchKind::ARCH_ID, DEFAULT_EXT},
|
|
||||||
#include "llvm/Support/CSKYTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// FIXME: TableGen this.
|
|
||||||
// The entries must appear in the order listed in CSKY::CSKYFPUKind for correct
|
|
||||||
// indexing
|
|
||||||
struct FPUName {
|
|
||||||
const char *NameCStr;
|
|
||||||
size_t NameLength;
|
|
||||||
CSKYFPUKind ID;
|
|
||||||
FPUVersion FPUVer;
|
|
||||||
|
|
||||||
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
|
||||||
};
|
|
||||||
|
|
||||||
static const FPUName FPUNames[] = {
|
|
||||||
#define CSKY_FPU(NAME, KIND, VERSION) {NAME, sizeof(NAME) - 1, KIND, VERSION},
|
|
||||||
#include "llvm/Support/CSKYTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
// List of canonical arch names.
|
|
||||||
template <typename T> struct ArchNames {
|
|
||||||
const char *NameCStr;
|
|
||||||
size_t NameLength;
|
|
||||||
T ID;
|
|
||||||
uint64_t archBaseExt;
|
|
||||||
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
|
||||||
};
|
|
||||||
const ArchNames<CSKY::ArchKind> ARCHNames[] = {
|
|
||||||
#define CSKY_ARCH(NAME, ID, ARCH_BASE_EXT) \
|
|
||||||
{NAME, sizeof(NAME) - 1, CSKY::ArchKind::ID, ARCH_BASE_EXT},
|
|
||||||
#include "llvm/Support/CSKYTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
StringRef getArchName(ArchKind AK);
|
|
||||||
StringRef getDefaultCPU(StringRef Arch);
|
|
||||||
StringRef getArchExtName(uint64_t ArchExtKind);
|
|
||||||
StringRef getArchExtFeature(StringRef ArchExt);
|
|
||||||
uint64_t getDefaultExtensions(StringRef CPU);
|
|
||||||
bool getExtensionFeatures(uint64_t Extensions,
|
|
||||||
std::vector<StringRef> &Features);
|
|
||||||
|
|
||||||
// Information by ID
|
|
||||||
StringRef getFPUName(unsigned FPUKind);
|
|
||||||
FPUVersion getFPUVersion(unsigned FPUKind);
|
|
||||||
|
|
||||||
bool getFPUFeatures(CSKYFPUKind Kind, std::vector<StringRef> &Features);
|
|
||||||
|
|
||||||
// Parser
|
|
||||||
ArchKind parseArch(StringRef Arch);
|
|
||||||
ArchKind parseCPUArch(StringRef CPU);
|
|
||||||
uint64_t parseArchExt(StringRef ArchExt);
|
|
||||||
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
|
|
||||||
|
|
||||||
} // namespace CSKY
|
|
||||||
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,88 +1,14 @@
|
|||||||
//===- llvm/Support/Host.h - Host machine characteristics --------*- C++ -*-===//
|
//===-- llvm/Support/Host.h -------------------------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// Methods for querying the nature of the host machine.
|
/// \file
|
||||||
//
|
/// This header is deprecated in favour of `llvm/TargetParser/Host.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_HOST_H
|
#include "llvm/TargetParser/Host.h"
|
||||||
#define LLVM_SUPPORT_HOST_H
|
|
||||||
|
|
||||||
#include <string>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
class MallocAllocator;
|
|
||||||
class StringRef;
|
|
||||||
template <typename ValueTy, typename AllocatorTy> class StringMap;
|
|
||||||
class raw_ostream;
|
|
||||||
|
|
||||||
namespace sys {
|
|
||||||
|
|
||||||
/// getDefaultTargetTriple() - Return the default target triple the compiler
|
|
||||||
/// has been configured to produce code for.
|
|
||||||
///
|
|
||||||
/// The target triple is a string in the format of:
|
|
||||||
/// CPU_TYPE-VENDOR-OPERATING_SYSTEM
|
|
||||||
/// or
|
|
||||||
/// CPU_TYPE-VENDOR-KERNEL-OPERATING_SYSTEM
|
|
||||||
std::string getDefaultTargetTriple();
|
|
||||||
|
|
||||||
/// getProcessTriple() - Return an appropriate target triple for generating
|
|
||||||
/// code to be loaded into the current process, e.g. when using the JIT.
|
|
||||||
std::string getProcessTriple();
|
|
||||||
|
|
||||||
/// getHostCPUName - Get the LLVM name for the host CPU. The particular format
|
|
||||||
/// of the name is target dependent, and suitable for passing as -mcpu to the
|
|
||||||
/// target which matches the host.
|
|
||||||
///
|
|
||||||
/// \return - The host CPU name, or empty if the CPU could not be determined.
|
|
||||||
StringRef getHostCPUName();
|
|
||||||
|
|
||||||
/// getHostCPUFeatures - Get the LLVM names for the host CPU features.
|
|
||||||
/// The particular format of the names are target dependent, and suitable for
|
|
||||||
/// passing as -mattr to the target which matches the host.
|
|
||||||
///
|
|
||||||
/// \param Features - A string mapping feature names to either
|
|
||||||
/// true (if enabled) or false (if disabled). This routine makes no guarantees
|
|
||||||
/// about exactly which features may appear in this map, except that they are
|
|
||||||
/// all valid LLVM feature names.
|
|
||||||
///
|
|
||||||
/// \return - True on success.
|
|
||||||
bool getHostCPUFeatures(StringMap<bool, MallocAllocator> &Features);
|
|
||||||
|
|
||||||
/// This is a function compatible with cl::AddExtraVersionPrinter, which adds
|
|
||||||
/// info about the current target triple and detected CPU.
|
|
||||||
void printDefaultTargetAndDetectedCPU(raw_ostream &OS);
|
|
||||||
|
|
||||||
namespace detail {
|
|
||||||
/// Helper functions to extract HostCPUName from /proc/cpuinfo on linux.
|
|
||||||
StringRef getHostCPUNameForPowerPC(StringRef ProcCpuinfoContent);
|
|
||||||
StringRef getHostCPUNameForARM(StringRef ProcCpuinfoContent);
|
|
||||||
StringRef getHostCPUNameForS390x(StringRef ProcCpuinfoContent);
|
|
||||||
StringRef getHostCPUNameForRISCV(StringRef ProcCpuinfoContent);
|
|
||||||
StringRef getHostCPUNameForSPARC(StringRef ProcCpuinfoContent);
|
|
||||||
StringRef getHostCPUNameForBPF();
|
|
||||||
|
|
||||||
/// Helper functions to extract CPU details from CPUID on x86.
|
|
||||||
namespace x86 {
|
|
||||||
enum class VendorSignatures {
|
|
||||||
UNKNOWN,
|
|
||||||
GENUINE_INTEL,
|
|
||||||
AUTHENTIC_AMD,
|
|
||||||
};
|
|
||||||
|
|
||||||
/// Returns the host CPU's vendor.
|
|
||||||
/// MaxLeaf: if a non-nullptr pointer is specified, the EAX value will be
|
|
||||||
/// assigned to its pointee.
|
|
||||||
VendorSignatures getVendorSignature(unsigned *MaxLeaf = nullptr);
|
|
||||||
} // namespace x86
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,74 +1,15 @@
|
|||||||
//==-- LoongArch64TargetParser - Parser for LoongArch64 features --*- C++ -*-=//
|
//===-- llvm/Support/LoongArchTargetParser.h --------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file implements a target parser to recognise LoongArch hardware features
|
/// \file
|
||||||
// such as CPU/ARCH and extension names.
|
/// This header is deprecated in favour of
|
||||||
//
|
/// `llvm/TargetParser/LoongArchTargetParser.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_LOONGARCHTARGETPARSER_H
|
#include "llvm/TargetParser/LoongArchTargetParser.h"
|
||||||
#define LLVM_SUPPORT_LOONGARCHTARGETPARSER_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/Triple.h"
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
class StringRef;
|
|
||||||
|
|
||||||
namespace LoongArch {
|
|
||||||
|
|
||||||
enum FeatureKind : uint32_t {
|
|
||||||
FK_INVALID = 0,
|
|
||||||
FK_NONE = 1,
|
|
||||||
|
|
||||||
// 64-bit ISA is available.
|
|
||||||
FK_64BIT = 1 << 1,
|
|
||||||
|
|
||||||
// Single-precision floating-point instructions are available.
|
|
||||||
FK_FP32 = 1 << 2,
|
|
||||||
|
|
||||||
// Double-precision floating-point instructions are available.
|
|
||||||
FK_FP64 = 1 << 3,
|
|
||||||
|
|
||||||
// Loongson SIMD Extension is available.
|
|
||||||
FK_LSX = 1 << 4,
|
|
||||||
|
|
||||||
// Loongson Advanced SIMD Extension is available.
|
|
||||||
FK_LASX = 1 << 5,
|
|
||||||
|
|
||||||
// Loongson Binary Translation Extension is available.
|
|
||||||
FK_LBT = 1 << 6,
|
|
||||||
|
|
||||||
// Loongson Virtualization Extension is available.
|
|
||||||
FK_LVZ = 1 << 7,
|
|
||||||
};
|
|
||||||
|
|
||||||
struct FeatureInfo {
|
|
||||||
StringRef Name;
|
|
||||||
FeatureKind Kind;
|
|
||||||
};
|
|
||||||
|
|
||||||
enum class ArchKind {
|
|
||||||
#define LOONGARCH_ARCH(NAME, KIND, FEATURES) KIND,
|
|
||||||
#include "LoongArchTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
struct ArchInfo {
|
|
||||||
StringRef Name;
|
|
||||||
ArchKind Kind;
|
|
||||||
uint32_t Features;
|
|
||||||
};
|
|
||||||
|
|
||||||
ArchKind parseArch(StringRef Arch);
|
|
||||||
bool getArchFeatures(StringRef Arch, std::vector<StringRef> &Features);
|
|
||||||
|
|
||||||
} // namespace LoongArch
|
|
||||||
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif // LLVM_SUPPORT_LOONGARCHTARGETPARSER_H
|
|
||||||
|
|||||||
@ -1,107 +1,14 @@
|
|||||||
//===-- RISCVISAInfo.h - RISCV ISA Information ------*- C++ -*-===//
|
//===-- llvm/Support/RISCVISAInfo.h -----------------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
///
|
||||||
|
/// \file
|
||||||
|
/// This header is deprecated in favour of `llvm/Support/RISCVISAInfo.h`.
|
||||||
|
///
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_RISCVISAINFO_H
|
#include "llvm/TargetParser/RISCVISAInfo.h"
|
||||||
#define LLVM_SUPPORT_RISCVISAINFO_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/StringRef.h"
|
|
||||||
#include "llvm/Support/Error.h"
|
|
||||||
|
|
||||||
#include <map>
|
|
||||||
#include <string>
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
struct RISCVExtensionInfo {
|
|
||||||
std::string ExtName;
|
|
||||||
unsigned MajorVersion;
|
|
||||||
unsigned MinorVersion;
|
|
||||||
};
|
|
||||||
|
|
||||||
class RISCVISAInfo {
|
|
||||||
public:
|
|
||||||
RISCVISAInfo(const RISCVISAInfo &) = delete;
|
|
||||||
RISCVISAInfo &operator=(const RISCVISAInfo &) = delete;
|
|
||||||
|
|
||||||
static bool compareExtension(const std::string &LHS, const std::string &RHS);
|
|
||||||
|
|
||||||
/// Helper class for OrderedExtensionMap.
|
|
||||||
struct ExtensionComparator {
|
|
||||||
bool operator()(const std::string &LHS, const std::string &RHS) const {
|
|
||||||
return compareExtension(LHS, RHS);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/// OrderedExtensionMap is std::map, it's specialized to keep entries
|
|
||||||
/// in canonical order of extension.
|
|
||||||
typedef std::map<std::string, RISCVExtensionInfo, ExtensionComparator>
|
|
||||||
OrderedExtensionMap;
|
|
||||||
|
|
||||||
RISCVISAInfo(unsigned XLen, OrderedExtensionMap &Exts)
|
|
||||||
: XLen(XLen), FLen(0), MinVLen(0), MaxELen(0), MaxELenFp(0), Exts(Exts) {}
|
|
||||||
|
|
||||||
/// Parse RISCV ISA info from arch string.
|
|
||||||
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
|
|
||||||
parseArchString(StringRef Arch, bool EnableExperimentalExtension,
|
|
||||||
bool ExperimentalExtensionVersionCheck = true);
|
|
||||||
|
|
||||||
/// Parse RISCV ISA info from feature vector.
|
|
||||||
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
|
|
||||||
parseFeatures(unsigned XLen, const std::vector<std::string> &Features);
|
|
||||||
|
|
||||||
/// Convert RISCV ISA info to a feature vector.
|
|
||||||
void toFeatures(std::vector<StringRef> &Features,
|
|
||||||
std::function<StringRef(const Twine &)> StrAlloc) const;
|
|
||||||
|
|
||||||
const OrderedExtensionMap &getExtensions() const { return Exts; };
|
|
||||||
|
|
||||||
unsigned getXLen() const { return XLen; };
|
|
||||||
unsigned getFLen() const { return FLen; };
|
|
||||||
unsigned getMinVLen() const { return MinVLen; }
|
|
||||||
unsigned getMaxVLen() const { return 65536; }
|
|
||||||
unsigned getMaxELen() const { return MaxELen; }
|
|
||||||
unsigned getMaxELenFp() const { return MaxELenFp; }
|
|
||||||
|
|
||||||
bool hasExtension(StringRef Ext) const;
|
|
||||||
std::string toString() const;
|
|
||||||
std::vector<std::string> toFeatureVector() const;
|
|
||||||
StringRef computeDefaultABI() const;
|
|
||||||
|
|
||||||
static bool isSupportedExtensionFeature(StringRef Ext);
|
|
||||||
static bool isSupportedExtension(StringRef Ext);
|
|
||||||
static bool isSupportedExtension(StringRef Ext, unsigned MajorVersion,
|
|
||||||
unsigned MinorVersion);
|
|
||||||
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
|
|
||||||
postProcessAndChecking(std::unique_ptr<RISCVISAInfo> &&ISAInfo);
|
|
||||||
|
|
||||||
private:
|
|
||||||
RISCVISAInfo(unsigned XLen)
|
|
||||||
: XLen(XLen), FLen(0), MinVLen(0), MaxELen(0), MaxELenFp(0) {}
|
|
||||||
|
|
||||||
unsigned XLen;
|
|
||||||
unsigned FLen;
|
|
||||||
unsigned MinVLen;
|
|
||||||
unsigned MaxELen, MaxELenFp;
|
|
||||||
|
|
||||||
OrderedExtensionMap Exts;
|
|
||||||
|
|
||||||
void addExtension(StringRef ExtName, unsigned MajorVersion,
|
|
||||||
unsigned MinorVersion);
|
|
||||||
|
|
||||||
Error checkDependency();
|
|
||||||
|
|
||||||
void updateImplication();
|
|
||||||
void updateCombination();
|
|
||||||
void updateFLen();
|
|
||||||
void updateMinVLen();
|
|
||||||
void updateMaxELen();
|
|
||||||
};
|
|
||||||
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,187 +1,14 @@
|
|||||||
//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
|
//===-- llvm/Support/TargetParser.h -----------------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file implements a target parser to recognise hardware features such as
|
/// \file
|
||||||
// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
|
/// This header is deprecated in favour of `llvm/TargetParser/TargetParser.h`.
|
||||||
//
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_TARGETPARSER_H
|
#include "llvm/TargetParser/TargetParser.h"
|
||||||
#define LLVM_SUPPORT_TARGETPARSER_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/StringRef.h"
|
|
||||||
#include <cstdint>
|
|
||||||
// FIXME: vector is used because that's what clang uses for subtarget feature
|
|
||||||
// lists, but SmallVector would probably be better
|
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
|
|
||||||
template <typename T> class SmallVectorImpl;
|
|
||||||
class Triple;
|
|
||||||
|
|
||||||
// Target specific information in their own namespaces.
|
|
||||||
// (ARM/AArch64/X86 are declared in ARM/AArch64/X86TargetParser.h)
|
|
||||||
// These should be generated from TableGen because the information is already
|
|
||||||
// there, and there is where new information about targets will be added.
|
|
||||||
// FIXME: To TableGen this we need to make some table generated files available
|
|
||||||
// even if the back-end is not compiled with LLVM, plus we need to create a new
|
|
||||||
// back-end to TableGen to create these clean tables.
|
|
||||||
namespace AMDGPU {
|
|
||||||
|
|
||||||
/// GPU kinds supported by the AMDGPU target.
|
|
||||||
enum GPUKind : uint32_t {
|
|
||||||
// Not specified processor.
|
|
||||||
GK_NONE = 0,
|
|
||||||
|
|
||||||
// R600-based processors.
|
|
||||||
GK_R600 = 1,
|
|
||||||
GK_R630 = 2,
|
|
||||||
GK_RS880 = 3,
|
|
||||||
GK_RV670 = 4,
|
|
||||||
GK_RV710 = 5,
|
|
||||||
GK_RV730 = 6,
|
|
||||||
GK_RV770 = 7,
|
|
||||||
GK_CEDAR = 8,
|
|
||||||
GK_CYPRESS = 9,
|
|
||||||
GK_JUNIPER = 10,
|
|
||||||
GK_REDWOOD = 11,
|
|
||||||
GK_SUMO = 12,
|
|
||||||
GK_BARTS = 13,
|
|
||||||
GK_CAICOS = 14,
|
|
||||||
GK_CAYMAN = 15,
|
|
||||||
GK_TURKS = 16,
|
|
||||||
|
|
||||||
GK_R600_FIRST = GK_R600,
|
|
||||||
GK_R600_LAST = GK_TURKS,
|
|
||||||
|
|
||||||
// AMDGCN-based processors.
|
|
||||||
GK_GFX600 = 32,
|
|
||||||
GK_GFX601 = 33,
|
|
||||||
GK_GFX602 = 34,
|
|
||||||
|
|
||||||
GK_GFX700 = 40,
|
|
||||||
GK_GFX701 = 41,
|
|
||||||
GK_GFX702 = 42,
|
|
||||||
GK_GFX703 = 43,
|
|
||||||
GK_GFX704 = 44,
|
|
||||||
GK_GFX705 = 45,
|
|
||||||
|
|
||||||
GK_GFX801 = 50,
|
|
||||||
GK_GFX802 = 51,
|
|
||||||
GK_GFX803 = 52,
|
|
||||||
GK_GFX805 = 53,
|
|
||||||
GK_GFX810 = 54,
|
|
||||||
|
|
||||||
GK_GFX900 = 60,
|
|
||||||
GK_GFX902 = 61,
|
|
||||||
GK_GFX904 = 62,
|
|
||||||
GK_GFX906 = 63,
|
|
||||||
GK_GFX908 = 64,
|
|
||||||
GK_GFX909 = 65,
|
|
||||||
GK_GFX90A = 66,
|
|
||||||
GK_GFX90C = 67,
|
|
||||||
GK_GFX940 = 68,
|
|
||||||
|
|
||||||
GK_GFX1010 = 71,
|
|
||||||
GK_GFX1011 = 72,
|
|
||||||
GK_GFX1012 = 73,
|
|
||||||
GK_GFX1013 = 74,
|
|
||||||
GK_GFX1030 = 75,
|
|
||||||
GK_GFX1031 = 76,
|
|
||||||
GK_GFX1032 = 77,
|
|
||||||
GK_GFX1033 = 78,
|
|
||||||
GK_GFX1034 = 79,
|
|
||||||
GK_GFX1035 = 80,
|
|
||||||
GK_GFX1036 = 81,
|
|
||||||
|
|
||||||
GK_GFX1100 = 90,
|
|
||||||
GK_GFX1101 = 91,
|
|
||||||
GK_GFX1102 = 92,
|
|
||||||
GK_GFX1103 = 93,
|
|
||||||
|
|
||||||
GK_AMDGCN_FIRST = GK_GFX600,
|
|
||||||
GK_AMDGCN_LAST = GK_GFX1103,
|
|
||||||
};
|
|
||||||
|
|
||||||
/// Instruction set architecture version.
|
|
||||||
struct IsaVersion {
|
|
||||||
unsigned Major;
|
|
||||||
unsigned Minor;
|
|
||||||
unsigned Stepping;
|
|
||||||
};
|
|
||||||
|
|
||||||
// This isn't comprehensive for now, just things that are needed from the
|
|
||||||
// frontend driver.
|
|
||||||
enum ArchFeatureKind : uint32_t {
|
|
||||||
FEATURE_NONE = 0,
|
|
||||||
|
|
||||||
// These features only exist for r600, and are implied true for amdgcn.
|
|
||||||
FEATURE_FMA = 1 << 1,
|
|
||||||
FEATURE_LDEXP = 1 << 2,
|
|
||||||
FEATURE_FP64 = 1 << 3,
|
|
||||||
|
|
||||||
// Common features.
|
|
||||||
FEATURE_FAST_FMA_F32 = 1 << 4,
|
|
||||||
FEATURE_FAST_DENORMAL_F32 = 1 << 5,
|
|
||||||
|
|
||||||
// Wavefront 32 is available.
|
|
||||||
FEATURE_WAVE32 = 1 << 6,
|
|
||||||
|
|
||||||
// Xnack is available.
|
|
||||||
FEATURE_XNACK = 1 << 7,
|
|
||||||
|
|
||||||
// Sram-ecc is available.
|
|
||||||
FEATURE_SRAMECC = 1 << 8,
|
|
||||||
};
|
|
||||||
|
|
||||||
StringRef getArchNameAMDGCN(GPUKind AK);
|
|
||||||
StringRef getArchNameR600(GPUKind AK);
|
|
||||||
StringRef getCanonicalArchName(const Triple &T, StringRef Arch);
|
|
||||||
GPUKind parseArchAMDGCN(StringRef CPU);
|
|
||||||
GPUKind parseArchR600(StringRef CPU);
|
|
||||||
unsigned getArchAttrAMDGCN(GPUKind AK);
|
|
||||||
unsigned getArchAttrR600(GPUKind AK);
|
|
||||||
|
|
||||||
void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
|
|
||||||
void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
|
|
||||||
|
|
||||||
IsaVersion getIsaVersion(StringRef GPU);
|
|
||||||
|
|
||||||
} // namespace AMDGPU
|
|
||||||
|
|
||||||
namespace RISCV {
|
|
||||||
|
|
||||||
// We use 64 bits as the known part in the scalable vector types.
|
|
||||||
static constexpr unsigned RVVBitsPerBlock = 64;
|
|
||||||
|
|
||||||
enum CPUKind : unsigned {
|
|
||||||
#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) CK_##ENUM,
|
|
||||||
#define TUNE_PROC(ENUM, NAME) CK_##ENUM,
|
|
||||||
#include "RISCVTargetParser.def"
|
|
||||||
};
|
|
||||||
|
|
||||||
enum FeatureKind : unsigned {
|
|
||||||
FK_INVALID = 0,
|
|
||||||
FK_NONE = 1,
|
|
||||||
FK_64BIT = 1 << 2,
|
|
||||||
};
|
|
||||||
|
|
||||||
bool checkCPUKind(CPUKind Kind, bool IsRV64);
|
|
||||||
bool checkTuneCPUKind(CPUKind Kind, bool IsRV64);
|
|
||||||
CPUKind parseCPUKind(StringRef CPU);
|
|
||||||
CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64);
|
|
||||||
StringRef getMArchFromMcpu(StringRef CPU);
|
|
||||||
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
|
|
||||||
void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
|
|
||||||
bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);
|
|
||||||
|
|
||||||
} // namespace RISCV
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -1,281 +1,15 @@
|
|||||||
//===- X86TargetParser.def - X86 target parsing defines ---------*- C++ -*-===//
|
//===-- llvm/Support/X86TargetParser.def ------------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file provides defines to build up the X86 target parser's logic.
|
/// \file
|
||||||
//
|
/// This header is deprecated in favour of
|
||||||
|
/// `llvm/TargetParser/X86TargetParser.def`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
// NOTE: NO INCLUDE GUARD DESIRED!
|
#include "llvm/TargetParser/X86TargetParser.def"
|
||||||
|
|
||||||
#ifndef X86_VENDOR
|
|
||||||
#define X86_VENDOR(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
X86_VENDOR(VENDOR_INTEL, "intel")
|
|
||||||
X86_VENDOR(VENDOR_AMD, "amd")
|
|
||||||
#undef X86_VENDOR
|
|
||||||
|
|
||||||
// This macro is used for cpu types present in compiler-rt/libgcc.
|
|
||||||
#ifndef X86_CPU_TYPE
|
|
||||||
#define X86_CPU_TYPE(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef X86_CPU_TYPE_ALIAS
|
|
||||||
#define X86_CPU_TYPE_ALIAS(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// This list must match what is implemented in libgcc and compilert-rt. Clang
|
|
||||||
// uses this to know how to implement __builtin_cpu_is.
|
|
||||||
X86_CPU_TYPE(INTEL_BONNELL, "bonnell")
|
|
||||||
X86_CPU_TYPE(INTEL_CORE2, "core2")
|
|
||||||
X86_CPU_TYPE(INTEL_COREI7, "corei7")
|
|
||||||
X86_CPU_TYPE(AMDFAM10H, "amdfam10h")
|
|
||||||
X86_CPU_TYPE(AMDFAM15H, "amdfam15h")
|
|
||||||
X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont")
|
|
||||||
X86_CPU_TYPE(INTEL_KNL, "knl")
|
|
||||||
X86_CPU_TYPE(AMD_BTVER1, "btver1")
|
|
||||||
X86_CPU_TYPE(AMD_BTVER2, "btver2")
|
|
||||||
X86_CPU_TYPE(AMDFAM17H, "amdfam17h")
|
|
||||||
X86_CPU_TYPE(INTEL_KNM, "knm")
|
|
||||||
X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont")
|
|
||||||
X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus")
|
|
||||||
X86_CPU_TYPE(INTEL_TREMONT, "tremont")
|
|
||||||
X86_CPU_TYPE(AMDFAM19H, "amdfam19h")
|
|
||||||
X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h")
|
|
||||||
X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest")
|
|
||||||
X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge")
|
|
||||||
|
|
||||||
// Alternate names supported by __builtin_cpu_is and target multiversioning.
|
|
||||||
X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom")
|
|
||||||
X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10")
|
|
||||||
X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15")
|
|
||||||
X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm")
|
|
||||||
|
|
||||||
#undef X86_CPU_TYPE_ALIAS
|
|
||||||
#undef X86_CPU_TYPE
|
|
||||||
|
|
||||||
// This macro is used for cpu subtypes present in compiler-rt/libgcc.
|
|
||||||
#ifndef X86_CPU_SUBTYPE
|
|
||||||
#define X86_CPU_SUBTYPE(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef X86_CPU_SUBTYPE_ALIAS
|
|
||||||
#define X86_CPU_SUBTYPE_ALIAS(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// This list must match what is implemented in libgcc and compilert-rt. Clang
|
|
||||||
// uses this to know how to implement __builtin_cpu_is.
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
|
|
||||||
X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui")
|
|
||||||
X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4")
|
|
||||||
X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids")
|
|
||||||
|
|
||||||
// Alternate names supported by __builtin_cpu_is and target multiversioning.
|
|
||||||
X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake")
|
|
||||||
X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "meteorlake")
|
|
||||||
|
|
||||||
#undef X86_CPU_SUBTYPE_ALIAS
|
|
||||||
#undef X86_CPU_SUBTYPE
|
|
||||||
|
|
||||||
// This macro is used for cpu types present in compiler-rt/libgcc. The third
|
|
||||||
// parameter PRIORITY is as required by the attribute 'target' checking. Note
|
|
||||||
// that not all are supported/prioritized by GCC, so synchronization with GCC's
|
|
||||||
// implementation may require changing some existing values.
|
|
||||||
//
|
|
||||||
// We cannot just re-sort the list though because its order is dictated by the
|
|
||||||
// order of bits in CodeGenFunction::GetX86CpuSupportsMask.
|
|
||||||
#ifndef X86_FEATURE_COMPAT
|
|
||||||
#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef X86_FEATURE
|
|
||||||
#define X86_FEATURE(ENUM, STR)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
X86_FEATURE_COMPAT(CMOV, "cmov", 0)
|
|
||||||
X86_FEATURE_COMPAT(MMX, "mmx", 1)
|
|
||||||
X86_FEATURE_COMPAT(POPCNT, "popcnt", 9)
|
|
||||||
X86_FEATURE_COMPAT(SSE, "sse", 2)
|
|
||||||
X86_FEATURE_COMPAT(SSE2, "sse2", 3)
|
|
||||||
X86_FEATURE_COMPAT(SSE3, "sse3", 4)
|
|
||||||
X86_FEATURE_COMPAT(SSSE3, "ssse3", 5)
|
|
||||||
X86_FEATURE_COMPAT(SSE4_1, "sse4.1", 7)
|
|
||||||
X86_FEATURE_COMPAT(SSE4_2, "sse4.2", 8)
|
|
||||||
X86_FEATURE_COMPAT(AVX, "avx", 12)
|
|
||||||
X86_FEATURE_COMPAT(AVX2, "avx2", 18)
|
|
||||||
X86_FEATURE_COMPAT(SSE4_A, "sse4a", 6)
|
|
||||||
X86_FEATURE_COMPAT(FMA4, "fma4", 14)
|
|
||||||
X86_FEATURE_COMPAT(XOP, "xop", 15)
|
|
||||||
X86_FEATURE_COMPAT(FMA, "fma", 16)
|
|
||||||
X86_FEATURE_COMPAT(AVX512F, "avx512f", 19)
|
|
||||||
X86_FEATURE_COMPAT(BMI, "bmi", 13)
|
|
||||||
X86_FEATURE_COMPAT(BMI2, "bmi2", 17)
|
|
||||||
X86_FEATURE_COMPAT(AES, "aes", 10)
|
|
||||||
X86_FEATURE_COMPAT(PCLMUL, "pclmul", 11)
|
|
||||||
X86_FEATURE_COMPAT(AVX512VL, "avx512vl", 20)
|
|
||||||
X86_FEATURE_COMPAT(AVX512BW, "avx512bw", 21)
|
|
||||||
X86_FEATURE_COMPAT(AVX512DQ, "avx512dq", 22)
|
|
||||||
X86_FEATURE_COMPAT(AVX512CD, "avx512cd", 23)
|
|
||||||
X86_FEATURE_COMPAT(AVX512ER, "avx512er", 24)
|
|
||||||
X86_FEATURE_COMPAT(AVX512PF, "avx512pf", 25)
|
|
||||||
X86_FEATURE_COMPAT(AVX512VBMI, "avx512vbmi", 26)
|
|
||||||
X86_FEATURE_COMPAT(AVX512IFMA, "avx512ifma", 27)
|
|
||||||
X86_FEATURE_COMPAT(AVX5124VNNIW, "avx5124vnniw", 28)
|
|
||||||
X86_FEATURE_COMPAT(AVX5124FMAPS, "avx5124fmaps", 29)
|
|
||||||
X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq", 30)
|
|
||||||
X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2", 31)
|
|
||||||
X86_FEATURE_COMPAT(GFNI, "gfni", 32)
|
|
||||||
X86_FEATURE_COMPAT(VPCLMULQDQ, "vpclmulqdq", 33)
|
|
||||||
X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni", 34)
|
|
||||||
X86_FEATURE_COMPAT(AVX512BITALG, "avx512bitalg", 35)
|
|
||||||
X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16", 36)
|
|
||||||
X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect", 37)
|
|
||||||
// Features below here are not in libgcc/compiler-rt.
|
|
||||||
X86_FEATURE (3DNOW, "3dnow")
|
|
||||||
X86_FEATURE (3DNOWA, "3dnowa")
|
|
||||||
X86_FEATURE (64BIT, "64bit")
|
|
||||||
X86_FEATURE (ADX, "adx")
|
|
||||||
X86_FEATURE (AMX_BF16, "amx-bf16")
|
|
||||||
X86_FEATURE (AMX_INT8, "amx-int8")
|
|
||||||
X86_FEATURE (AMX_TILE, "amx-tile")
|
|
||||||
X86_FEATURE (CLDEMOTE, "cldemote")
|
|
||||||
X86_FEATURE (CLFLUSHOPT, "clflushopt")
|
|
||||||
X86_FEATURE (CLWB, "clwb")
|
|
||||||
X86_FEATURE (CLZERO, "clzero")
|
|
||||||
X86_FEATURE (CMPXCHG16B, "cx16")
|
|
||||||
X86_FEATURE (CMPXCHG8B, "cx8")
|
|
||||||
X86_FEATURE (CRC32, "crc32")
|
|
||||||
X86_FEATURE (ENQCMD, "enqcmd")
|
|
||||||
X86_FEATURE (F16C, "f16c")
|
|
||||||
X86_FEATURE (FSGSBASE, "fsgsbase")
|
|
||||||
X86_FEATURE (FXSR, "fxsr")
|
|
||||||
X86_FEATURE (INVPCID, "invpcid")
|
|
||||||
X86_FEATURE (KL, "kl")
|
|
||||||
X86_FEATURE (WIDEKL, "widekl")
|
|
||||||
X86_FEATURE (LWP, "lwp")
|
|
||||||
X86_FEATURE (LZCNT, "lzcnt")
|
|
||||||
X86_FEATURE (MOVBE, "movbe")
|
|
||||||
X86_FEATURE (MOVDIR64B, "movdir64b")
|
|
||||||
X86_FEATURE (MOVDIRI, "movdiri")
|
|
||||||
X86_FEATURE (MWAITX, "mwaitx")
|
|
||||||
X86_FEATURE (PCONFIG, "pconfig")
|
|
||||||
X86_FEATURE (PKU, "pku")
|
|
||||||
X86_FEATURE (PREFETCHI, "prefetchi")
|
|
||||||
X86_FEATURE (PREFETCHWT1, "prefetchwt1")
|
|
||||||
X86_FEATURE (PRFCHW, "prfchw")
|
|
||||||
X86_FEATURE (PTWRITE, "ptwrite")
|
|
||||||
X86_FEATURE (RDPID, "rdpid")
|
|
||||||
X86_FEATURE (RDPRU, "rdpru")
|
|
||||||
X86_FEATURE (RDRND, "rdrnd")
|
|
||||||
X86_FEATURE (RDSEED, "rdseed")
|
|
||||||
X86_FEATURE (RTM, "rtm")
|
|
||||||
X86_FEATURE (SAHF, "sahf")
|
|
||||||
X86_FEATURE (SERIALIZE, "serialize")
|
|
||||||
X86_FEATURE (SGX, "sgx")
|
|
||||||
X86_FEATURE (SHA, "sha")
|
|
||||||
X86_FEATURE (SHSTK, "shstk")
|
|
||||||
X86_FEATURE (TBM, "tbm")
|
|
||||||
X86_FEATURE (TSXLDTRK, "tsxldtrk")
|
|
||||||
X86_FEATURE (UINTR, "uintr")
|
|
||||||
X86_FEATURE (VAES, "vaes")
|
|
||||||
X86_FEATURE (VZEROUPPER, "vzeroupper")
|
|
||||||
X86_FEATURE (WAITPKG, "waitpkg")
|
|
||||||
X86_FEATURE (WBNOINVD, "wbnoinvd")
|
|
||||||
X86_FEATURE (X87, "x87")
|
|
||||||
X86_FEATURE (XSAVE, "xsave")
|
|
||||||
X86_FEATURE (XSAVEC, "xsavec")
|
|
||||||
X86_FEATURE (XSAVEOPT, "xsaveopt")
|
|
||||||
X86_FEATURE (XSAVES, "xsaves")
|
|
||||||
X86_FEATURE (HRESET, "hreset")
|
|
||||||
X86_FEATURE (RAOINT, "raoint")
|
|
||||||
X86_FEATURE (AVX512FP16, "avx512fp16")
|
|
||||||
X86_FEATURE (AMX_FP16, "amx-fp16")
|
|
||||||
X86_FEATURE (CMPCCXADD, "cmpccxadd")
|
|
||||||
X86_FEATURE (AVXNECONVERT, "avxneconvert")
|
|
||||||
X86_FEATURE (AVXVNNI, "avxvnni")
|
|
||||||
X86_FEATURE (AVXIFMA, "avxifma")
|
|
||||||
X86_FEATURE (AVXVNNIINT8, "avxvnniint8")
|
|
||||||
// These features aren't really CPU features, but the frontend can set them.
|
|
||||||
X86_FEATURE (RETPOLINE_EXTERNAL_THUNK, "retpoline-external-thunk")
|
|
||||||
X86_FEATURE (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches")
|
|
||||||
X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls")
|
|
||||||
X86_FEATURE (LVI_CFI, "lvi-cfi")
|
|
||||||
X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening")
|
|
||||||
#undef X86_FEATURE_COMPAT
|
|
||||||
#undef X86_FEATURE
|
|
||||||
|
|
||||||
#ifndef CPU_SPECIFIC
|
|
||||||
#define CPU_SPECIFIC(NAME, TUNE_NAME, MANGLING, FEATURES)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef CPU_SPECIFIC_ALIAS
|
|
||||||
#define CPU_SPECIFIC_ALIAS(NEW_NAME, TUNE_NAME, NAME)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
CPU_SPECIFIC("generic", "generic", 'A', "")
|
|
||||||
CPU_SPECIFIC("pentium", "pentium", 'B', "")
|
|
||||||
CPU_SPECIFIC("pentium_pro", "pentiumpro", 'C', "+cmov")
|
|
||||||
CPU_SPECIFIC("pentium_mmx", "pentium-mmx", 'D', "+mmx")
|
|
||||||
CPU_SPECIFIC("pentium_ii", "pentium2", 'E', "+cmov,+mmx")
|
|
||||||
CPU_SPECIFIC("pentium_iii", "pentium3", 'H', "+cmov,+mmx,+sse")
|
|
||||||
CPU_SPECIFIC_ALIAS("pentium_iii_no_xmm_regs", "pentium3", "pentium_iii")
|
|
||||||
CPU_SPECIFIC("pentium_4", "pentium4", 'J', "+cmov,+mmx,+sse,+sse2")
|
|
||||||
CPU_SPECIFIC("pentium_m", "pentium-m", 'K', "+cmov,+mmx,+sse,+sse2")
|
|
||||||
CPU_SPECIFIC("pentium_4_sse3", "prescott", 'L', "+cmov,+mmx,+sse,+sse2,+sse3")
|
|
||||||
CPU_SPECIFIC("core_2_duo_ssse3", "core2", 'M', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3")
|
|
||||||
CPU_SPECIFIC("core_2_duo_sse4_1", "penryn", 'N', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1")
|
|
||||||
CPU_SPECIFIC("atom", "atom", 'O', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+movbe")
|
|
||||||
CPU_SPECIFIC("atom_sse4_2", "silvermont", 'c', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt")
|
|
||||||
CPU_SPECIFIC("core_i7_sse4_2", "nehalem", 'P', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt")
|
|
||||||
CPU_SPECIFIC("core_aes_pclmulqdq", "westmere", 'Q', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt")
|
|
||||||
CPU_SPECIFIC("atom_sse4_2_movbe", "silvermont", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt")
|
|
||||||
CPU_SPECIFIC("goldmont", "goldmont", 'i', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt")
|
|
||||||
CPU_SPECIFIC("sandybridge", "sandybridge", 'R', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+avx")
|
|
||||||
CPU_SPECIFIC_ALIAS("core_2nd_gen_avx", "sandybridge", "sandybridge")
|
|
||||||
CPU_SPECIFIC("ivybridge", "ivybridge", 'S', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+f16c,+avx")
|
|
||||||
CPU_SPECIFIC_ALIAS("core_3rd_gen_avx", "ivybridge", "ivybridge")
|
|
||||||
CPU_SPECIFIC("haswell", "haswell", 'V', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2")
|
|
||||||
CPU_SPECIFIC_ALIAS("core_4th_gen_avx", "haswell", "haswell")
|
|
||||||
CPU_SPECIFIC("core_4th_gen_avx_tsx", "haswell", 'W', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2")
|
|
||||||
CPU_SPECIFIC("broadwell", "broadwell", 'X', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx")
|
|
||||||
CPU_SPECIFIC_ALIAS("core_5th_gen_avx", "broadwell", "broadwell")
|
|
||||||
CPU_SPECIFIC("core_5th_gen_avx_tsx", "broadwell", 'Y', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx")
|
|
||||||
CPU_SPECIFIC("knl", "knl", 'Z', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd")
|
|
||||||
CPU_SPECIFIC_ALIAS("mic_avx512", "knl", "knl")
|
|
||||||
CPU_SPECIFIC("skylake", "skylake", 'b', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx,+mpx")
|
|
||||||
CPU_SPECIFIC( "skylake_avx512", "skylake-avx512", 'a', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512cd,+avx512bw,+avx512vl,+clwb")
|
|
||||||
CPU_SPECIFIC("cannonlake", "cannonlake", 'e', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512ifma,+avx512cd,+avx512bw,+avx512vl,+avx512vbmi")
|
|
||||||
CPU_SPECIFIC("knm", "knm", 'j', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd,+avx5124fmaps,+avx5124vnniw,+avx512vpopcntdq")
|
|
||||||
|
|
||||||
#undef CPU_SPECIFIC_ALIAS
|
|
||||||
#undef CPU_SPECIFIC
|
|
||||||
|
|||||||
@ -1,170 +1,15 @@
|
|||||||
//===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===//
|
//===-- llvm/Support/X86TargetParser.h --------------------------*- C++ -*-===//
|
||||||
//
|
//
|
||||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
// See https://llvm.org/LICENSE.txt for license information.
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
//
|
///
|
||||||
// This file implements a target parser to recognise X86 hardware features.
|
/// \file
|
||||||
//
|
/// This header is deprecated in favour of
|
||||||
|
/// `llvm/TargetParser/X86TargetParser.h`.
|
||||||
|
///
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#ifndef LLVM_SUPPORT_X86TARGETPARSER_H
|
#include "llvm/TargetParser/X86TargetParser.h"
|
||||||
#define LLVM_SUPPORT_X86TARGETPARSER_H
|
|
||||||
|
|
||||||
#include "llvm/ADT/ArrayRef.h"
|
|
||||||
#include "llvm/ADT/StringMap.h"
|
|
||||||
|
|
||||||
namespace llvm {
|
|
||||||
template <typename T> class SmallVectorImpl;
|
|
||||||
class StringRef;
|
|
||||||
|
|
||||||
namespace X86 {
|
|
||||||
|
|
||||||
// This should be kept in sync with libcc/compiler-rt as its included by clang
|
|
||||||
// as a proxy for what's in libgcc/compiler-rt.
|
|
||||||
enum ProcessorVendors : unsigned {
|
|
||||||
VENDOR_DUMMY,
|
|
||||||
#define X86_VENDOR(ENUM, STRING) \
|
|
||||||
ENUM,
|
|
||||||
#include "llvm/Support/X86TargetParser.def"
|
|
||||||
VENDOR_OTHER
|
|
||||||
};
|
|
||||||
|
|
||||||
// This should be kept in sync with libcc/compiler-rt as its included by clang
|
|
||||||
// as a proxy for what's in libgcc/compiler-rt.
|
|
||||||
enum ProcessorTypes : unsigned {
|
|
||||||
CPU_TYPE_DUMMY,
|
|
||||||
#define X86_CPU_TYPE(ENUM, STRING) \
|
|
||||||
ENUM,
|
|
||||||
#include "llvm/Support/X86TargetParser.def"
|
|
||||||
CPU_TYPE_MAX
|
|
||||||
};
|
|
||||||
|
|
||||||
// This should be kept in sync with libcc/compiler-rt as its included by clang
|
|
||||||
// as a proxy for what's in libgcc/compiler-rt.
|
|
||||||
enum ProcessorSubtypes : unsigned {
|
|
||||||
CPU_SUBTYPE_DUMMY,
|
|
||||||
#define X86_CPU_SUBTYPE(ENUM, STRING) \
|
|
||||||
ENUM,
|
|
||||||
#include "llvm/Support/X86TargetParser.def"
|
|
||||||
CPU_SUBTYPE_MAX
|
|
||||||
};
|
|
||||||
|
|
||||||
// This should be kept in sync with libcc/compiler-rt as it should be used
|
|
||||||
// by clang as a proxy for what's in libgcc/compiler-rt.
|
|
||||||
enum ProcessorFeatures {
|
|
||||||
#define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM,
|
|
||||||
#include "llvm/Support/X86TargetParser.def"
|
|
||||||
CPU_FEATURE_MAX
|
|
||||||
};
|
|
||||||
|
|
||||||
enum CPUKind {
|
|
||||||
CK_None,
|
|
||||||
CK_i386,
|
|
||||||
CK_i486,
|
|
||||||
CK_WinChipC6,
|
|
||||||
CK_WinChip2,
|
|
||||||
CK_C3,
|
|
||||||
CK_i586,
|
|
||||||
CK_Pentium,
|
|
||||||
CK_PentiumMMX,
|
|
||||||
CK_PentiumPro,
|
|
||||||
CK_i686,
|
|
||||||
CK_Pentium2,
|
|
||||||
CK_Pentium3,
|
|
||||||
CK_PentiumM,
|
|
||||||
CK_C3_2,
|
|
||||||
CK_Yonah,
|
|
||||||
CK_Pentium4,
|
|
||||||
CK_Prescott,
|
|
||||||
CK_Nocona,
|
|
||||||
CK_Core2,
|
|
||||||
CK_Penryn,
|
|
||||||
CK_Bonnell,
|
|
||||||
CK_Silvermont,
|
|
||||||
CK_Goldmont,
|
|
||||||
CK_GoldmontPlus,
|
|
||||||
CK_Tremont,
|
|
||||||
CK_Nehalem,
|
|
||||||
CK_Westmere,
|
|
||||||
CK_SandyBridge,
|
|
||||||
CK_IvyBridge,
|
|
||||||
CK_Haswell,
|
|
||||||
CK_Broadwell,
|
|
||||||
CK_SkylakeClient,
|
|
||||||
CK_SkylakeServer,
|
|
||||||
CK_Cascadelake,
|
|
||||||
CK_Cooperlake,
|
|
||||||
CK_Cannonlake,
|
|
||||||
CK_IcelakeClient,
|
|
||||||
CK_Rocketlake,
|
|
||||||
CK_IcelakeServer,
|
|
||||||
CK_Tigerlake,
|
|
||||||
CK_SapphireRapids,
|
|
||||||
CK_Alderlake,
|
|
||||||
CK_Raptorlake,
|
|
||||||
CK_Meteorlake,
|
|
||||||
CK_Sierraforest,
|
|
||||||
CK_Grandridge,
|
|
||||||
CK_Graniterapids,
|
|
||||||
CK_KNL,
|
|
||||||
CK_KNM,
|
|
||||||
CK_Lakemont,
|
|
||||||
CK_K6,
|
|
||||||
CK_K6_2,
|
|
||||||
CK_K6_3,
|
|
||||||
CK_Athlon,
|
|
||||||
CK_AthlonXP,
|
|
||||||
CK_K8,
|
|
||||||
CK_K8SSE3,
|
|
||||||
CK_AMDFAM10,
|
|
||||||
CK_BTVER1,
|
|
||||||
CK_BTVER2,
|
|
||||||
CK_BDVER1,
|
|
||||||
CK_BDVER2,
|
|
||||||
CK_BDVER3,
|
|
||||||
CK_BDVER4,
|
|
||||||
CK_ZNVER1,
|
|
||||||
CK_ZNVER2,
|
|
||||||
CK_ZNVER3,
|
|
||||||
CK_ZNVER4,
|
|
||||||
CK_x86_64,
|
|
||||||
CK_x86_64_v2,
|
|
||||||
CK_x86_64_v3,
|
|
||||||
CK_x86_64_v4,
|
|
||||||
CK_Geode,
|
|
||||||
};
|
|
||||||
|
|
||||||
/// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if
|
|
||||||
/// \p Only64Bit is true.
|
|
||||||
CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false);
|
|
||||||
CPUKind parseTuneCPU(StringRef CPU, bool Only64Bit = false);
|
|
||||||
|
|
||||||
/// Provide a list of valid CPU names. If \p Only64Bit is true, the list will
|
|
||||||
/// only contain 64-bit capable CPUs.
|
|
||||||
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values,
|
|
||||||
bool Only64Bit = false);
|
|
||||||
/// Provide a list of valid -mtune names.
|
|
||||||
void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values,
|
|
||||||
bool Only64Bit = false);
|
|
||||||
|
|
||||||
/// Get the key feature prioritizing target multiversioning.
|
|
||||||
ProcessorFeatures getKeyFeature(CPUKind Kind);
|
|
||||||
|
|
||||||
/// Fill in the features that \p CPU supports into \p Features.
|
|
||||||
void getFeaturesForCPU(StringRef CPU, SmallVectorImpl<StringRef> &Features);
|
|
||||||
|
|
||||||
/// Set or clear entries in \p Features that are implied to be enabled/disabled
|
|
||||||
/// by the provided \p Feature.
|
|
||||||
void updateImpliedFeatures(StringRef Feature, bool Enabled,
|
|
||||||
StringMap<bool> &Features);
|
|
||||||
|
|
||||||
uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
|
|
||||||
unsigned getFeaturePriority(ProcessorFeatures Feat);
|
|
||||||
|
|
||||||
} // namespace X86
|
|
||||||
} // namespace llvm
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
193
llvm/include/llvm/TargetParser/AArch64TargetParser.h
Normal file
193
llvm/include/llvm/TargetParser/AArch64TargetParser.h
Normal file
@ -0,0 +1,193 @@
|
|||||||
|
//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
|
||||||
|
//
|
||||||
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file implements a target parser to recognise AArch64 hardware features
|
||||||
|
// such as FPU/CPU/ARCH and extension names.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
|
||||||
|
#define LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
|
||||||
|
|
||||||
|
#include "llvm/ADT/StringRef.h"
|
||||||
|
#include <vector>
|
||||||
|
|
||||||
|
// FIXME:This should be made into class design,to avoid dupplication.
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
class Triple;
|
||||||
|
|
||||||
|
namespace AArch64 {
|
||||||
|
|
||||||
|
// Arch extension modifiers for CPUs. These are labelled with their Arm ARM
|
||||||
|
// feature name (though the canonical reference for those is AArch64.td)
|
||||||
|
// clang-format off
|
||||||
|
enum ArchExtKind : uint64_t {
|
||||||
|
AEK_INVALID = 0,
|
||||||
|
AEK_NONE = 1,
|
||||||
|
AEK_CRC = 1 << 1, // FEAT_CRC32
|
||||||
|
AEK_CRYPTO = 1 << 2,
|
||||||
|
AEK_FP = 1 << 3, // FEAT_FP
|
||||||
|
AEK_SIMD = 1 << 4, // FEAT_AdvSIMD
|
||||||
|
AEK_FP16 = 1 << 5, // FEAT_FP16
|
||||||
|
AEK_PROFILE = 1 << 6, // FEAT_SPE
|
||||||
|
AEK_RAS = 1 << 7, // FEAT_RAS, FEAT_RASv1p1
|
||||||
|
AEK_LSE = 1 << 8, // FEAT_LSE
|
||||||
|
AEK_SVE = 1 << 9, // FEAT_SVE
|
||||||
|
AEK_DOTPROD = 1 << 10, // FEAT_DotProd
|
||||||
|
AEK_RCPC = 1 << 11, // FEAT_LRCPC
|
||||||
|
AEK_RDM = 1 << 12, // FEAT_RDM
|
||||||
|
AEK_SM4 = 1 << 13, // FEAT_SM4, FEAT_SM3
|
||||||
|
AEK_SHA3 = 1 << 14, // FEAT_SHA3, FEAT_SHA512
|
||||||
|
AEK_SHA2 = 1 << 15, // FEAT_SHA1, FEAT_SHA256
|
||||||
|
AEK_AES = 1 << 16, // FEAT_AES, FEAT_PMULL
|
||||||
|
AEK_FP16FML = 1 << 17, // FEAT_FHM
|
||||||
|
AEK_RAND = 1 << 18, // FEAT_RNG
|
||||||
|
AEK_MTE = 1 << 19, // FEAT_MTE, FEAT_MTE2
|
||||||
|
AEK_SSBS = 1 << 20, // FEAT_SSBS, FEAT_SSBS2
|
||||||
|
AEK_SB = 1 << 21, // FEAT_SB
|
||||||
|
AEK_PREDRES = 1 << 22, // FEAT_SPECRES
|
||||||
|
AEK_SVE2 = 1 << 23, // FEAT_SVE2
|
||||||
|
AEK_SVE2AES = 1 << 24, // FEAT_SVE_AES, FEAT_SVE_PMULL128
|
||||||
|
AEK_SVE2SM4 = 1 << 25, // FEAT_SVE_SM4
|
||||||
|
AEK_SVE2SHA3 = 1 << 26, // FEAT_SVE_SHA3
|
||||||
|
AEK_SVE2BITPERM = 1 << 27, // FEAT_SVE_BitPerm
|
||||||
|
AEK_TME = 1 << 28, // FEAT_TME
|
||||||
|
AEK_BF16 = 1 << 29, // FEAT_BF16
|
||||||
|
AEK_I8MM = 1 << 30, // FEAT_I8MM
|
||||||
|
AEK_F32MM = 1ULL << 31, // FEAT_F32MM
|
||||||
|
AEK_F64MM = 1ULL << 32, // FEAT_F64MM
|
||||||
|
AEK_LS64 = 1ULL << 33, // FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA
|
||||||
|
AEK_BRBE = 1ULL << 34, // FEAT_BRBE
|
||||||
|
AEK_PAUTH = 1ULL << 35, // FEAT_PAuth
|
||||||
|
AEK_FLAGM = 1ULL << 36, // FEAT_FlagM
|
||||||
|
AEK_SME = 1ULL << 37, // FEAT_SME
|
||||||
|
AEK_SMEF64F64 = 1ULL << 38, // FEAT_SME_F64F64
|
||||||
|
AEK_SMEI16I64 = 1ULL << 39, // FEAT_SME_I16I64
|
||||||
|
AEK_HBC = 1ULL << 40, // FEAT_HBC
|
||||||
|
AEK_MOPS = 1ULL << 41, // FEAT_MOPS
|
||||||
|
AEK_PERFMON = 1ULL << 42, // FEAT_PMUv3
|
||||||
|
AEK_SME2 = 1ULL << 43, // FEAT_SME2
|
||||||
|
AEK_SVE2p1 = 1ULL << 44, // FEAT_SVE2p1
|
||||||
|
AEK_SME2p1 = 1ULL << 45, // FEAT_SME2p1
|
||||||
|
AEK_B16B16 = 1ULL << 46, // FEAT_B16B16
|
||||||
|
AEK_SMEF16F16 = 1ULL << 47, // FEAT_SMEF16F16
|
||||||
|
AEK_CSSC = 1ULL << 48, // FEAT_CSSC
|
||||||
|
AEK_RCPC3 = 1ULL << 49, // FEAT_LRCPC3
|
||||||
|
AEK_THE = 1ULL << 50, // FEAT_THE
|
||||||
|
AEK_D128 = 1ULL << 51, // FEAT_D128
|
||||||
|
AEK_LSE128 = 1ULL << 52, // FEAT_LSE128
|
||||||
|
AEK_SPECRES2 = 1ULL << 53, // FEAT_SPECRES2
|
||||||
|
AEK_RASv2 = 1ULL << 54, // FEAT_RASv2
|
||||||
|
};
|
||||||
|
// clang-format on
|
||||||
|
|
||||||
|
enum class ArchKind {
|
||||||
|
#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) ID,
|
||||||
|
#include "AArch64TargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
struct ArchNames {
|
||||||
|
StringRef Name;
|
||||||
|
StringRef ArchFeature;
|
||||||
|
uint64_t ArchBaseExtensions;
|
||||||
|
ArchKind ID;
|
||||||
|
|
||||||
|
// Return ArchFeature without the leading "+".
|
||||||
|
StringRef getSubArch() const { return ArchFeature.substr(1); }
|
||||||
|
};
|
||||||
|
|
||||||
|
const ArchNames AArch64ARCHNames[] = {
|
||||||
|
#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) \
|
||||||
|
{NAME, ARCH_FEATURE, ARCH_BASE_EXT, AArch64::ArchKind::ID},
|
||||||
|
#include "AArch64TargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of Arch Extension names.
|
||||||
|
struct ExtName {
|
||||||
|
StringRef Name;
|
||||||
|
uint64_t ID;
|
||||||
|
StringRef Feature;
|
||||||
|
StringRef NegFeature;
|
||||||
|
};
|
||||||
|
|
||||||
|
const ExtName AArch64ARCHExtNames[] = {
|
||||||
|
#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
|
||||||
|
{NAME, ID, FEATURE, NEGFEATURE},
|
||||||
|
#include "AArch64TargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of CPU names and their arches.
|
||||||
|
// The same CPU can have multiple arches and can be default on multiple arches.
|
||||||
|
// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
|
||||||
|
// When this becomes table-generated, we'd probably need two tables.
|
||||||
|
struct CpuNames {
|
||||||
|
StringRef Name;
|
||||||
|
ArchKind ArchID;
|
||||||
|
uint64_t DefaultExtensions;
|
||||||
|
};
|
||||||
|
|
||||||
|
const CpuNames AArch64CPUNames[] = {
|
||||||
|
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) \
|
||||||
|
{NAME, AArch64::ArchKind::ID, DEFAULT_EXT},
|
||||||
|
#include "AArch64TargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
const struct {
|
||||||
|
StringRef Alias;
|
||||||
|
StringRef Name;
|
||||||
|
} AArch64CPUAliases[] = {
|
||||||
|
#define AARCH64_CPU_ALIAS(ALIAS, NAME) {ALIAS, NAME},
|
||||||
|
#include "AArch64TargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
const ArchKind ArchKinds[] = {
|
||||||
|
#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) ArchKind::ID,
|
||||||
|
#include "AArch64TargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
inline ArchKind &operator--(ArchKind &Kind) {
|
||||||
|
if ((Kind == ArchKind::INVALID) || (Kind == ArchKind::ARMV8A) ||
|
||||||
|
(Kind == ArchKind::ARMV9A) || (Kind == ArchKind::ARMV8R))
|
||||||
|
Kind = ArchKind::INVALID;
|
||||||
|
else {
|
||||||
|
unsigned KindAsInteger = static_cast<unsigned>(Kind);
|
||||||
|
Kind = static_cast<ArchKind>(--KindAsInteger);
|
||||||
|
}
|
||||||
|
return Kind;
|
||||||
|
}
|
||||||
|
|
||||||
|
bool getExtensionFeatures(uint64_t Extensions,
|
||||||
|
std::vector<StringRef> &Features);
|
||||||
|
StringRef getArchFeature(ArchKind AK);
|
||||||
|
|
||||||
|
StringRef getArchName(ArchKind AK);
|
||||||
|
StringRef getSubArch(ArchKind AK);
|
||||||
|
StringRef getArchExtName(unsigned ArchExtKind);
|
||||||
|
StringRef getArchExtFeature(StringRef ArchExt);
|
||||||
|
ArchKind convertV9toV8(ArchKind AK);
|
||||||
|
StringRef resolveCPUAlias(StringRef CPU);
|
||||||
|
|
||||||
|
// Information by Name
|
||||||
|
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
|
||||||
|
ArchKind getCPUArchKind(StringRef CPU);
|
||||||
|
ArchKind getSubArchArchKind(StringRef SubArch);
|
||||||
|
|
||||||
|
// Parser
|
||||||
|
ArchKind parseArch(StringRef Arch);
|
||||||
|
ArchExtKind parseArchExt(StringRef ArchExt);
|
||||||
|
ArchKind parseCPUArch(StringRef CPU);
|
||||||
|
// Used by target parser tests
|
||||||
|
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
|
||||||
|
|
||||||
|
bool isX18ReservedByDefault(const Triple &TT);
|
||||||
|
|
||||||
|
} // namespace AArch64
|
||||||
|
} // namespace llvm
|
||||||
|
|
||||||
|
#endif
|
||||||
265
llvm/include/llvm/TargetParser/ARMTargetParser.h
Normal file
265
llvm/include/llvm/TargetParser/ARMTargetParser.h
Normal file
@ -0,0 +1,265 @@
|
|||||||
|
//===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
|
||||||
|
//
|
||||||
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file implements a target parser to recognise ARM hardware features
|
||||||
|
// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGETPARSER_ARMTARGETPARSER_H
|
||||||
|
#define LLVM_TARGETPARSER_ARMTARGETPARSER_H
|
||||||
|
|
||||||
|
#include "llvm/ADT/StringRef.h"
|
||||||
|
#include "llvm/Support/ARMBuildAttributes.h"
|
||||||
|
#include "llvm/TargetParser/ARMTargetParserCommon.h"
|
||||||
|
#include <vector>
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
class Triple;
|
||||||
|
|
||||||
|
namespace ARM {
|
||||||
|
|
||||||
|
// Arch extension modifiers for CPUs.
|
||||||
|
// Note that this is not the same as the AArch64 list
|
||||||
|
enum ArchExtKind : uint64_t {
|
||||||
|
AEK_INVALID = 0,
|
||||||
|
AEK_NONE = 1,
|
||||||
|
AEK_CRC = 1 << 1,
|
||||||
|
AEK_CRYPTO = 1 << 2,
|
||||||
|
AEK_FP = 1 << 3,
|
||||||
|
AEK_HWDIVTHUMB = 1 << 4,
|
||||||
|
AEK_HWDIVARM = 1 << 5,
|
||||||
|
AEK_MP = 1 << 6,
|
||||||
|
AEK_SIMD = 1 << 7,
|
||||||
|
AEK_SEC = 1 << 8,
|
||||||
|
AEK_VIRT = 1 << 9,
|
||||||
|
AEK_DSP = 1 << 10,
|
||||||
|
AEK_FP16 = 1 << 11,
|
||||||
|
AEK_RAS = 1 << 12,
|
||||||
|
AEK_DOTPROD = 1 << 13,
|
||||||
|
AEK_SHA2 = 1 << 14,
|
||||||
|
AEK_AES = 1 << 15,
|
||||||
|
AEK_FP16FML = 1 << 16,
|
||||||
|
AEK_SB = 1 << 17,
|
||||||
|
AEK_FP_DP = 1 << 18,
|
||||||
|
AEK_LOB = 1 << 19,
|
||||||
|
AEK_BF16 = 1 << 20,
|
||||||
|
AEK_I8MM = 1 << 21,
|
||||||
|
AEK_CDECP0 = 1 << 22,
|
||||||
|
AEK_CDECP1 = 1 << 23,
|
||||||
|
AEK_CDECP2 = 1 << 24,
|
||||||
|
AEK_CDECP3 = 1 << 25,
|
||||||
|
AEK_CDECP4 = 1 << 26,
|
||||||
|
AEK_CDECP5 = 1 << 27,
|
||||||
|
AEK_CDECP6 = 1 << 28,
|
||||||
|
AEK_CDECP7 = 1 << 29,
|
||||||
|
AEK_PACBTI = 1 << 30,
|
||||||
|
// Unsupported extensions.
|
||||||
|
AEK_OS = 1ULL << 59,
|
||||||
|
AEK_IWMMXT = 1ULL << 60,
|
||||||
|
AEK_IWMMXT2 = 1ULL << 61,
|
||||||
|
AEK_MAVERICK = 1ULL << 62,
|
||||||
|
AEK_XSCALE = 1ULL << 63,
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of Arch Extension names.
|
||||||
|
struct ExtName {
|
||||||
|
StringRef Name;
|
||||||
|
uint64_t ID;
|
||||||
|
StringRef Feature;
|
||||||
|
StringRef NegFeature;
|
||||||
|
};
|
||||||
|
|
||||||
|
const ExtName ARCHExtNames[] = {
|
||||||
|
#define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
|
||||||
|
{NAME, ID, FEATURE, NEGFEATURE},
|
||||||
|
#include "ARMTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of HWDiv names (use getHWDivSynonym) and which architectural
|
||||||
|
// features they correspond to (use getHWDivFeatures).
|
||||||
|
const struct {
|
||||||
|
StringRef Name;
|
||||||
|
uint64_t ID;
|
||||||
|
} HWDivNames[] = {
|
||||||
|
#define ARM_HW_DIV_NAME(NAME, ID) {NAME, ID},
|
||||||
|
#include "ARMTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// Arch names.
|
||||||
|
enum class ArchKind {
|
||||||
|
#define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \
|
||||||
|
ARCH_BASE_EXT) \
|
||||||
|
ID,
|
||||||
|
#include "ARMTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of CPU names and their arches.
|
||||||
|
// The same CPU can have multiple arches and can be default on multiple arches.
|
||||||
|
// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
|
||||||
|
// When this becomes table-generated, we'd probably need two tables.
|
||||||
|
struct CpuNames {
|
||||||
|
StringRef Name;
|
||||||
|
ArchKind ArchID;
|
||||||
|
bool Default; // is $Name the default CPU for $ArchID ?
|
||||||
|
uint64_t DefaultExtensions;
|
||||||
|
};
|
||||||
|
|
||||||
|
const CpuNames CPUNames[] = {
|
||||||
|
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
|
||||||
|
{NAME, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
|
||||||
|
#include "ARMTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// FPU names.
|
||||||
|
enum FPUKind {
|
||||||
|
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
|
||||||
|
#include "ARMTargetParser.def"
|
||||||
|
FK_LAST
|
||||||
|
};
|
||||||
|
|
||||||
|
// FPU Version
|
||||||
|
enum class FPUVersion {
|
||||||
|
NONE,
|
||||||
|
VFPV2,
|
||||||
|
VFPV3,
|
||||||
|
VFPV3_FP16,
|
||||||
|
VFPV4,
|
||||||
|
VFPV5,
|
||||||
|
VFPV5_FULLFP16,
|
||||||
|
};
|
||||||
|
|
||||||
|
// An FPU name restricts the FPU in one of three ways:
|
||||||
|
enum class FPURestriction {
|
||||||
|
None = 0, ///< No restriction
|
||||||
|
D16, ///< Only 16 D registers
|
||||||
|
SP_D16 ///< Only single-precision instructions, with 16 D registers
|
||||||
|
};
|
||||||
|
|
||||||
|
// An FPU name implies one of three levels of Neon support:
|
||||||
|
enum class NeonSupportLevel {
|
||||||
|
None = 0, ///< No Neon
|
||||||
|
Neon, ///< Neon
|
||||||
|
Crypto ///< Neon with Crypto
|
||||||
|
};
|
||||||
|
|
||||||
|
// v6/v7/v8 Profile
|
||||||
|
enum class ProfileKind { INVALID = 0, A, R, M };
|
||||||
|
|
||||||
|
// List of canonical FPU names (use getFPUSynonym) and which architectural
|
||||||
|
// features they correspond to (use getFPUFeatures).
|
||||||
|
// The entries must appear in the order listed in ARM::FPUKind for correct
|
||||||
|
// indexing
|
||||||
|
struct FPUName {
|
||||||
|
StringRef Name;
|
||||||
|
FPUKind ID;
|
||||||
|
FPUVersion FPUVer;
|
||||||
|
NeonSupportLevel NeonSupport;
|
||||||
|
FPURestriction Restriction;
|
||||||
|
};
|
||||||
|
|
||||||
|
static const FPUName FPUNames[] = {
|
||||||
|
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
|
||||||
|
{NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
|
||||||
|
#include "llvm/TargetParser/ARMTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of canonical arch names (use getArchSynonym).
|
||||||
|
// This table also provides the build attribute fields for CPU arch
|
||||||
|
// and Arch ID, according to the Addenda to the ARM ABI, chapters
|
||||||
|
// 2.4 and 2.3.5.2 respectively.
|
||||||
|
// FIXME: SubArch values were simplified to fit into the expectations
|
||||||
|
// of the triples and are not conforming with their official names.
|
||||||
|
// Check to see if the expectation should be changed.
|
||||||
|
struct ArchNames {
|
||||||
|
StringRef Name;
|
||||||
|
StringRef CPUAttr; // CPU class in build attributes.
|
||||||
|
StringRef ArchFeature;
|
||||||
|
unsigned DefaultFPU;
|
||||||
|
uint64_t ArchBaseExtensions;
|
||||||
|
ArchKind ID;
|
||||||
|
ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
|
||||||
|
|
||||||
|
// Return ArchFeature without the leading "+".
|
||||||
|
StringRef getSubArch() const { return ArchFeature.substr(1); }
|
||||||
|
};
|
||||||
|
|
||||||
|
static const ArchNames ARMArchNames[] = {
|
||||||
|
#define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \
|
||||||
|
ARCH_BASE_EXT) \
|
||||||
|
{NAME, CPU_ATTR, ARCH_FEATURE, ARCH_FPU, \
|
||||||
|
ARCH_BASE_EXT, ArchKind::ID, ARCH_ATTR},
|
||||||
|
#include "llvm/TargetParser/ARMTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
inline ArchKind &operator--(ArchKind &Kind) {
|
||||||
|
assert((Kind >= ArchKind::ARMV8A && Kind <= ArchKind::ARMV9_3A) &&
|
||||||
|
"We only expect operator-- to be called with ARMV8/V9");
|
||||||
|
if (Kind == ArchKind::INVALID || Kind == ArchKind::ARMV8A ||
|
||||||
|
Kind == ArchKind::ARMV8_1A || Kind == ArchKind::ARMV9A ||
|
||||||
|
Kind == ArchKind::ARMV8R)
|
||||||
|
Kind = ArchKind::INVALID;
|
||||||
|
else {
|
||||||
|
unsigned KindAsInteger = static_cast<unsigned>(Kind);
|
||||||
|
Kind = static_cast<ArchKind>(--KindAsInteger);
|
||||||
|
}
|
||||||
|
return Kind;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Information by ID
|
||||||
|
StringRef getFPUName(unsigned FPUKind);
|
||||||
|
FPUVersion getFPUVersion(unsigned FPUKind);
|
||||||
|
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
|
||||||
|
FPURestriction getFPURestriction(unsigned FPUKind);
|
||||||
|
|
||||||
|
bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
|
||||||
|
bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
|
||||||
|
bool getExtensionFeatures(uint64_t Extensions,
|
||||||
|
std::vector<StringRef> &Features);
|
||||||
|
|
||||||
|
StringRef getArchName(ArchKind AK);
|
||||||
|
unsigned getArchAttr(ArchKind AK);
|
||||||
|
StringRef getCPUAttr(ArchKind AK);
|
||||||
|
StringRef getSubArch(ArchKind AK);
|
||||||
|
StringRef getArchExtName(uint64_t ArchExtKind);
|
||||||
|
StringRef getArchExtFeature(StringRef ArchExt);
|
||||||
|
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
|
||||||
|
std::vector<StringRef> &Features,
|
||||||
|
unsigned &ArgFPUKind);
|
||||||
|
ArchKind convertV9toV8(ArchKind AK);
|
||||||
|
|
||||||
|
// Information by Name
|
||||||
|
unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
|
||||||
|
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
|
||||||
|
StringRef getDefaultCPU(StringRef Arch);
|
||||||
|
StringRef getCanonicalArchName(StringRef Arch);
|
||||||
|
StringRef getFPUSynonym(StringRef FPU);
|
||||||
|
|
||||||
|
// Parser
|
||||||
|
uint64_t parseHWDiv(StringRef HWDiv);
|
||||||
|
unsigned parseFPU(StringRef FPU);
|
||||||
|
ArchKind parseArch(StringRef Arch);
|
||||||
|
uint64_t parseArchExt(StringRef ArchExt);
|
||||||
|
ArchKind parseCPUArch(StringRef CPU);
|
||||||
|
ProfileKind parseArchProfile(StringRef Arch);
|
||||||
|
unsigned parseArchVersion(StringRef Arch);
|
||||||
|
|
||||||
|
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
|
||||||
|
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
|
||||||
|
|
||||||
|
/// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
|
||||||
|
///
|
||||||
|
/// \param Arch the architecture name (e.g., "armv7s"). If it is an empty
|
||||||
|
/// string then the triple's arch name is used.
|
||||||
|
StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch = {});
|
||||||
|
|
||||||
|
} // namespace ARM
|
||||||
|
} // namespace llvm
|
||||||
|
|
||||||
|
#endif
|
||||||
51
llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
Normal file
51
llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
Normal file
@ -0,0 +1,51 @@
|
|||||||
|
//===---------------- ARMTargetParserCommon ---------------------*- C++ -*-===//
|
||||||
|
//
|
||||||
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// Code that is common to ARMTargetParser and AArch64TargetParser.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGETPARSER_ARMTARGETPARSERCOMMON_H
|
||||||
|
#define LLVM_TARGETPARSER_ARMTARGETPARSERCOMMON_H
|
||||||
|
|
||||||
|
#include "llvm/ADT/StringRef.h"
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
namespace ARM {
|
||||||
|
|
||||||
|
enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
|
||||||
|
|
||||||
|
enum class EndianKind { INVALID = 0, LITTLE, BIG };
|
||||||
|
|
||||||
|
/// Converts e.g. "armv8" -> "armv8-a"
|
||||||
|
StringRef getArchSynonym(StringRef Arch);
|
||||||
|
|
||||||
|
/// MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
|
||||||
|
/// (iwmmxt|xscale)(eb)? is also permitted. If the former, return
|
||||||
|
/// "v.+", if the latter, return unmodified string, minus 'eb'.
|
||||||
|
/// If invalid, return empty string.
|
||||||
|
StringRef getCanonicalArchName(StringRef Arch);
|
||||||
|
|
||||||
|
// ARM, Thumb, AArch64
|
||||||
|
ISAKind parseArchISA(StringRef Arch);
|
||||||
|
|
||||||
|
// Little/Big endian
|
||||||
|
EndianKind parseArchEndian(StringRef Arch);
|
||||||
|
|
||||||
|
struct ParsedBranchProtection {
|
||||||
|
StringRef Scope;
|
||||||
|
StringRef Key;
|
||||||
|
bool BranchTargetEnforcement;
|
||||||
|
};
|
||||||
|
|
||||||
|
bool parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,
|
||||||
|
StringRef &Err);
|
||||||
|
|
||||||
|
} // namespace ARM
|
||||||
|
} // namespace llvm
|
||||||
|
#endif
|
||||||
203
llvm/include/llvm/TargetParser/CSKYTargetParser.h
Normal file
203
llvm/include/llvm/TargetParser/CSKYTargetParser.h
Normal file
@ -0,0 +1,203 @@
|
|||||||
|
//===-- CSKYTargetParser - Parser for CSKY target features --------*- C++
|
||||||
|
//-*-===//
|
||||||
|
//
|
||||||
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file implements a target parser to recognise CSKY hardware features
|
||||||
|
// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGETPARSER_CSKYTARGETPARSER_H
|
||||||
|
#define LLVM_TARGETPARSER_CSKYTARGETPARSER_H
|
||||||
|
|
||||||
|
#include "llvm/TargetParser/Triple.h"
|
||||||
|
#include <vector>
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
class StringRef;
|
||||||
|
|
||||||
|
namespace CSKY {
|
||||||
|
|
||||||
|
// Arch extension modifiers for CPUs.
|
||||||
|
enum ArchExtKind : uint64_t {
|
||||||
|
AEK_INVALID = 0,
|
||||||
|
AEK_NONE = 1,
|
||||||
|
AEK_FPUV2SF = 1 << 1,
|
||||||
|
AEK_FPUV2DF = 1 << 2,
|
||||||
|
AEK_FDIVDU = 1 << 3,
|
||||||
|
AEK_FPUV3HI = 1 << 4,
|
||||||
|
AEK_FPUV3HF = 1 << 5,
|
||||||
|
AEK_FPUV3SF = 1 << 6,
|
||||||
|
AEK_FPUV3DF = 1 << 7,
|
||||||
|
AEK_FLOATE1 = 1 << 8,
|
||||||
|
AEK_FLOAT1E2 = 1 << 9,
|
||||||
|
AEK_FLOAT1E3 = 1 << 10,
|
||||||
|
AEK_FLOAT3E4 = 1 << 11,
|
||||||
|
AEK_FLOAT7E60 = 1 << 12,
|
||||||
|
AEK_HWDIV = 1 << 13,
|
||||||
|
AEK_STLD = 1 << 14,
|
||||||
|
AEK_PUSHPOP = 1 << 15,
|
||||||
|
AEK_EDSP = 1 << 16,
|
||||||
|
AEK_DSP1E2 = 1 << 17,
|
||||||
|
AEK_DSPE60 = 1 << 18,
|
||||||
|
AEK_DSPV2 = 1 << 19,
|
||||||
|
AEK_DSPSILAN = 1 << 20,
|
||||||
|
AEK_ELRW = 1 << 21,
|
||||||
|
AEK_TRUST = 1 << 22,
|
||||||
|
AEK_JAVA = 1 << 23,
|
||||||
|
AEK_CACHE = 1 << 24,
|
||||||
|
AEK_NVIC = 1 << 25,
|
||||||
|
AEK_DOLOOP = 1 << 26,
|
||||||
|
AEK_HIGHREG = 1 << 27,
|
||||||
|
AEK_SMART = 1 << 28,
|
||||||
|
AEK_VDSP2E3 = 1 << 29,
|
||||||
|
AEK_VDSP2E60F = 1 << 30,
|
||||||
|
AEK_VDSPV2 = 1ULL << 31,
|
||||||
|
AEK_HARDTP = 1ULL << 32,
|
||||||
|
AEK_SOFTTP = 1ULL << 33,
|
||||||
|
AEK_ISTACK = 1ULL << 34,
|
||||||
|
AEK_CONSTPOOL = 1ULL << 35,
|
||||||
|
AEK_STACKSIZE = 1ULL << 36,
|
||||||
|
AEK_CCRT = 1ULL << 37,
|
||||||
|
AEK_VDSPV1 = 1ULL << 38,
|
||||||
|
AEK_E1 = 1ULL << 39,
|
||||||
|
AEK_E2 = 1ULL << 40,
|
||||||
|
AEK_2E3 = 1ULL << 41,
|
||||||
|
AEK_MP = 1ULL << 42,
|
||||||
|
AEK_3E3R1 = 1ULL << 43,
|
||||||
|
AEK_3E3R2 = 1ULL << 44,
|
||||||
|
AEK_3E3R3 = 1ULL << 45,
|
||||||
|
AEK_3E7 = 1ULL << 46,
|
||||||
|
AEK_MP1E2 = 1ULL << 47,
|
||||||
|
AEK_7E10 = 1ULL << 48,
|
||||||
|
AEK_10E60 = 1ULL << 49
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
// Arch extension modifiers for CPUs.
|
||||||
|
enum MultiArchExtKind : uint64_t {
|
||||||
|
MAEK_E1 = CSKY::AEK_E1 | CSKY::AEK_ELRW,
|
||||||
|
MAEK_E2 = CSKY::AEK_E2 | CSKY::MAEK_E1,
|
||||||
|
MAEK_2E3 = CSKY::AEK_2E3 | CSKY::MAEK_E2,
|
||||||
|
MAEK_MP = CSKY::AEK_MP | CSKY::MAEK_2E3,
|
||||||
|
MAEK_3E3R1 = CSKY::AEK_3E3R1,
|
||||||
|
MAEK_3E3R2 = CSKY::AEK_3E3R1 | CSKY::AEK_3E3R2 | CSKY::AEK_DOLOOP,
|
||||||
|
MAEK_3E7 = CSKY::AEK_3E7 | CSKY::MAEK_2E3,
|
||||||
|
MAEK_MP1E2 = CSKY::AEK_MP1E2 | CSKY::MAEK_3E7,
|
||||||
|
MAEK_7E10 = CSKY::AEK_7E10 | CSKY::MAEK_3E7,
|
||||||
|
MAEK_10E60 = CSKY::AEK_10E60 | CSKY::MAEK_7E10,
|
||||||
|
};
|
||||||
|
// FPU names.
|
||||||
|
enum CSKYFPUKind {
|
||||||
|
#define CSKY_FPU(NAME, KIND, VERSION) KIND,
|
||||||
|
#include "CSKYTargetParser.def"
|
||||||
|
FK_LAST
|
||||||
|
};
|
||||||
|
|
||||||
|
// FPU Version
|
||||||
|
enum class FPUVersion {
|
||||||
|
NONE,
|
||||||
|
FPV2,
|
||||||
|
FPV3,
|
||||||
|
};
|
||||||
|
|
||||||
|
// Arch names.
|
||||||
|
enum class ArchKind {
|
||||||
|
#define CSKY_ARCH(NAME, ID, ARCH_BASE_EXT) ID,
|
||||||
|
#include "CSKYTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of Arch Extension names.
|
||||||
|
// FIXME: TableGen this.
|
||||||
|
struct ExtName {
|
||||||
|
const char *NameCStr;
|
||||||
|
size_t NameLength;
|
||||||
|
uint64_t ID;
|
||||||
|
const char *Feature;
|
||||||
|
const char *NegFeature;
|
||||||
|
|
||||||
|
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
||||||
|
};
|
||||||
|
|
||||||
|
const CSKY::ExtName CSKYARCHExtNames[] = {
|
||||||
|
#define CSKY_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
|
||||||
|
{NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
|
||||||
|
#include "CSKYTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of CPU names and their arches.
|
||||||
|
template <typename T> struct CpuNames {
|
||||||
|
const char *NameCStr;
|
||||||
|
size_t NameLength;
|
||||||
|
T ArchID;
|
||||||
|
uint64_t defaultExt;
|
||||||
|
|
||||||
|
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
||||||
|
};
|
||||||
|
const CpuNames<CSKY::ArchKind> CPUNames[] = {
|
||||||
|
#define CSKY_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT) \
|
||||||
|
{NAME, sizeof(NAME) - 1, CSKY::ArchKind::ARCH_ID, DEFAULT_EXT},
|
||||||
|
#include "llvm/TargetParser/CSKYTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// FIXME: TableGen this.
|
||||||
|
// The entries must appear in the order listed in CSKY::CSKYFPUKind for correct
|
||||||
|
// indexing
|
||||||
|
struct FPUName {
|
||||||
|
const char *NameCStr;
|
||||||
|
size_t NameLength;
|
||||||
|
CSKYFPUKind ID;
|
||||||
|
FPUVersion FPUVer;
|
||||||
|
|
||||||
|
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
||||||
|
};
|
||||||
|
|
||||||
|
static const FPUName FPUNames[] = {
|
||||||
|
#define CSKY_FPU(NAME, KIND, VERSION) {NAME, sizeof(NAME) - 1, KIND, VERSION},
|
||||||
|
#include "llvm/TargetParser/CSKYTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
// List of canonical arch names.
|
||||||
|
template <typename T> struct ArchNames {
|
||||||
|
const char *NameCStr;
|
||||||
|
size_t NameLength;
|
||||||
|
T ID;
|
||||||
|
uint64_t archBaseExt;
|
||||||
|
StringRef getName() const { return StringRef(NameCStr, NameLength); }
|
||||||
|
};
|
||||||
|
const ArchNames<CSKY::ArchKind> ARCHNames[] = {
|
||||||
|
#define CSKY_ARCH(NAME, ID, ARCH_BASE_EXT) \
|
||||||
|
{NAME, sizeof(NAME) - 1, CSKY::ArchKind::ID, ARCH_BASE_EXT},
|
||||||
|
#include "llvm/TargetParser/CSKYTargetParser.def"
|
||||||
|
};
|
||||||
|
|
||||||
|
StringRef getArchName(ArchKind AK);
|
||||||
|
StringRef getDefaultCPU(StringRef Arch);
|
||||||
|
StringRef getArchExtName(uint64_t ArchExtKind);
|
||||||
|
StringRef getArchExtFeature(StringRef ArchExt);
|
||||||
|
uint64_t getDefaultExtensions(StringRef CPU);
|
||||||
|
bool getExtensionFeatures(uint64_t Extensions,
|
||||||
|
std::vector<StringRef> &Features);
|
||||||
|
|
||||||
|
// Information by ID
|
||||||
|
StringRef getFPUName(unsigned FPUKind);
|
||||||
|
FPUVersion getFPUVersion(unsigned FPUKind);
|
||||||
|
|
||||||
|
bool getFPUFeatures(CSKYFPUKind Kind, std::vector<StringRef> &Features);
|
||||||
|
|
||||||
|
// Parser
|
||||||
|
ArchKind parseArch(StringRef Arch);
|
||||||
|
ArchKind parseCPUArch(StringRef CPU);
|
||||||
|
uint64_t parseArchExt(StringRef ArchExt);
|
||||||
|
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
|
||||||
|
|
||||||
|
} // namespace CSKY
|
||||||
|
|
||||||
|
} // namespace llvm
|
||||||
|
|
||||||
|
#endif
|
||||||
88
llvm/include/llvm/TargetParser/Host.h
Normal file
88
llvm/include/llvm/TargetParser/Host.h
Normal file
@ -0,0 +1,88 @@
|
|||||||
|
//===- llvm/TargetParser/Host.h - Host machine detection -------*- C++ -*-===//
|
||||||
|
//
|
||||||
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||||
|
// See https://llvm.org/LICENSE.txt for license information.
|
||||||
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// Methods for querying the nature of the host machine.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGETPARSER_HOST_H
|
||||||
|
#define LLVM_TARGETPARSER_HOST_H
|
||||||
|
|
||||||
|
#include <string>
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
class MallocAllocator;
|
||||||
|
class StringRef;
|
||||||
|
template <typename ValueTy, typename AllocatorTy> class StringMap;
|
||||||
|
class raw_ostream;
|
||||||
|
|
||||||
|
namespace sys {
|
||||||
|
|
||||||
|
/// getDefaultTargetTriple() - Return the default target triple the compiler
|
||||||
|
/// has been configured to produce code for.
|
||||||
|
///
|
||||||
|
/// The target triple is a string in the format of:
|
||||||
|
/// CPU_TYPE-VENDOR-OPERATING_SYSTEM
|
||||||
|
/// or
|
||||||
|
/// CPU_TYPE-VENDOR-KERNEL-OPERATING_SYSTEM
|
||||||
|
std::string getDefaultTargetTriple();
|
||||||
|
|
||||||
|
/// getProcessTriple() - Return an appropriate target triple for generating
|
||||||
|
/// code to be loaded into the current process, e.g. when using the JIT.
|
||||||
|
std::string getProcessTriple();
|
||||||
|
|
||||||
|
/// getHostCPUName - Get the LLVM name for the host CPU. The particular format
|
||||||
|
/// of the name is target dependent, and suitable for passing as -mcpu to the
|
||||||
|
/// target which matches the host.
|
||||||
|
///
|
||||||
|
/// \return - The host CPU name, or empty if the CPU could not be determined.
|
||||||
|
StringRef getHostCPUName();
|
||||||
|
|
||||||
|
/// getHostCPUFeatures - Get the LLVM names for the host CPU features.
|
||||||
|
/// The particular format of the names are target dependent, and suitable for
|
||||||
|
/// passing as -mattr to the target which matches the host.
|
||||||
|
///
|
||||||
|
/// \param Features - A string mapping feature names to either
|
||||||
|
/// true (if enabled) or false (if disabled). This routine makes no guarantees
|
||||||
|
/// about exactly which features may appear in this map, except that they are
|
||||||
|
/// all valid LLVM feature names.
|
||||||
|
///
|
||||||
|
/// \return - True on success.
|
||||||
|
bool getHostCPUFeatures(StringMap<bool, MallocAllocator> &Features);
|
||||||
|
|
||||||
|
/// This is a function compatible with cl::AddExtraVersionPrinter, which adds
|
||||||
|
/// info about the current target triple and detected CPU.
|
||||||
|
void printDefaultTargetAndDetectedCPU(raw_ostream &OS);
|
||||||
|
|
||||||
|
namespace detail {
|
||||||
|
/// Helper functions to extract HostCPUName from /proc/cpuinfo on linux.
|
||||||
|
StringRef getHostCPUNameForPowerPC(StringRef ProcCpuinfoContent);
|
||||||
|
StringRef getHostCPUNameForARM(StringRef ProcCpuinfoContent);
|
||||||
|
StringRef getHostCPUNameForS390x(StringRef ProcCpuinfoContent);
|
||||||
|
StringRef getHostCPUNameForRISCV(StringRef ProcCpuinfoContent);
|
||||||
|
StringRef getHostCPUNameForSPARC(StringRef ProcCpuinfoContent);
|
||||||
|
StringRef getHostCPUNameForBPF();
|
||||||
|
|
||||||
|
/// Helper functions to extract CPU details from CPUID on x86.
|
||||||
|
namespace x86 {
|
||||||
|
enum class VendorSignatures {
|
||||||
|
UNKNOWN,
|
||||||
|
GENUINE_INTEL,
|
||||||
|
AUTHENTIC_AMD,
|
||||||
|
};
|
||||||
|
|
||||||
|
/// Returns the host CPU's vendor.
|
||||||
|
/// MaxLeaf: if a non-nullptr pointer is specified, the EAX value will be
|
||||||
|
/// assigned to its pointee.
|
||||||
|
VendorSignatures getVendorSignature(unsigned *MaxLeaf = nullptr);
|
||||||
|
} // namespace x86
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
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