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[X86] canonicalizeShuffleWithBinOps - merge unary shuffles across binops if either source op is a foldable load

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This mostly handles folding of constants that have already become loads, but we expose some generic load cases as well.

This also exposes the chance to merge unary shuffles across X86ISD::ANDNP nodes with different scalar widths
This commit is contained in:
Simon Pilgrim 2022-06-18 15:38:54 +01:00
parent 7eb046624f
commit f42f2b7005
30 changed files with 9393 additions and 10252 deletions
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10
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -39363,7 +39363,7 @@ static SDValue canonicalizeShuffleWithBinOps(SDValue N, SelectionDAG &DAG,
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
EVT ShuffleVT = N.getValueType();
auto IsMergeableWithShuffle = [](SDValue Op) {
auto IsMergeableWithShuffle = [](SDValue Op, bool FoldLoad = false) {
// AllZeros/AllOnes constants are freely shuffled and will peek through
// bitcasts. Other constant build vectors do not peek through bitcasts. Only
// merge with target shuffles if it has one use so shuffle combining is
@ -39372,13 +39372,14 @@ static SDValue canonicalizeShuffleWithBinOps(SDValue N, SelectionDAG &DAG,
ISD::isBuildVectorAllZeros(Op.getNode()) ||
ISD::isBuildVectorOfConstantSDNodes(Op.getNode()) ||
ISD::isBuildVectorOfConstantFPSDNodes(Op.getNode()) ||
(isTargetShuffle(Op.getOpcode()) && Op->hasOneUse());
(isTargetShuffle(Op.getOpcode()) && Op->hasOneUse()) ||
(FoldLoad && isShuffleFoldableLoad(Op));
};
auto IsSafeToMoveShuffle = [ShuffleVT](SDValue Op, unsigned BinOp) {
// Ensure we only shuffle whole vector src elements, unless its a logical
// binops where we can more aggressively move shuffles from dst to src.
// TODO: Add X86ISD::ANDNP handling with test coverage.
return BinOp == ISD::AND || BinOp == ISD::OR || BinOp == ISD::XOR ||
BinOp == X86ISD::ANDNP ||
(Op.getScalarValueSizeInBits() <= ShuffleVT.getScalarSizeInBits());
};
@ -39408,7 +39409,8 @@ static SDValue canonicalizeShuffleWithBinOps(SDValue N, SelectionDAG &DAG,
if (TLI.isBinOp(SrcOpcode) && IsSafeToMoveShuffle(N0, SrcOpcode)) {
SDValue Op00 = peekThroughOneUseBitcasts(N0.getOperand(0));
SDValue Op01 = peekThroughOneUseBitcasts(N0.getOperand(1));
if (IsMergeableWithShuffle(Op00) || IsMergeableWithShuffle(Op01)) {
if (IsMergeableWithShuffle(Op00, Opc != X86ISD::PSHUFB) ||
IsMergeableWithShuffle(Op01, Opc != X86ISD::PSHUFB)) {
SDValue LHS, RHS;
Op00 = DAG.getBitcast(ShuffleVT, Op00);
Op01 = DAG.getBitcast(ShuffleVT, Op01);

2
llvm/test/CodeGen/X86/avx-vperm2x128.ll
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@ -124,9 +124,9 @@ define <32 x i8> @shuffle_v32i8_2323_domain(<32 x i8> %a, <32 x i8> %b) nounwind
;
; AVX2-LABEL: shuffle_v32i8_2323_domain:
; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,2,3]
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX2-NEXT: vpsubb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,2,3]
; AVX2-NEXT: retq
entry:
; add forces execution domain

2
llvm/test/CodeGen/X86/combine-shl.ll
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@ -849,8 +849,8 @@ define <4 x i32> @combine_vec_add_shuffle_shl(<4 x i32> %a0) {
;
; AVX-LABEL: combine_vec_add_shuffle_shl:
; AVX: # %bb.0:
; AVX-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,0]
; AVX-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3,3,3,3]
; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq

904
llvm/test/CodeGen/X86/fpclamptosat_vec.ll
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File diff suppressed because it is too large Load Diff

47
llvm/test/CodeGen/X86/i64-to-float.ll
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@ -323,32 +323,31 @@ define <2 x double> @clamp_sitofp_2i64_2f64(<2 x i64> %a) nounwind {
; X64-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648]
; X64-SSE-NEXT: movdqa %xmm0, %xmm2
; X64-SSE-NEXT: pxor %xmm1, %xmm2
; X64-SSE-NEXT: movdqa {{.*#+}} xmm3 = [18446744071562067713,18446744071562067713]
; X64-SSE-NEXT: movdqa %xmm2, %xmm4
; X64-SSE-NEXT: pcmpgtd %xmm3, %xmm4
; X64-SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; X64-SSE-NEXT: pcmpeqd %xmm3, %xmm2
; X64-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
; X64-SSE-NEXT: pcmpeqd %xmm4, %xmm4
; X64-SSE-NEXT: pcmpeqd %xmm3, %xmm4
; X64-SSE-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; X64-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; X64-SSE-NEXT: pand %xmm4, %xmm3
; X64-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; X64-SSE-NEXT: pand %xmm5, %xmm2
; X64-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
; X64-SSE-NEXT: por %xmm2, %xmm3
; X64-SSE-NEXT: pand %xmm3, %xmm0
; X64-SSE-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
; X64-SSE-NEXT: por %xmm0, %xmm3
; X64-SSE-NEXT: pxor %xmm3, %xmm1
; X64-SSE-NEXT: movdqa {{.*#+}} xmm0 = [2147483903,2147483903]
; X64-SSE-NEXT: movdqa %xmm0, %xmm2
; X64-SSE-NEXT: pcmpgtd %xmm1, %xmm2
; X64-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[0,0,2,2]
; X64-SSE-NEXT: pcmpeqd %xmm0, %xmm1
; X64-SSE-NEXT: por %xmm3, %xmm2
; X64-SSE-NEXT: pand %xmm2, %xmm0
; X64-SSE-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; X64-SSE-NEXT: por %xmm0, %xmm2
; X64-SSE-NEXT: pxor %xmm2, %xmm1
; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
; X64-SSE-NEXT: pand %xmm4, %xmm0
; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
; X64-SSE-NEXT: por %xmm0, %xmm1
; X64-SSE-NEXT: pand %xmm1, %xmm3
; X64-SSE-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; X64-SSE-NEXT: por %xmm3, %xmm1
; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
; X64-SSE-NEXT: pxor %xmm3, %xmm3
; X64-SSE-NEXT: pcmpeqd %xmm0, %xmm3
; X64-SSE-NEXT: movdqa {{.*#+}} xmm0 = [2147483903,2147483903]
; X64-SSE-NEXT: pcmpgtd %xmm1, %xmm0
; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,2,2]
; X64-SSE-NEXT: pand %xmm3, %xmm1
; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; X64-SSE-NEXT: por %xmm1, %xmm0
; X64-SSE-NEXT: pand %xmm0, %xmm2
; X64-SSE-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; X64-SSE-NEXT: por %xmm2, %xmm0
; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X64-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
; X64-SSE-NEXT: retq
;

4
llvm/test/CodeGen/X86/is_fpclass.ll
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@ -835,9 +835,9 @@ define <2 x i1> @isnan_v2f_strictfp(<2 x float> %x) strictfp {
;
; CHECK-64-LABEL: isnan_v2f_strictfp:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-64-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
; CHECK-64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-64-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
; CHECK-64-NEXT: retq
entry:
%0 = tail call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3) ; "nan"

48
llvm/test/CodeGen/X86/known-bits-vector.ll
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@ -115,15 +115,15 @@ define <4 x i32> @knownbits_mask_shuffle_shuffle_sext(<8 x i16> %a0) nounwind {
define <4 x i32> @knownbits_mask_shuffle_shuffle_undef_sext(<8 x i16> %a0) nounwind {
; X86-LABEL: knownbits_mask_shuffle_shuffle_undef_sext:
; X86: # %bb.0:
; X86-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; X86-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpmovsxwd %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_mask_shuffle_shuffle_undef_sext:
; X64: # %bb.0:
; X64-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; X64-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <8 x i16> %a0, <i16 -1, i16 -1, i16 -1, i16 -1, i16 15, i16 15, i16 15, i16 15>
@ -136,15 +136,15 @@ define <4 x i32> @knownbits_mask_shuffle_shuffle_undef_sext(<8 x i16> %a0) nounw
define <4 x float> @knownbits_mask_shuffle_uitofp(<4 x i32> %a0) nounwind {
; X86-LABEL: knownbits_mask_shuffle_uitofp:
; X86: # %bb.0:
; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vcvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_mask_shuffle_uitofp:
; X64: # %bb.0:
; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <4 x i32> %a0, <i32 -1, i32 -1, i32 255, i32 4085>
@ -173,17 +173,17 @@ define <4 x float> @knownbits_mask_or_shuffle_uitofp(<4 x i32> %a0) nounwind {
define <4 x float> @knownbits_mask_xor_shuffle_uitofp(<4 x i32> %a0) nounwind {
; X86-LABEL: knownbits_mask_xor_shuffle_uitofp:
; X86: # %bb.0:
; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vxorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
; X86-NEXT: vcvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_mask_xor_shuffle_uitofp:
; X64: # %bb.0:
; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <4 x i32> %a0, <i32 -1, i32 -1, i32 255, i32 4085>
@ -384,20 +384,22 @@ declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
define <8 x float> @knownbits_mask_concat_uitofp(<4 x i32> %a0, <4 x i32> %a1) nounwind {
; X86-LABEL: knownbits_mask_concat_uitofp:
; X86: # %bb.0:
; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm1
; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,0,2]
; X86-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[1,3,1,3]
; X86-NEXT: vmovaps {{.*#+}} xmm2 = [131071,131071,131071,131071]
; X86-NEXT: vandps %xmm2, %xmm1, %xmm1
; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,0,2]
; X86-NEXT: vandps %xmm2, %xmm0, %xmm0
; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X86-NEXT: vcvtdq2ps %ymm0, %ymm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_mask_concat_uitofp:
; X64: # %bb.0:
; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,0,2]
; X64-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[1,3,1,3]
; X64-NEXT: vmovaps {{.*#+}} xmm2 = [131071,131071,131071,131071]
; X64-NEXT: vandps %xmm2, %xmm1, %xmm1
; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,0,2]
; X64-NEXT: vandps %xmm2, %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X64-NEXT: vcvtdq2ps %ymm0, %ymm0
; X64-NEXT: retq
@ -432,17 +434,19 @@ define <4 x float> @knownbits_lshr_bitcast_shuffle_uitofp(<2 x i64> %a0, <4 x i3
define <4 x float> @knownbits_smax_smin_shuffle_uitofp(<4 x i32> %a0) {
; X86-LABEL: knownbits_smax_smin_shuffle_uitofp:
; X86: # %bb.0:
; X86-NEXT: vpminsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpmaxsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X86-NEXT: vpxor %xmm1, %xmm1, %xmm1
; X86-NEXT: vpminsd %xmm1, %xmm0, %xmm0
; X86-NEXT: vpmaxsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vcvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_smax_smin_shuffle_uitofp:
; X64: # %bb.0:
; X64-NEXT: vpminsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpmaxsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X64-NEXT: vpxor %xmm1, %xmm1, %xmm1
; X64-NEXT: vpminsd %xmm1, %xmm0, %xmm0
; X64-NEXT: vpmaxsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %a0, <4 x i32> <i32 0, i32 -65535, i32 -65535, i32 0>)
@ -457,15 +461,15 @@ declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
define <4 x float> @knownbits_umin_shuffle_uitofp(<4 x i32> %a0) {
; X86-LABEL: knownbits_umin_shuffle_uitofp:
; X86: # %bb.0:
; X86-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X86-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vcvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_umin_shuffle_uitofp:
; X64: # %bb.0:
; X64-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X64-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
@ -495,17 +499,17 @@ declare <4 x i32> @llvm.umax.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
define <4 x float> @knownbits_mask_umax_shuffle_uitofp(<4 x i32> %a0) {
; X86-LABEL: knownbits_mask_umax_shuffle_uitofp:
; X86: # %bb.0:
; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X86-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X86-NEXT: vcvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_mask_umax_shuffle_uitofp:
; X64: # %bb.0:
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X64-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <4 x i32> %a0, <i32 65535, i32 -1, i32 -1, i32 262143>
@ -563,16 +567,16 @@ define <4 x float> @knownbits_abs_uitofp(<4 x i32> %a0) {
define <4 x float> @knownbits_or_abs_uitofp(<4 x i32> %a0) {
; X86-LABEL: knownbits_or_abs_uitofp:
; X86: # %bb.0:
; X86-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,0,2]
; X86-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vpabsd %xmm0, %xmm0
; X86-NEXT: vcvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: knownbits_or_abs_uitofp:
; X64: # %bb.0:
; X64-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,0,2]
; X64-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpabsd %xmm0, %xmm0
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq

951
llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
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File diff suppressed because it is too large Load Diff

463
llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
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@ -13,52 +13,52 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, <8 x i32>* %p, <8 x i32> %mask
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm8, %xmm8
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [4294967295,4294967295]
; SSE2-NEXT: movdqa {{.*#+}} xmm12 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm1, %xmm6
; SSE2-NEXT: pxor %xmm12, %xmm6
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259455,9223372039002259455]
; SSE2-NEXT: movdqa %xmm11, %xmm7
; SSE2-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm6
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm1, %xmm7
; SSE2-NEXT: pxor %xmm11, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm7[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm10
; SSE2-NEXT: movdqa {{.*#+}} xmm12 = [9223372039002259455,9223372039002259455]
; SSE2-NEXT: movdqa %xmm12, %xmm6
; SSE2-NEXT: pcmpgtd %xmm7, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSE2-NEXT: pand %xmm10, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: pand %xmm10, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm7
; SSE2-NEXT: pand %xmm7, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm7
; SSE2-NEXT: por %xmm1, %xmm7
; SSE2-NEXT: por %xmm7, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm1, %xmm6
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: pxor %xmm12, %xmm1
; SSE2-NEXT: movdqa %xmm11, %xmm6
; SSE2-NEXT: pcmpgtd %xmm1, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: pxor %xmm11, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm1[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm10
; SSE2-NEXT: movdqa %xmm12, %xmm7
; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[0,0,2,2]
; SSE2-NEXT: pand %xmm10, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm6[1,1,3,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm13
; SSE2-NEXT: pand %xmm13, %xmm0
; SSE2-NEXT: pandn %xmm9, %xmm13
; SSE2-NEXT: por %xmm0, %xmm13
; SSE2-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,2],xmm7[0,2]
; SSE2-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,2],xmm6[0,2]
; SSE2-NEXT: movdqa %xmm3, %xmm0
; SSE2-NEXT: pxor %xmm12, %xmm0
; SSE2-NEXT: movdqa %xmm11, %xmm1
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm1[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm1[1,1,3,3]
; SSE2-NEXT: pxor %xmm2, %xmm12
; SSE2-NEXT: movdqa %xmm11, %xmm1
; SSE2-NEXT: pcmpgtd %xmm12, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm1[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm12
; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm1
; SSE2-NEXT: movdqa %xmm12, %xmm6
; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm6[1,1,3,3]
; SSE2-NEXT: movdqa %xmm2, %xmm1
; SSE2-NEXT: pxor %xmm11, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm1[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm6
; SSE2-NEXT: pcmpgtd %xmm1, %xmm12
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm12[0,0,2,2]
; SSE2-NEXT: pand %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm12[1,1,3,3]
; SSE2-NEXT: pand %xmm7, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm1[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
; SSE2-NEXT: pxor %xmm1, %xmm5
@ -73,7 +73,7 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, <8 x i32>* %p, <8 x i32> %mask
; SSE2-NEXT: movss %xmm13, (%rdi)
; SSE2-NEXT: .LBB0_2: # %else
; SSE2-NEXT: por %xmm10, %xmm0
; SSE2-NEXT: por %xmm7, %xmm6
; SSE2-NEXT: por %xmm6, %xmm7
; SSE2-NEXT: testb $2, %al
; SSE2-NEXT: je .LBB0_4
; SSE2-NEXT: # %bb.3: # %cond.store1
@ -82,8 +82,8 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, <8 x i32>* %p, <8 x i32> %mask
; SSE2-NEXT: .LBB0_4: # %else2
; SSE2-NEXT: pand %xmm0, %xmm3
; SSE2-NEXT: pandn %xmm9, %xmm0
; SSE2-NEXT: pand %xmm6, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: pand %xmm7, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm7
; SSE2-NEXT: testb $4, %al
; SSE2-NEXT: je .LBB0_6
; SSE2-NEXT: # %bb.5: # %cond.store3
@ -91,7 +91,7 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, <8 x i32>* %p, <8 x i32> %mask
; SSE2-NEXT: movd %xmm1, 8(%rdi)
; SSE2-NEXT: .LBB0_6: # %else4
; SSE2-NEXT: por %xmm0, %xmm3
; SSE2-NEXT: por %xmm6, %xmm2
; SSE2-NEXT: por %xmm7, %xmm2
; SSE2-NEXT: testb $8, %al
; SSE2-NEXT: je .LBB0_8
; SSE2-NEXT: # %bb.7: # %cond.store5
@ -320,67 +320,67 @@ define void @truncstore_v8i64_v8i16(<8 x i64> %x, <8 x i16>* %p, <8 x i32> %mask
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm8, %xmm8
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [65535,65535]
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm2, %xmm6
; SSE2-NEXT: pxor %xmm11, %xmm6
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm10, %xmm7
; SSE2-NEXT: pxor %xmm10, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm6[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm12
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm11, %xmm7
; SSE2-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[0,0,2,2]
; SSE2-NEXT: pand %xmm12, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm13
; SSE2-NEXT: pand %xmm13, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm13
; SSE2-NEXT: por %xmm2, %xmm13
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm12
; SSE2-NEXT: pand %xmm12, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm12
; SSE2-NEXT: por %xmm2, %xmm12
; SSE2-NEXT: movdqa %xmm3, %xmm2
; SSE2-NEXT: pxor %xmm11, %xmm2
; SSE2-NEXT: movdqa %xmm10, %xmm6
; SSE2-NEXT: pcmpgtd %xmm2, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm2[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm2
; SSE2-NEXT: pand %xmm2, %xmm3
; SSE2-NEXT: pandn %xmm9, %xmm2
; SSE2-NEXT: por %xmm3, %xmm2
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pxor %xmm11, %xmm3
; SSE2-NEXT: movdqa %xmm10, %xmm6
; SSE2-NEXT: pcmpgtd %xmm3, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm7, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pxor %xmm10, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm2[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm6
; SSE2-NEXT: movdqa %xmm11, %xmm7
; SSE2-NEXT: pcmpgtd %xmm2, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
; SSE2-NEXT: pand %xmm6, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm2, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm0, %xmm6
; SSE2-NEXT: pxor %xmm1, %xmm11
; SSE2-NEXT: movdqa %xmm10, %xmm0
; SSE2-NEXT: pcmpgtd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm11
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm11[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: por %xmm3, %xmm6
; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: pxor %xmm10, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3
; SSE2-NEXT: movdqa %xmm11, %xmm7
; SSE2-NEXT: pcmpgtd %xmm2, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
; SSE2-NEXT: pand %xmm3, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm2, %xmm3
; SSE2-NEXT: pand %xmm3, %xmm0
; SSE2-NEXT: pandn %xmm9, %xmm3
; SSE2-NEXT: por %xmm0, %xmm3
; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm10, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm2
; SSE2-NEXT: pcmpgtd %xmm0, %xmm11
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm11[0,0,2,2]
; SSE2-NEXT: pand %xmm2, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm11[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm2
; SSE2-NEXT: pand %xmm2, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm2
; SSE2-NEXT: por %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm13[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm12[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
@ -814,63 +814,63 @@ define void @truncstore_v8i64_v8i8(<8 x i64> %x, <8 x i8>* %p, <8 x i32> %mask)
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm8, %xmm8
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [255,255]
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm1, %xmm7
; SSE2-NEXT: pxor %xmm11, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002259711,9223372039002259711]
; SSE2-NEXT: movdqa %xmm10, %xmm6
; SSE2-NEXT: pcmpgtd %xmm7, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm1, %xmm6
; SSE2-NEXT: pxor %xmm10, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm6[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm12
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259711,9223372039002259711]
; SSE2-NEXT: movdqa %xmm11, %xmm7
; SSE2-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[0,0,2,2]
; SSE2-NEXT: pand %xmm12, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm1, %xmm6
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: pxor %xmm11, %xmm1
; SSE2-NEXT: movdqa %xmm10, %xmm7
; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm7
; SSE2-NEXT: pand %xmm7, %xmm0
; SSE2-NEXT: por %xmm6, %xmm7
; SSE2-NEXT: pand %xmm7, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm7
; SSE2-NEXT: por %xmm0, %xmm7
; SSE2-NEXT: packuswb %xmm6, %xmm7
; SSE2-NEXT: movdqa %xmm3, %xmm0
; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: movdqa %xmm10, %xmm1
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm1[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm7
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: pxor %xmm10, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm1[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm12
; SSE2-NEXT: movdqa %xmm11, %xmm6
; SSE2-NEXT: pcmpgtd %xmm1, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,0,2,2]
; SSE2-NEXT: pand %xmm12, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm0, %xmm6
; SSE2-NEXT: packuswb %xmm7, %xmm6
; SSE2-NEXT: movdqa %xmm3, %xmm0
; SSE2-NEXT: pxor %xmm10, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm1
; SSE2-NEXT: movdqa %xmm11, %xmm7
; SSE2-NEXT: pcmpgtd %xmm0, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm7[0,0,2,2]
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: pand %xmm1, %xmm3
; SSE2-NEXT: pandn %xmm9, %xmm1
; SSE2-NEXT: por %xmm3, %xmm1
; SSE2-NEXT: pxor %xmm2, %xmm11
; SSE2-NEXT: movdqa %xmm10, %xmm0
; SSE2-NEXT: pcmpgtd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm11
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm11[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm0
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: packuswb %xmm1, %xmm0
; SSE2-NEXT: packuswb %xmm0, %xmm7
; SSE2-NEXT: packuswb %xmm7, %xmm7
; SSE2-NEXT: movdqa %xmm2, %xmm0
; SSE2-NEXT: pxor %xmm10, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3
; SSE2-NEXT: pcmpgtd %xmm0, %xmm11
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm11[0,0,2,2]
; SSE2-NEXT: pand %xmm3, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm11[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm3
; SSE2-NEXT: pand %xmm3, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm3
; SSE2-NEXT: por %xmm2, %xmm3
; SSE2-NEXT: packuswb %xmm1, %xmm3
; SSE2-NEXT: packuswb %xmm3, %xmm6
; SSE2-NEXT: packuswb %xmm6, %xmm6
; SSE2-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
; SSE2-NEXT: pxor %xmm0, %xmm5
@ -880,7 +880,7 @@ define void @truncstore_v8i64_v8i8(<8 x i64> %x, <8 x i8>* %p, <8 x i32> %mask)
; SSE2-NEXT: packsswb %xmm4, %xmm4
; SSE2-NEXT: pmovmskb %xmm4, %eax
; SSE2-NEXT: testb $1, %al
; SSE2-NEXT: movd %xmm7, %ecx
; SSE2-NEXT: movd %xmm6, %ecx
; SSE2-NEXT: jne .LBB2_1
; SSE2-NEXT: # %bb.2: # %else
; SSE2-NEXT: testb $2, %al
@ -896,7 +896,7 @@ define void @truncstore_v8i64_v8i8(<8 x i64> %x, <8 x i8>* %p, <8 x i32> %mask)
; SSE2-NEXT: movb %cl, 3(%rdi)
; SSE2-NEXT: .LBB2_8: # %else6
; SSE2-NEXT: testb $16, %al
; SSE2-NEXT: pextrw $2, %xmm7, %ecx
; SSE2-NEXT: pextrw $2, %xmm6, %ecx
; SSE2-NEXT: je .LBB2_10
; SSE2-NEXT: # %bb.9: # %cond.store7
; SSE2-NEXT: movb %cl, 4(%rdi)
@ -907,7 +907,7 @@ define void @truncstore_v8i64_v8i8(<8 x i64> %x, <8 x i8>* %p, <8 x i32> %mask)
; SSE2-NEXT: movb %ch, 5(%rdi)
; SSE2-NEXT: .LBB2_12: # %else10
; SSE2-NEXT: testb $64, %al
; SSE2-NEXT: pextrw $3, %xmm7, %ecx
; SSE2-NEXT: pextrw $3, %xmm6, %ecx
; SSE2-NEXT: jne .LBB2_13
; SSE2-NEXT: # %bb.14: # %else12
; SSE2-NEXT: testb $-128, %al
@ -1297,30 +1297,30 @@ define void @truncstore_v4i64_v4i32(<4 x i64> %x, <4 x i32>* %p, <4 x i32> %mask
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm3, %xmm3
; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [4294967295,4294967295]
; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm1, %xmm6
; SSE2-NEXT: pxor %xmm5, %xmm6
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259455,9223372039002259455]
; SSE2-NEXT: movdqa %xmm9, %xmm7
; SSE2-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm7[1,1,3,3]
; SSE2-NEXT: pxor %xmm9, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259455,9223372039002259455]
; SSE2-NEXT: movdqa %xmm5, %xmm4
; SSE2-NEXT: pcmpgtd %xmm6, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSE2-NEXT: pand %xmm7, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm1
; SSE2-NEXT: pandn %xmm8, %xmm4
; SSE2-NEXT: por %xmm1, %xmm4
; SSE2-NEXT: pxor %xmm0, %xmm5
; SSE2-NEXT: movdqa %xmm9, %xmm1
; SSE2-NEXT: pcmpgtd %xmm5, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm1[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm1
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: pxor %xmm9, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm1[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm6
; SSE2-NEXT: pcmpgtd %xmm1, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm5[0,0,2,2]
; SSE2-NEXT: pand %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm5[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm1
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: pandn %xmm8, %xmm1
; SSE2-NEXT: por %xmm0, %xmm1
@ -1493,34 +1493,34 @@ define void @truncstore_v4i64_v4i16(<4 x i64> %x, <4 x i16>* %p, <4 x i32> %mask
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm3, %xmm3
; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535]
; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm0, %xmm6
; SSE2-NEXT: pxor %xmm5, %xmm6
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm9, %xmm7
; SSE2-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm7[1,1,3,3]
; SSE2-NEXT: pxor %xmm9, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm5, %xmm4
; SSE2-NEXT: pcmpgtd %xmm6, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSE2-NEXT: pand %xmm7, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm0
; SSE2-NEXT: pandn %xmm8, %xmm4
; SSE2-NEXT: por %xmm0, %xmm4
; SSE2-NEXT: pxor %xmm1, %xmm5
; SSE2-NEXT: movdqa %xmm9, %xmm0
; SSE2-NEXT: pcmpgtd %xmm5, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm5
; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm9, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm6
; SSE2-NEXT: pcmpgtd %xmm0, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2]
; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: pandn %xmm8, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: por %xmm0, %xmm5
; SSE2-NEXT: pand %xmm5, %xmm1
; SSE2-NEXT: pandn %xmm8, %xmm5
; SSE2-NEXT: por %xmm1, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
@ -1775,42 +1775,42 @@ define void @truncstore_v4i64_v4i16(<4 x i64> %x, <4 x i16>* %p, <4 x i32> %mask
define void @truncstore_v4i64_v4i8(<4 x i64> %x, <4 x i8>* %p, <4 x i32> %mask) {
; SSE2-LABEL: truncstore_v4i64_v4i8:
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm9, %xmm9
; SSE2-NEXT: pxor %xmm10, %xmm10
; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [255,255]
; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm0, %xmm4
; SSE2-NEXT: pxor %xmm6, %xmm4
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002259711,9223372039002259711]
; SSE2-NEXT: movdqa %xmm10, %xmm7
; SSE2-NEXT: pcmpgtd %xmm4, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm4
; SSE2-NEXT: pxor %xmm9, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm4[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [9223372039002259711,9223372039002259711]
; SSE2-NEXT: movdqa %xmm6, %xmm5
; SSE2-NEXT: pcmpgtd %xmm4, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,0,2,2]
; SSE2-NEXT: pand %xmm7, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm0
; SSE2-NEXT: pandn %xmm8, %xmm4
; SSE2-NEXT: por %xmm0, %xmm4
; SSE2-NEXT: pxor %xmm1, %xmm6
; SSE2-NEXT: movdqa %xmm10, %xmm0
; SSE2-NEXT: pcmpgtd %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: pandn %xmm8, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pand %xmm8, %xmm0
; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm9, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm9, %xmm3
; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
; SSE2-NEXT: pand %xmm3, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm3
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pandn %xmm8, %xmm3
; SSE2-NEXT: por %xmm1, %xmm3
; SSE2-NEXT: pand %xmm8, %xmm3
; SSE2-NEXT: pand %xmm8, %xmm4
; SSE2-NEXT: packuswb %xmm0, %xmm4
; SSE2-NEXT: packuswb %xmm3, %xmm4
; SSE2-NEXT: packuswb %xmm4, %xmm4
; SSE2-NEXT: packuswb %xmm4, %xmm4
; SSE2-NEXT: pcmpeqd %xmm2, %xmm9
; SSE2-NEXT: movmskps %xmm9, %ecx
; SSE2-NEXT: pcmpeqd %xmm2, %xmm10
; SSE2-NEXT: movmskps %xmm10, %ecx
; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: testb $1, %cl
; SSE2-NEXT: movd %xmm4, %eax
@ -2069,13 +2069,12 @@ define void @truncstore_v2i64_v2i32(<2 x i64> %x, <2 x i32>* %p, <2 x i64> %mask
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: pxor %xmm0, %xmm3
; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259455,9223372039002259455]
; SSE2-NEXT: movdqa %xmm4, %xmm5
; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm4, %xmm3
; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
; SSE2-NEXT: pand %xmm5, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm0
; SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
@ -2208,13 +2207,12 @@ define void @truncstore_v2i64_v2i16(<2 x i64> %x, <2 x i16>* %p, <2 x i64> %mask
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: pxor %xmm0, %xmm3
; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm4, %xmm5
; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm4, %xmm3
; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
; SSE2-NEXT: pand %xmm5, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm0
; SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
@ -2358,13 +2356,12 @@ define void @truncstore_v2i64_v2i8(<2 x i64> %x, <2 x i8>* %p, <2 x i64> %mask)
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: pxor %xmm0, %xmm3
; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259711,9223372039002259711]
; SSE2-NEXT: movdqa %xmm4, %xmm5
; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm4, %xmm3
; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
; SSE2-NEXT: pand %xmm5, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm0
; SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4

3
llvm/test/CodeGen/X86/pr14161.ll
View File

@ -24,9 +24,8 @@ entry:
define <2 x i16> @bad(<4 x i32>*, <4 x i8>*) {
; CHECK-LABEL: bad:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movdqa (%rdi), %xmm0
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = mem[1,1,1,1]
; CHECK-NEXT: pminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
; CHECK-NEXT: retq
entry:
%2 = load <4 x i32>, <4 x i32>* %0, align 16

196
llvm/test/CodeGen/X86/psubus.ll
View File

@ -1608,68 +1608,68 @@ vector.ph:
define <8 x i16> @psubus_8i64_max(<8 x i16> %x, <8 x i64> %y) nounwind {
; SSE2OR3-LABEL: psubus_8i64_max:
; SSE2OR3: # %bb.0: # %vector.ph
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002259456,9223372039002259456]
; SSE2OR3-NEXT: movdqa %xmm2, %xmm7
; SSE2OR3-NEXT: pxor %xmm5, %xmm7
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002324991,9223372039002324991]
; SSE2OR3-NEXT: movdqa %xmm8, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm7, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm9, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm7, %xmm6
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm9 = [65535,65535]
; SSE2OR3-NEXT: pand %xmm6, %xmm2
; SSE2OR3-NEXT: pandn %xmm9, %xmm6
; SSE2OR3-NEXT: por %xmm2, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm10 = xmm2[0,2,2,3,4,5,6,7]
; SSE2OR3-NEXT: movdqa %xmm1, %xmm6
; SSE2OR3-NEXT: pxor %xmm5, %xmm6
; SSE2OR3-NEXT: movdqa %xmm8, %xmm7
; SSE2OR3-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm2, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
; SSE2OR3-NEXT: por %xmm6, %xmm2
; SSE2OR3-NEXT: pand %xmm2, %xmm1
; SSE2OR3-NEXT: pandn %xmm9, %xmm2
; SSE2OR3-NEXT: por %xmm1, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
; SSE2OR3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm10[0],xmm1[1],xmm10[1]
; SSE2OR3-NEXT: movdqa %xmm4, %xmm2
; SSE2OR3-NEXT: pxor %xmm5, %xmm2
; SSE2OR3-NEXT: movdqa %xmm8, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm7, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm2, %xmm6
; SSE2OR3-NEXT: pand %xmm6, %xmm4
; SSE2OR3-NEXT: pandn %xmm9, %xmm6
; SSE2OR3-NEXT: por %xmm4, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
; SSE2OR3-NEXT: pxor %xmm3, %xmm5
; SSE2OR3-NEXT: movdqa %xmm8, %xmm4
; SSE2OR3-NEXT: pcmpgtd %xmm5, %xmm4
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSE2OR3-NEXT: pxor %xmm8, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002324991,9223372039002324991]
; SSE2OR3-NEXT: movdqa %xmm9, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm7, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm5, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm7, %xmm5
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm10 = [65535,65535]
; SSE2OR3-NEXT: pand %xmm5, %xmm2
; SSE2OR3-NEXT: pandn %xmm10, %xmm5
; SSE2OR3-NEXT: por %xmm2, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm5[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE2OR3-NEXT: movdqa %xmm1, %xmm5
; SSE2OR3-NEXT: pxor %xmm8, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm6
; SSE2OR3-NEXT: movdqa %xmm9, %xmm7
; SSE2OR3-NEXT: pcmpgtd %xmm5, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm6, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2OR3-NEXT: por %xmm5, %xmm4
; SSE2OR3-NEXT: pand %xmm4, %xmm3
; SSE2OR3-NEXT: pandn %xmm9, %xmm4
; SSE2OR3-NEXT: por %xmm3, %xmm4
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
; SSE2OR3-NEXT: por %xmm5, %xmm6
; SSE2OR3-NEXT: pand %xmm6, %xmm1
; SSE2OR3-NEXT: pandn %xmm10, %xmm6
; SSE2OR3-NEXT: por %xmm1, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
; SSE2OR3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
; SSE2OR3-NEXT: movdqa %xmm4, %xmm2
; SSE2OR3-NEXT: pxor %xmm8, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2OR3-NEXT: movdqa %xmm9, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm5, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm2, %xmm5
; SSE2OR3-NEXT: pand %xmm5, %xmm4
; SSE2OR3-NEXT: pandn %xmm10, %xmm5
; SSE2OR3-NEXT: por %xmm4, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm5[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
; SSE2OR3-NEXT: movdqa %xmm3, %xmm4
; SSE2OR3-NEXT: pxor %xmm8, %xmm4
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2OR3-NEXT: pcmpgtd %xmm4, %xmm9
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm4 = xmm9[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm5, %xmm4
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm9[1,1,3,3]
; SSE2OR3-NEXT: por %xmm4, %xmm5
; SSE2OR3-NEXT: pand %xmm5, %xmm3
; SSE2OR3-NEXT: pandn %xmm10, %xmm5
; SSE2OR3-NEXT: por %xmm3, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,2,2,3]
; SSE2OR3-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
; SSE2OR3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; SSE2OR3-NEXT: movsd {{.*#+}} xmm3 = xmm1[0],xmm3[1]
@ -2675,12 +2675,12 @@ define <8 x i32> @test33(<8 x i32> %a0, <8 x i64> %a1) {
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002259456,9223372039002259456]
; SSE2OR3-NEXT: movdqa %xmm3, %xmm6
; SSE2OR3-NEXT: pxor %xmm8, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm10 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm10
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259455,9223372039002259455]
; SSE2OR3-NEXT: movdqa %xmm9, %xmm7
; SSE2OR3-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm10 = xmm7[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm7[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm10, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2OR3-NEXT: por %xmm6, %xmm7
@ -2690,11 +2690,11 @@ define <8 x i32> @test33(<8 x i32> %a0, <8 x i64> %a1) {
; SSE2OR3-NEXT: por %xmm3, %xmm7
; SSE2OR3-NEXT: movdqa %xmm2, %xmm3
; SSE2OR3-NEXT: pxor %xmm8, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm11 = xmm3[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm11
; SSE2OR3-NEXT: movdqa %xmm9, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm3, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm11 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm11, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm3, %xmm6
@ -2710,26 +2710,25 @@ define <8 x i32> @test33(<8 x i32> %a0, <8 x i64> %a1) {
; SSE2OR3-NEXT: pand %xmm2, %xmm0
; SSE2OR3-NEXT: movdqa %xmm5, %xmm2
; SSE2OR3-NEXT: pxor %xmm8, %xmm2
; SSE2OR3-NEXT: movdqa %xmm9, %xmm3
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm3[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm6, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm3
; SSE2OR3-NEXT: movdqa %xmm9, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm3, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm2, %xmm3
; SSE2OR3-NEXT: pand %xmm3, %xmm5
; SSE2OR3-NEXT: pxor %xmm10, %xmm3
; SSE2OR3-NEXT: por %xmm5, %xmm3
; SSE2OR3-NEXT: movdqa %xmm4, %xmm2
; SSE2OR3-NEXT: pxor %xmm8, %xmm2
; SSE2OR3-NEXT: movdqa %xmm9, %xmm5
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm6, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm9
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm9[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm5, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm9[1,1,3,3]
; SSE2OR3-NEXT: por %xmm2, %xmm5
; SSE2OR3-NEXT: pxor %xmm5, %xmm10
; SSE2OR3-NEXT: pand %xmm4, %xmm5
@ -2907,12 +2906,12 @@ define <8 x i32> @test34(<8 x i32> %a0, <8 x i64> %a1) {
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002259456,9223372039002259456]
; SSE2OR3-NEXT: movdqa %xmm3, %xmm6
; SSE2OR3-NEXT: pxor %xmm8, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm10 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm10
; SSE2OR3-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259455,9223372039002259455]
; SSE2OR3-NEXT: movdqa %xmm9, %xmm7
; SSE2OR3-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm10 = xmm7[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm7[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm10, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2OR3-NEXT: por %xmm6, %xmm7
@ -2922,11 +2921,11 @@ define <8 x i32> @test34(<8 x i32> %a0, <8 x i64> %a1) {
; SSE2OR3-NEXT: por %xmm3, %xmm7
; SSE2OR3-NEXT: movdqa %xmm2, %xmm3
; SSE2OR3-NEXT: pxor %xmm8, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm11 = xmm3[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm11
; SSE2OR3-NEXT: movdqa %xmm9, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm3, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm11 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm11, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm3, %xmm6
@ -2942,26 +2941,25 @@ define <8 x i32> @test34(<8 x i32> %a0, <8 x i64> %a1) {
; SSE2OR3-NEXT: pand %xmm2, %xmm0
; SSE2OR3-NEXT: movdqa %xmm5, %xmm2
; SSE2OR3-NEXT: pxor %xmm8, %xmm2
; SSE2OR3-NEXT: movdqa %xmm9, %xmm3
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm3
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm3[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm6, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm3
; SSE2OR3-NEXT: movdqa %xmm9, %xmm6
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm6
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm3, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm3 = xmm6[1,1,3,3]
; SSE2OR3-NEXT: por %xmm2, %xmm3
; SSE2OR3-NEXT: pand %xmm3, %xmm5
; SSE2OR3-NEXT: pxor %xmm10, %xmm3
; SSE2OR3-NEXT: por %xmm5, %xmm3
; SSE2OR3-NEXT: movdqa %xmm4, %xmm2
; SSE2OR3-NEXT: pxor %xmm8, %xmm2
; SSE2OR3-NEXT: movdqa %xmm9, %xmm5
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm5
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2OR3-NEXT: pcmpeqd %xmm9, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pand %xmm6, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
; SSE2OR3-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm9
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm2 = xmm9[0,0,2,2]
; SSE2OR3-NEXT: pand %xmm5, %xmm2
; SSE2OR3-NEXT: pshufd {{.*#+}} xmm5 = xmm9[1,1,3,3]
; SSE2OR3-NEXT: por %xmm2, %xmm5
; SSE2OR3-NEXT: pxor %xmm5, %xmm10
; SSE2OR3-NEXT: pand %xmm4, %xmm5

8
llvm/test/CodeGen/X86/sar_fold64.ll
View File

@ -101,16 +101,16 @@ define <4 x i32> @all_sign_bit_ashr_vec0(<4 x i32> %x) {
define <4 x i32> @all_sign_bit_ashr_vec1(<4 x i32> %x) {
; SSE-LABEL: all_sign_bit_ashr_vec1:
; SSE: # %bb.0:
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE-NEXT: pxor %xmm0, %xmm0
; SSE-NEXT: psubd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX1-LABEL: all_sign_bit_ashr_vec1:
; AVX1: # %bb.0:
; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpsubd %xmm0, %xmm1, %xmm0
; AVX1-NEXT: retq
@ -161,16 +161,16 @@ define <4 x i32> @all_sign_bit_ashr_vec2(<4 x i32> %x) {
define <4 x i32> @all_sign_bit_ashr_vec3(<4 x i32> %x) {
; SSE-LABEL: all_sign_bit_ashr_vec3:
; SSE: # %bb.0:
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE-NEXT: pcmpeqd %xmm0, %xmm0
; SSE-NEXT: paddd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX1-LABEL: all_sign_bit_ashr_vec3:
; AVX1: # %bb.0:
; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: retq

35
llvm/test/CodeGen/X86/sat-add.ll
View File

@ -610,13 +610,12 @@ define <2 x i64> @unsigned_sat_constant_v2i64_using_min(<2 x i64> %x) {
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: pxor %xmm0, %xmm1
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292117,9223372034707292117]
; SSE2-NEXT: movdqa %xmm2, %xmm3
; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
; SSE2-NEXT: pcmpgtd %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm2
; SSE2-NEXT: pand %xmm2, %xmm0
; SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
@ -751,14 +750,12 @@ define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_notval(<2 x i64> %x) {
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
; SSE2-NEXT: paddq %xmm0, %xmm1
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292117,9223372034707292117]
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
; SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; SSE2-NEXT: pand %xmm3, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: retq
@ -768,14 +765,12 @@ define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_notval(<2 x i64> %x) {
; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
; SSE41-NEXT: paddq %xmm0, %xmm1
; SSE41-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292117,9223372034707292117]
; SSE41-NEXT: movdqa %xmm0, %xmm3
; SSE41-NEXT: pcmpgtd %xmm2, %xmm3
; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
; SSE41-NEXT: pcmpeqd %xmm2, %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE41-NEXT: pand %xmm4, %xmm2
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
; SSE41-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2]
; SSE41-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; SSE41-NEXT: pand %xmm3, %xmm2
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: por %xmm2, %xmm0
; SSE41-NEXT: retq

20
llvm/test/CodeGen/X86/shuffle-strided-with-offset-128.ll
View File

@ -154,10 +154,9 @@ define void @shuffle_v16i8_to_v4i8_1(<16 x i8>* %L, <4 x i8>* %S) nounwind {
define void @shuffle_v16i8_to_v4i8_2(<16 x i8>* %L, <4 x i8>* %S) nounwind {
; SSE2-LABEL: shuffle_v16i8_to_v4i8_2:
; SSE2: # %bb.0:
; SSE2-NEXT: movdqa (%rdi), %xmm0
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,3,4,5,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = mem[3,1,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,5,6,7]
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
; SSE2-NEXT: packuswb %xmm0, %xmm0
@ -463,10 +462,9 @@ define void @shuffle_v16i8_to_v2i8_1(<16 x i8>* %L, <2 x i8>* %S) nounwind {
define void @shuffle_v16i8_to_v2i8_2(<16 x i8>* %L, <2 x i8>* %S) nounwind {
; SSE2-LABEL: shuffle_v16i8_to_v2i8_2:
; SSE2: # %bb.0:
; SSE2-NEXT: movdqa (%rdi), %xmm0
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,3,4,5,6,7]
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: packuswb %xmm0, %xmm0
; SSE2-NEXT: movd %xmm0, %eax
; SSE2-NEXT: movw %ax, (%rsi)
@ -542,10 +540,9 @@ define void @shuffle_v16i8_to_v2i8_3(<16 x i8>* %L, <2 x i8>* %S) nounwind {
define void @shuffle_v16i8_to_v2i8_4(<16 x i8>* %L, <2 x i8>* %S) nounwind {
; SSE2-LABEL: shuffle_v16i8_to_v2i8_4:
; SSE2: # %bb.0:
; SSE2-NEXT: movdqa (%rdi), %xmm0
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = mem[3,1,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,0,2,3,4,5,6,7]
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: packuswb %xmm0, %xmm0
; SSE2-NEXT: movd %xmm0, %eax
; SSE2-NEXT: movw %ax, (%rsi)
@ -621,10 +618,9 @@ define void @shuffle_v16i8_to_v2i8_5(<16 x i8>* %L, <2 x i8>* %S) nounwind {
define void @shuffle_v16i8_to_v2i8_6(<16 x i8>* %L, <2 x i8>* %S) nounwind {
; SSE2-LABEL: shuffle_v16i8_to_v2i8_6:
; SSE2: # %bb.0:
; SSE2-NEXT: movdqa (%rdi), %xmm0
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = mem[3,1,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,3,4,5,6,7]
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: packuswb %xmm0, %xmm0
; SSE2-NEXT: movd %xmm0, %eax
; SSE2-NEXT: movw %ax, (%rsi)

70
llvm/test/CodeGen/X86/udiv_fix_sat.ll
View File

@ -310,18 +310,18 @@ define i16 @func7(i16 %x, i16 %y) nounwind {
define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-LABEL: vec:
; X64: # %bb.0:
; X64-NEXT: pxor %xmm8, %xmm8
; X64-NEXT: pxor %xmm9, %xmm9
; X64-NEXT: movdqa %xmm1, %xmm2
; X64-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm8[2],xmm2[3],xmm8[3]
; X64-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm9[2],xmm2[3],xmm9[3]
; X64-NEXT: movq %xmm2, %rcx
; X64-NEXT: movdqa %xmm0, %xmm2
; X64-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm8[2],xmm2[3],xmm8[3]
; X64-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm9[2],xmm2[3],xmm9[3]
; X64-NEXT: paddq %xmm2, %xmm2
; X64-NEXT: psllq $31, %xmm2
; X64-NEXT: movq %xmm2, %rax
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divq %rcx
; X64-NEXT: movq %rax, %xmm7
; X64-NEXT: movq %rax, %xmm6
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; X64-NEXT: movq %xmm2, %rax
; X64-NEXT: movdqa %xmm1, %xmm2
@ -330,32 +330,33 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divq %rcx
; X64-NEXT: movq %rax, %xmm2
; X64-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm2[0]
; X64-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
; X64-NEXT: movdqa %xmm7, %xmm2
; X64-NEXT: pxor %xmm3, %xmm2
; X64-NEXT: movdqa {{.*#+}} xmm9 = [9223372043297226751,9223372043297226751]
; X64-NEXT: movdqa %xmm9, %xmm6
; X64-NEXT: pcmpgtd %xmm2, %xmm6
; X64-NEXT: pshufd {{.*#+}} xmm4 = xmm6[0,0,2,2]
; X64-NEXT: pcmpeqd %xmm9, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
; X64-NEXT: pand %xmm4, %xmm5
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm6[1,1,3,3]
; X64-NEXT: por %xmm5, %xmm2
; X64-NEXT: movdqa {{.*#+}} xmm6 = [8589934591,8589934591]
; X64-NEXT: pand %xmm2, %xmm7
; X64-NEXT: pandn %xmm6, %xmm2
; X64-NEXT: por %xmm7, %xmm2
; X64-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm2[0]
; X64-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002259456,9223372039002259456]
; X64-NEXT: movdqa %xmm6, %xmm2
; X64-NEXT: pxor %xmm10, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm7 = xmm2[1,1,3,3]
; X64-NEXT: movdqa {{.*#+}} xmm8 = [2147483649,2147483649,2147483649,2147483649]
; X64-NEXT: pcmpeqd %xmm8, %xmm7
; X64-NEXT: movdqa {{.*#+}} xmm4 = [9223372043297226751,9223372043297226751]
; X64-NEXT: movdqa %xmm4, %xmm5
; X64-NEXT: pcmpgtd %xmm2, %xmm5
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,0,2,2]
; X64-NEXT: pand %xmm7, %xmm3
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3]
; X64-NEXT: por %xmm3, %xmm2
; X64-NEXT: movdqa {{.*#+}} xmm7 = [8589934591,8589934591]
; X64-NEXT: pand %xmm2, %xmm6
; X64-NEXT: pandn %xmm7, %xmm2
; X64-NEXT: por %xmm6, %xmm2
; X64-NEXT: psrlq $1, %xmm2
; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm8[0],xmm0[1],xmm8[1]
; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm9[0],xmm0[1],xmm9[1]
; X64-NEXT: paddq %xmm0, %xmm0
; X64-NEXT: psllq $31, %xmm0
; X64-NEXT: movq %xmm0, %rax
; X64-NEXT: movd %xmm1, %ecx
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divq %rcx
; X64-NEXT: movq %rax, %xmm4
; X64-NEXT: movq %rax, %xmm3
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; X64-NEXT: movq %xmm0, %rax
; X64-NEXT: psrlq $32, %xmm1
@ -363,19 +364,18 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divq %rcx
; X64-NEXT: movq %rax, %xmm0
; X64-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm0[0]
; X64-NEXT: pxor %xmm4, %xmm3
; X64-NEXT: movdqa %xmm9, %xmm0
; X64-NEXT: pcmpgtd %xmm3, %xmm0
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,2,2]
; X64-NEXT: pcmpeqd %xmm9, %xmm3
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; X64-NEXT: pand %xmm1, %xmm3
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; X64-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm0[0]
; X64-NEXT: pxor %xmm3, %xmm10
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm10[1,1,3,3]
; X64-NEXT: pcmpeqd %xmm8, %xmm0
; X64-NEXT: pcmpgtd %xmm10, %xmm4
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm4[0,0,2,2]
; X64-NEXT: pand %xmm0, %xmm1
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
; X64-NEXT: por %xmm1, %xmm0
; X64-NEXT: pand %xmm0, %xmm3
; X64-NEXT: pandn %xmm7, %xmm0
; X64-NEXT: por %xmm3, %xmm0
; X64-NEXT: pand %xmm0, %xmm4
; X64-NEXT: pandn %xmm6, %xmm0
; X64-NEXT: por %xmm4, %xmm0
; X64-NEXT: psrlq $1, %xmm0
; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
; X64-NEXT: retq

22
llvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll
View File

@ -89,9 +89,9 @@ define <4 x i1> @t1_all_odd_ne(<4 x i32> %X) nounwind {
; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm1
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-SSE2-NEXT: retq
@ -207,18 +207,16 @@ define <2 x i1> @t3_wide(<2 x i64> %X) nounwind {
; CHECK-SSE-NEXT: psllq $32, %xmm0
; CHECK-SSE-NEXT: paddq %xmm2, %xmm0
; CHECK-SSE-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [15372286730238776661,9223372034707292159]
; CHECK-SSE-NEXT: movdqa %xmm0, %xmm2
; CHECK-SSE-NEXT: pcmpgtd %xmm1, %xmm2
; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; CHECK-SSE-NEXT: pcmpeqd %xmm1, %xmm0
; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; CHECK-SSE-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
; CHECK-SSE-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; CHECK-SSE-NEXT: pand %xmm2, %xmm1
; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; CHECK-SSE-NEXT: pand %xmm3, %xmm0
; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
; CHECK-SSE-NEXT: por %xmm0, %xmm1
; CHECK-SSE-NEXT: pcmpeqd %xmm0, %xmm0
; CHECK-SSE-NEXT: pxor %xmm1, %xmm0
; CHECK-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
; CHECK-SSE-NEXT: por %xmm1, %xmm0
; CHECK-SSE-NEXT: pcmpeqd %xmm1, %xmm1
; CHECK-SSE-NEXT: pxor %xmm0, %xmm1
; CHECK-SSE-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX1-LABEL: t3_wide:

56
llvm/test/CodeGen/X86/vec_setcc-2.ll
View File

@ -231,14 +231,12 @@ define <2 x i1> @ugt_v2i64_splat(<2 x i64> %x) {
; SSE2-LABEL: ugt_v2i64_splat:
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898]
; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: pcmpgtd %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
; SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-NEXT: pand %xmm2, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: retq
;
@ -306,13 +304,12 @@ define <2 x i1> @uge_v2i64_splat(<2 x i64> %x) {
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898]
; SSE2-NEXT: movdqa %xmm1, %xmm2
; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pand %xmm2, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm0
@ -383,14 +380,13 @@ define <2 x i1> @ult_v2i64_splat(<2 x i64> %x) {
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898]
; SSE2-NEXT: movdqa %xmm1, %xmm2
; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
; SSE2-NEXT: pand %xmm2, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: ult_v2i64_splat:
@ -456,17 +452,15 @@ define <2 x i1> @ule_v2i64_splat(<2 x i64> %x) {
; SSE2-LABEL: ule_v2i64_splat:
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898]
; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: pcmpgtd %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-NEXT: pand %xmm2, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm2
; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm2, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: ule_v2i64_splat:

48
llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
View File

@ -17,24 +17,23 @@ define void @load_i8_stride4_vf2(<8 x i8>* %in.vec, <2 x i8>* %out.vec0, <2 x i8
; SSE-NEXT: packuswb %xmm1, %xmm1
; SSE-NEXT: packuswb %xmm1, %xmm1
; SSE-NEXT: pxor %xmm2, %xmm2
; SSE-NEXT: movdqa %xmm0, %xmm3
; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[1,3,2,3,4,5,6,7]
; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[1,3,2,3,4,5,6,7]
; SSE-NEXT: packuswb %xmm2, %xmm2
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,3,4,5,6,7]
; SSE-NEXT: packuswb %xmm0, %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7]
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
; SSE-NEXT: packuswb %xmm3, %xmm3
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,3,4,5,6,7]
; SSE-NEXT: packuswb %xmm0, %xmm0
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: movw %ax, (%rsi)
; SSE-NEXT: movd %xmm2, %eax
; SSE-NEXT: movw %ax, (%rdx)
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: movw %ax, (%rcx)
; SSE-NEXT: movd %xmm3, %eax
; SSE-NEXT: movw %ax, (%rcx)
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: movw %ax, (%r8)
; SSE-NEXT: retq
;
@ -91,28 +90,27 @@ define void @load_i8_stride4_vf4(<16 x i8>* %in.vec, <4 x i8>* %out.vec0, <4 x i
; SSE-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[1,3,2,3,4,5,6,7]
; SSE-NEXT: movdqa %xmm1, %xmm5
; SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm5[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm1[3,1,2,3,4,5,6,7]
; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[1,3,2,3,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
; SSE-NEXT: packuswb %xmm2, %xmm2
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[3,1,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[1,0,3,2,4,5,6,7]
; SSE-NEXT: packuswb %xmm1, %xmm1
; SSE-NEXT: pshufhw {{.*#+}} xmm4 = xmm5[0,1,2,3,7,5,6,7]
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[1,0,3,2,4,5,6,7]
; SSE-NEXT: packuswb %xmm4, %xmm4
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[3,1,2,3,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; SSE-NEXT: packuswb %xmm4, %xmm4
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[3,1,2,3,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
; SSE-NEXT: packuswb %xmm1, %xmm1
; SSE-NEXT: movd %xmm0, (%rsi)
; SSE-NEXT: movd %xmm2, (%rdx)
; SSE-NEXT: movd %xmm1, (%rcx)
; SSE-NEXT: movd %xmm4, (%r8)
; SSE-NEXT: movd %xmm4, (%rcx)
; SSE-NEXT: movd %xmm1, (%r8)
; SSE-NEXT: retq
;
; AVX-LABEL: load_i8_stride4_vf4:

2
llvm/test/CodeGen/X86/vector-partial-undef.ll
View File

@ -105,8 +105,8 @@ define <4 x i64> @or_undef_elts(<2 x i64> %x) {
; AVX-LABEL: or_undef_elts:
; AVX: # %bb.0:
; AVX-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,0,1,2]
; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX-NEXT: retq
%extend = shufflevector <2 x i64> %x, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
%bogus_bo = or <4 x i64> %extend, <i64 undef, i64 undef, i64 42, i64 43>

9760
llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
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File diff suppressed because it is too large Load Diff

4
llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
View File

@ -954,8 +954,8 @@ define <2 x i64> @splatvar_modulo_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwi
;
; XOPAVX2-LABEL: splatvar_modulo_shift_v2i64:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; XOPAVX2-NEXT: vpsubq %xmm1, %xmm2, %xmm1
; XOPAVX2-NEXT: vpshaq %xmm1, %xmm0, %xmm0
@ -1147,8 +1147,8 @@ define <16 x i8> @splatvar_modulo_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwi
;
; XOPAVX2-LABEL: splatvar_modulo_shift_v16i8:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
; XOPAVX2-NEXT: vpshab %xmm1, %xmm0, %xmm0

2
llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
View File

@ -1272,8 +1272,8 @@ define <32 x i8> @splatvar_modulo_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwi
;
; XOPAVX2-LABEL: splatvar_modulo_shift_v32i8:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2

2
llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
View File

@ -950,8 +950,8 @@ define <16 x i8> @splatvar_modulo_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwi
;
; XOPAVX2-LABEL: splatvar_modulo_shift_v16i8:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0

2
llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
View File

@ -1049,8 +1049,8 @@ define <32 x i8> @splatvar_modulo_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwi
;
; XOPAVX2-LABEL: splatvar_modulo_shift_v32i8:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2

2
llvm/test/CodeGen/X86/vector-shift-shl-128.ll
View File

@ -856,8 +856,8 @@ define <16 x i8> @splatvar_modulo_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwi
;
; XOPAVX2-LABEL: splatvar_modulo_shift_v16i8:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0
; XOPAVX2-NEXT: retq
;

2
llvm/test/CodeGen/X86/vector-shift-shl-256.ll
View File

@ -974,8 +974,8 @@ define <32 x i8> @splatvar_modulo_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwi
; XOPAVX2-LABEL: splatvar_modulo_shift_v32i8:
; XOPAVX2: # %bb.0:
; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; XOPAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; XOPAVX2-NEXT: vpshlb %xmm1, %xmm2, %xmm2
; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0
; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0

30
llvm/test/CodeGen/X86/vector-shuffle-combining.ll
View File

@ -2439,8 +2439,8 @@ define <4 x float> @combine_undef_input_test20(<4 x float> %a) {
define <8 x i32> @combine_unneeded_subvector1(<8 x i32> %a) {
; SSE-LABEL: combine_unneeded_subvector1:
; SSE: # %bb.0:
; SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,2,1,0]
; SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE-NEXT: movdqa %xmm0, %xmm1
; SSE-NEXT: retq
;
@ -2454,8 +2454,8 @@ define <8 x i32> @combine_unneeded_subvector1(<8 x i32> %a) {
;
; AVX2-SLOW-LABEL: combine_unneeded_subvector1:
; AVX2-SLOW: # %bb.0:
; AVX2-SLOW-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4]
; AVX2-SLOW-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,2,3]
; AVX2-SLOW-NEXT: retq
;
@ -2469,8 +2469,8 @@ define <8 x i32> @combine_unneeded_subvector1(<8 x i32> %a) {
;
; AVX2-FAST-PERLANE-LABEL: combine_unneeded_subvector1:
; AVX2-FAST-PERLANE: # %bb.0:
; AVX2-FAST-PERLANE-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX2-FAST-PERLANE-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4]
; AVX2-FAST-PERLANE-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX2-FAST-PERLANE-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,2,3]
; AVX2-FAST-PERLANE-NEXT: retq
%b = add <8 x i32> %a, <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
@ -2481,9 +2481,9 @@ define <8 x i32> @combine_unneeded_subvector1(<8 x i32> %a) {
define <8 x i32> @combine_unneeded_subvector2(<8 x i32> %a, <8 x i32> %b) {
; SSE-LABEL: combine_unneeded_subvector2:
; SSE: # %bb.0:
; SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[3,2,1,0]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,2,1,0]
; SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: combine_unneeded_subvector2:
@ -3419,13 +3419,12 @@ define void @SpinningCube() {
; AVX1-NEXT: vmovaps {{.*#+}} xmm0 = <u,u,u,1.0E+0>
; AVX1-NEXT: vmovaps {{.*#+}} xmm1 = <0.0E+0,0.0E+0,-2.0E+0,u>
; AVX1-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0]
; AVX1-NEXT: vinsertps {{.*#+}} xmm3 = xmm1[0,1,2],xmm2[0]
; AVX1-NEXT: vinsertps {{.*#+}} xmm2 = xmm0[0],xmm2[0],xmm0[2,3]
; AVX1-NEXT: vaddps %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vmovaps %xmm1, (%rax)
; AVX1-NEXT: vbroadcastss (%rax), %xmm1
; AVX1-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,3]
; AVX1-NEXT: vaddps %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vmovaps %xmm2, (%rax)
; AVX1-NEXT: vbroadcastss (%rax), %xmm2
; AVX1-NEXT: vmulps %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vmovaps %xmm0, (%rax)
; AVX1-NEXT: retq
@ -3436,13 +3435,12 @@ define void @SpinningCube() {
; AVX2-NEXT: vbroadcastss {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX2-NEXT: vmovaps {{.*#+}} xmm1 = <0.0E+0,0.0E+0,-2.0E+0,u>
; AVX2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0]
; AVX2-NEXT: vinsertps {{.*#+}} xmm3 = xmm1[0,1,2],xmm2[0]
; AVX2-NEXT: vinsertps {{.*#+}} xmm2 = xmm0[0],xmm2[0],xmm0[2,3]
; AVX2-NEXT: vaddps %xmm2, %xmm1, %xmm1
; AVX2-NEXT: vmovaps %xmm1, (%rax)
; AVX2-NEXT: vbroadcastss (%rax), %xmm1
; AVX2-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,3]
; AVX2-NEXT: vaddps %xmm2, %xmm3, %xmm2
; AVX2-NEXT: vmovaps %xmm2, (%rax)
; AVX2-NEXT: vbroadcastss (%rax), %xmm2
; AVX2-NEXT: vmulps %xmm1, %xmm2, %xmm1
; AVX2-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX2-NEXT: vmovaps %xmm0, (%rax)
; AVX2-NEXT: retq

2084
llvm/test/CodeGen/X86/vector-trunc-packus.ll
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File diff suppressed because it is too large Load Diff

3286
llvm/test/CodeGen/X86/vector-trunc-ssat.ll
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File diff suppressed because it is too large Load Diff

1580
llvm/test/CodeGen/X86/vector-trunc-usat.ll
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File diff suppressed because it is too large Load Diff