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AMDGPU: Fix a comment (#169403)

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This verifier check will complain if there aren't enough implicit
operands -- so it doesn't *allow* those operands, it *requires* them.
This commit is contained in:
Nicolai Hähnle 2025-11-24 12:54:53 -08:00 committed by GitHub
parent 51d93e7397
commit f581d8ad8f
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1 changed files with 4 additions and 3 deletions
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7
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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@ -5518,9 +5518,10 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
Desc.getNumOperands() + Desc.implicit_uses().size();
const unsigned NumImplicitOps = IsDst ? 2 : 1;
// Allow additional implicit operands. This allows a fixup done by the post
// RA scheduler where the main implicit operand is killed and implicit-defs
// are added for sub-registers that remain live after this instruction.
// Require additional implicit operands. This allows a fixup done by the
// post RA scheduler where the main implicit operand is killed and
// implicit-defs are added for sub-registers that remain live after this
// instruction.
if (MI.getNumOperands() < StaticNumOps + NumImplicitOps) {
ErrInfo = "missing implicit register operands";
return false;