[polly] Make reduction detection checks more robust - part 1 (#75297)
Existing reduction detection algorithm does two types of memory checks before marking a load store pair as reduction. First is to check if load and store are pointing to the same memory. This check right now detects the following case as reduction. sum[0] = sum[1] + A[i] This is because the check compares only base of the memory addresses involved and not their indices. This patch addresses this issue and introduces some debug prints. Added couple of test cases to verify the functionality of patch as well.
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@ -2536,18 +2536,39 @@ bool hasIntersectingAccesses(isl::set AllAccs, MemoryAccess *LoadMA,
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bool checkCandidatePairAccesses(MemoryAccess *LoadMA, MemoryAccess *StoreMA,
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isl::set Domain,
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SmallVector<MemoryAccess *, 8> &MemAccs) {
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// First check if the base value is the same.
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isl::map LoadAccs = LoadMA->getAccessRelation();
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isl::map StoreAccs = StoreMA->getAccessRelation();
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// Skip those with obviously unequal base addresses.
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bool Valid = LoadAccs.has_equal_space(StoreAccs);
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LLVM_DEBUG(dbgs() << " == The accessed space below is "
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<< (Valid ? "" : "not ") << "equal!\n");
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LLVM_DEBUG(LoadMA->dump(); StoreMA->dump());
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// And check if the remaining for overlap with other memory accesses.
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if (Valid) {
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// Then check if they actually access the same memory.
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isl::map R = isl::manage(LoadAccs.copy())
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.intersect_domain(isl::manage(Domain.copy()));
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isl::map W = isl::manage(StoreAccs.copy())
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.intersect_domain(isl::manage(Domain.copy()));
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isl::set RS = R.range();
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isl::set WS = W.range();
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isl::set InterAccs =
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isl::manage(RS.copy()).intersect(isl::manage(WS.copy()));
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Valid = !InterAccs.is_empty();
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LLVM_DEBUG(dbgs() << " == The accessed memory is " << (Valid ? "" : "not ")
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<< "overlapping!\n");
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}
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if (Valid) {
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// Finally, check if they are no other instructions accessing this memory
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isl::map AllAccsRel = LoadAccs.unite(StoreAccs);
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AllAccsRel = AllAccsRel.intersect_domain(Domain);
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isl::set AllAccs = AllAccsRel.range();
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Valid = !hasIntersectingAccesses(AllAccs, LoadMA, StoreMA, Domain, MemAccs);
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LLVM_DEBUG(dbgs() << " == The accessed memory is " << (Valid ? "not " : "")
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<< "accessed by other instructions!\n");
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}
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return Valid;
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}
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38
polly/test/ScopInfo/reduction_different_index.ll
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38
polly/test/ScopInfo/reduction_different_index.ll
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@ -0,0 +1,38 @@
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; RUN: opt %loadPolly -polly-print-scops -disable-output < %s | FileCheck %s
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; Verify if the following case is not detected as reduction.
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;
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; void f(int *A,int *sum) {
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; for (int i = 0; i < 1024; i++)
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; sum[0] = sum[1] + A[i];
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; }
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;
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; Verify that we don't detect the reduction on sum
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;
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_sum[1] };
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; CHECK-NEXT:ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_A[i0] };
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; CHECK-NEXT:MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_sum[0] };
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;
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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define dso_local void @f(ptr nocapture noundef readonly %A, ptr nocapture noundef %sum) local_unnamed_addr #0 {
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret void
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for.body: ; preds = %entry.split, %for.body
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, ptr %sum, i64 1
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%0 = load i32, ptr %arrayidx
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%arrayidx1 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
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%1 = load i32, ptr %arrayidx1
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%add = add nsw i32 %1, %0
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store i32 %add, ptr %sum
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, 1024
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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45
polly/test/ScopInfo/reduction_different_index1.ll
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45
polly/test/ScopInfo/reduction_different_index1.ll
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@ -0,0 +1,45 @@
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; RUN: opt %loadPolly -polly-print-scops -disable-output < %s | FileCheck %s
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; Verify if the following case is not detected as reduction.
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;
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; void f(int *A, int *sum, int i1, int i2) {
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; for (int i = 0; i < 1024; i++)
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; sum[i2] = sum[i1] + A[i];
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; }
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;
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; Verify that we don't detect the reduction on sum
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;
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_sum[i1] };
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; CHECK-NEXT:ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_A[i0] };
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; CHECK-NEXT:MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_sum[i2] };
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;
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
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define dso_local void @f(ptr nocapture noundef readonly %A, ptr nocapture noundef %sum, i32 noundef %i1, i32 noundef %i2) local_unnamed_addr #0 {
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entry:
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br label %entry.split
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entry.split: ; preds = %entry
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%idxprom = sext i32 %i1 to i64
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%arrayidx = getelementptr inbounds i32, ptr %sum, i64 %idxprom
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%idxprom3 = sext i32 %i2 to i64
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%arrayidx4 = getelementptr inbounds i32, ptr %sum, i64 %idxprom3
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret void
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for.body: ; preds = %entry.split, %for.body
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%indvars.iv = phi i64 [ 0, %entry.split ], [ %indvars.iv.next, %for.body ]
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%0 = load i32, ptr %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
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%1 = load i32, ptr %arrayidx2, align 4
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%add = add nsw i32 %1, %0
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store i32 %add, ptr %arrayidx4, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, 1024
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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